mirror of
https://github.com/apache/nuttx.git
synced 2026-06-08 01:42:58 +08:00
Merge branch 'master' of bitbucket.org:pnb990/nuttx-kernel-arch
This commit is contained in:
pnb
@@ -5120,6 +5120,136 @@ config STM32_TIM14_DAC2
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endchoice
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config STM32_TIM1_CAP
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bool "TIM1 Capture
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default n
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depends on STM32_HAVE_TIM1
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---help---
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Reserve timer 1 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM1_CAP
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bool "TIM1 Capture
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default n
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depends on STM32_HAVE_TIM1
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---help---
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Reserve timer 1 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM2_CAP
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bool "TIM2 Capture
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default n
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depends on STM32_HAVE_TIM2
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---help---
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Reserve timer 2 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM3_CAP
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bool "TIM3 Capture
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default n
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depends on STM32_HAVE_TIM3
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---help---
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Reserve timer 3 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM4_CAP
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bool "TIM4 Capture
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default n
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depends on STM32_HAVE_TIM4
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---help---
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Reserve timer 4 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM5_CAP
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bool "TIM5 Capture
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default n
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depends on STM32_HAVE_TIM5
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---help---
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Reserve timer 5 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM8_CAP
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bool "TIM8 Capture
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default n
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depends on STM32_HAVE_TIM8
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---help---
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Reserve timer 8 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM9_CAP
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bool "TIM9 Capture
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default n
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depends on STM32_HAVE_TIM9
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---help---
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Reserve timer 9 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM10_CAP
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bool "TIM10 Capture
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default n
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depends on STM32_HAVE_TIM10
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---help---
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Reserve timer 10 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM11_CAP
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bool "TIM11 Capture
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default n
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depends on STM32_HAVE_TIM11
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---help---
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Reserve timer 11 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM12_CAP
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bool "TIM12 Capture
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default n
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depends on STM32_HAVE_TIM12
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---help---
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Reserve timer 12 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM13_CAP
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bool "TIM13 Capture
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default n
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depends on STM32_HAVE_TIM13
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---help---
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Reserve timer 13 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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config STM32_TIM14_CAP
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bool "TIM14 Capture
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default n
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depends on STM32_HAVE_TIM14
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---help---
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Reserve timer 14 for use by Capture
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Timer devices may be used for different purposes. One special purpose is
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to capture input.
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menu "ADC Configuration"
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depends on STM32_ADC
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,197 @@
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/************************************************************************************
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* arch/arm/src/stm32/stm32_capture.h
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*
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* Copyright (C) 2015 Bouteville Pierre-Noel. All rights reserved.
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* Author: Bouteville Pierre-Noel <pnb990@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_CAPTURE_H
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#define __ARCH_ARM_SRC_STM32_STM32_CAPTURE_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include <arch/board/board.h>
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#include "chip/stm32_tim.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Helpers **************************************************************************/
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#define STM32_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq))
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#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
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#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
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#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
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#define STM32_TIM_ENABLEINT(d,s,on) ((d)->ops->enableint(d,s,on))
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#define STM32_TIM_ACKFLAGS(d,s) ((d)->ops->ackflags(d,s))
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#define STM32_TIM_GETFLAGS(d) ((d)->ops->getflags(d))
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/************************************************************************************
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* Public Types
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/* Capture Device Structure */
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struct stm32_cap_dev_s
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{
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struct stm32_cap_ops_s *ops;
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};
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/* Capture input EDGE sources */
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typedef enum
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{
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/* Mapped */
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STM32_CAP_MAPPED_MASK = (GTIM_CCMR1_CC1S_MASK),
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STM32_CAP_MAPPED_TI1 = (1<<GTIM_CCMR1_CC1S_SHIFT),
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STM32_CAP_MAPPED_TI2 = (2<<GTIM_CCMR1_CC1S_SHIFT),
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/*TODO STM32_CAP_MAPPED_TRC = (3<<GTIM_CCMR1_CC1S_SHIFT),*/
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/* Event prescaler */
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STM32_CAP_INPSC_MASK = (GTIM_CCMR1_IC1PSC_MASK),
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STM32_CAP_INPSC_NO = (0<<GTIM_CCMR1_IC1PSC_SHIFT),
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STM32_CAP_INPSC_2EVENTS = (1<<GTIM_CCMR1_IC1PSC_SHIFT),
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STM32_CAP_INPSC_4EVENTS = (2<<GTIM_CCMR1_IC1PSC_SHIFT),
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STM32_CAP_INPSC_8EVENTS = (3<<GTIM_CCMR1_IC1PSC_SHIFT),
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/* Event prescaler */
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STM32_CAP_FILTER_MASK = (GTIM_CCMR1_IC1F_MASK),
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STM32_CAP_FILTER_NO = (0<<GTIM_CCMR1_IC1F_SHIFT),
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/* internal clock with N time to confirm event */
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STM32_CAP_FILTER_INT_N2 = (1<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_INT_N4 = (2<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_INT_N8 = (3<<GTIM_CCMR1_IC1F_SHIFT),
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/* DTS clock div by D with N time to confirm event */
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STM32_CAP_FILTER_DTS_D2_N6 = (4<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D2_N8 = (5<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D4_N6 = (6<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D4_N8 = (7<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D8_N6 = (8<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D8_N8 = (9<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D16_N5 = (10<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D16_N6 = (11<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D16_N8 = (12<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D32_N5 = (13<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D32_N6 = (14<<GTIM_CCMR1_IC1F_SHIFT),
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STM32_CAP_FILTER_DTS_D32_N8 = (15<<GTIM_CCMR1_IC1F_SHIFT),
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/* EDGE */
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STM32_CAP_EDGE_MASK = (3<<8),
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STM32_CAP_EDGE_DISABLED = (0<<8),
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STM32_CAP_EDGE_RISING = (1<<8),
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STM32_CAP_EDGE_FALLING = (2<<8),
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STM32_CAP_EDGE_BOTH = (3<<8),
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} stm32_cap_ch_cfg_t;
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/* TIM clock sources */
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typedef enum
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{
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STM32_CAP_CLK_INT= 0,
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STM32_CAP_CLK_EXT,
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/* TODO: Add other clock */
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} stm32_cap_clk_t;
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/* TIM Sources */
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typedef enum
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{
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/* One of the following */
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STM32_CAP_FLAG_IRQ_TIMER = (GTIM_SR_UIF),
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STM32_CAP_FLAG_IRQ_CH_1 = (GTIM_SR_CC1IF),
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STM32_CAP_FLAG_IRQ_CH_2 = (GTIM_SR_CC2IF),
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STM32_CAP_FLAG_IRQ_CH_3 = (GTIM_SR_CC3IF),
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STM32_CAP_FLAG_IRQ_CH_4 = (GTIM_SR_CC4IF),
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STM32_CAP_FLAG_OF_CH_1 = (GTIM_SR_CC1OF),
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STM32_CAP_FLAG_OF_CH_2 = (GTIM_SR_CC2OF),
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STM32_CAP_FLAG_OF_CH_3 = (GTIM_SR_CC3OF),
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STM32_CAP_FLAG_OF_CH_4 = (GTIM_SR_CC4OF)
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} stm32_cap_flags_t;
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/* TIM Operations */
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struct stm32_cap_ops_s
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{
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int (*setclock)(FAR struct stm32_cap_dev_s *dev, stm32_cap_clk_src_t clk_src,
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uint32_t prescaler);
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int (*setchannel)(FAR struct stm32_cap_dev_s *dev, uint8_t channel);
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int (*setisr)(FAR struct stm32_tim_dev_s *dev,xcpt_t handler);
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void (*enableint)(FAR struct stm32_tim_dev_s *dev, stm32_cap_flags_t src, bool on );
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};
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/* Power-up timer and get its structure */
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FAR struct stm32_cap_dev_s *stm32_cap_init(int timer);
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/* Power-down timer, mark it as unused */
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int stm32_cap_deinit(FAR struct stm32_cap_dev_s * dev);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32_STM32_TIM_H */
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+227
-493
File diff suppressed because it is too large
Load Diff
@@ -55,16 +55,16 @@
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************************************************************************************/
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/* Helpers **************************************************************************/
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#define STM32_TIM_SETMODE(d,mode) ((d)->ops->setmode(d,mode))
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#define STM32_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq))
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#define STM32_TIM_SETPERIOD(d,period) ((d)->ops->setperiod(d,period))
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#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
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#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
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#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
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#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
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#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
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#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
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#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
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#define STM32_TIM_SETMODE(d,mode) ((d)->ops->setmode(d,mode))
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#define STM32_TIM_SETCLOCK(d,freq) ((d)->ops->setclock(d,freq))
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#define STM32_TIM_SETPERIOD(d,period) ((d)->ops->setperiod(d,period))
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#define STM32_TIM_SETCHANNEL(d,ch,mode) ((d)->ops->setchannel(d,ch,mode))
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#define STM32_TIM_SETCOMPARE(d,ch,comp) ((d)->ops->setcompare(d,ch,comp))
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#define STM32_TIM_GETCAPTURE(d,ch) ((d)->ops->getcapture(d,ch))
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#define STM32_TIM_SETISR(d,hnd,s) ((d)->ops->setisr(d,hnd,s))
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#define STM32_TIM_ENABLEINT(d,s) ((d)->ops->enableint(d,s))
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#define STM32_TIM_DISABLEINT(d,s) ((d)->ops->disableint(d,s))
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#define STM32_TIM_ACKINT(d,s) ((d)->ops->ackint(d,s))
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/************************************************************************************
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* Public Types
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@@ -122,21 +122,6 @@ typedef enum
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} stm32_tim_mode_t;
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/* TIM Sources */
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typedef enum
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{
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/* One of the following */
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STM32_TIM_INT_SRC_OVERFLOW = 0x0001,
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STM32_TIM_INT_SRC_CAPTURE_1 = 0x0002,
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STM32_TIM_INT_SRC_CAPTURE_2 = 0x0004,
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STM32_TIM_INT_SRC_CAPTURE_3 = 0x0008,
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STM32_TIM_INT_SRC_CAPTURE_4 = 0x0010
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} stm32_tim_source_t;
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/* TIM Channel Modes */
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typedef enum
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@@ -150,19 +135,15 @@ typedef enum
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/* MODES: */
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STM32_TIM_CH_MODE_OUT_MASK = 0x06,
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STM32_TIM_CH_MODE_IN_MASK = 0x10,
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STM32_TIM_CH_MODE_MASK = 0x16,
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STM32_TIM_CH_MODE_MASK = 0x06,
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/* Output Compare Modes */
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STM32_TIM_CH_OUTPWM = 0x04, /** Enable standard PWM mode, active high when counter < compare */
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//STM32_TIM_CH_OUTCOMPARE = 0x06,
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/* Input Compare Modes */
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STM32_TIM_CH_INCAPTURE = 0x10,
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// TODO other modes ... as PWM capture, ENCODER and Hall Sensor
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//STM32_TIM_CH_INCAPTURE = 0x10,
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//STM32_TIM_CH_INPWM = 0x20
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//STM32_TIM_CH_DRIVE_OC -- open collector mode
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