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Merged nuttx/nuttx into neilh20/anuttx/master

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neil H
2016-07-24 10:57:27 -07:00
parent f3fb492f68 88cb41a0dc
commit 0d6be8e022
400 changed files with 10130 additions and 2388 deletions
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ChangeLog
+80
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@@ -12295,3 +12295,83 @@
Matthias Renner (2016-07-08).
* drivers/pipe: Add missing configuration for pipe ring buffer size.
From Frank Benkert (2016-07-08).
* STM32L4: Fix incorrect clock setup for LPTIM1. From ziggurat29
(2016-07-08).
* nucleo-l476rg and stm32lf76vg-disco: Define timer clock frequencies on
STM32L4-based boards. From ziggurat29 (2016-07-08).
* STM32L4: Add support for tickless OS, and incidentally timers, pwm,
oneshot, free-running.... From ziggurat29 (2016-07-08).
* SAM3/4 I2C: Fix reversed logic in twi_startmessage(). From Wolfgang
Reissnegger (2016-07-09).
* VFS ioctl(). Per comments from David Sidrane, file_ioctl() should not
return succeed if the ioctl method is not supported. It probably
should return ENOTTY in that case (2016-07-09).
* libm: This change should significantly improve the performance of
single precision floating point math library functions. The vast
majority of changes have to do with preventing the compiler from
needlessly promoting floats to doubles, performing the calculation
with doubles, only to demote the result to float. These changes only
affect the math lib functions that return float. From David Alessio
(2016-07-11).
* STM32F4 Discovery: Add FPU support for ostest for the STM32F4Discovery
platform. From David Alessio (2016-07-11).
* Build system: Remove the includes/apps link to apps/include. It is
no longer used. From Sebastien Lorquet (2016-07-11).
* printf(): If there are no streams, let printf() fall back to use
syslog() for output (2016-07-11).
* Qemu-i486: Fix qemu-i486/ostest/Make.defs test for M32. From Heath
Petersen (2016-07-12).
* UART 16550: Handle when CONFIG_SERIAL_UART_ARCH_IOCTL is not enabled.
From Heath Petersen (2016-07-12).
* Kinetis Ethernet: Add support for the KSZ8081 PHY (2016-07-12).
* SST26 Driver: Before accessing the sst26 flash, the "Global Unlock"
command must me executed, which I do in the sst26 driver. BUT re-
reading the datasheet, the WREN instruction is required to enable the
execution of this command. This was not done. I have no idea how the
driver currently works except by chance. The writes should never
happen at all, the flash is half-enabled! From Sebastien Lorquet
(2016-07-12).
* Freedom K64F: Add a networking NSH configuration. (2016-07-12).
* N25Qxx Driver: Alter the notion of 'blocksize' to be equivalent to
'flash write page size' in order to align with assumptions in the
smartfs driver (at least, maybe other things do as well). Correct a
bug that was previously masked by having blocksize=eraseblocksize
which would cause buffer overflows and delicious hardfaults. Trivial
spelling changes in comments, etc. From ziggurat29 (2016-07-12).
* STM32L476 Discovery: Update stm32l476 disco to include init code for
smartfs and nxffs for cases where those fs are included in build.
From ziggurat29 (2016-07-12).
* Kinetis Ethernet and Freedom-K64F: Freedcom-K64F PHY address was
wrong. Modified Ethernet driver to try all PHY addresses and then
only fail if the driver cannot find a usable PHY address. MDIO pin
must have an internal pull-up on the Freedom-K64F (2016-07-12).
* Kinetis Ethernet: Add support for CONFIG_NET_NOINTS (2016-07-12).
* SmartFS: Fix a 32-byte memory leak. From Ken Pettit (2016-07-12).
* Freedom-K64F: SDHC is now enabled in the nsh configuration (but does
not work)Add hooks for automounter; Change NSH configuration to use
Windows (2016-07-13).
* SAMV7 USBHS Device: This change solves a problem which causes data
loss while sending data via USB. This problem is caused by an incorrect
handling of the endpoint state in the USB driver sam_usbdevhs. This
leads under some circumstances to situations in which an DMA transfer
is setup while a previous DMA transfer is currently active. Amongst
other things I introduced the new endpoint state USBHS_EPSTATE_SENDING_DMA
for the fix. To reproduce the problem, I used a program which send as
many data as possible via a CDC/ACM device and verified the received
data on the PC. From Stefan Kolb (2016-07-13).
* STM32: Fix bug in oneshot timer. From Max Neklyudov (2016-07-13).
* STM32L4: Port foward bugfix from stm32 of oneshot timer. From
ziggurat29 (2016-07-13).
* STM32 and EFM32: I'm using syslog through ITM. In this case
syslog_channel function is call before RAM initialisation in
stm32_clockconfig. But syslog channel uses a global variable that is
reset to default by the RAM initialization. From Pierre-noel
Bouteville (2016-07-14).
* LPC43xx SPIFI: If CONFIG_SPIFI_SECTOR512 undefined, lpc43_bwrite
doesn't do actual write (probably copy/paste errors). Still not sure
about current state of lpc43_spifi implementation, but for me NXFFS
works with this patch. From Vytautas Lukenskas (2016-07-14).
* SMART MTD layer: Fixes freesector logic error when sectorsPerBlk=256,
adds DEBUGASSERT for invalid geometry and additional memory debug
logic. Also fixes the dangling pointer on error bug. From Ken
Pettit (2016-07-14).
Documentation/NuttShell.html
+2 -2
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@@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4">
<td>
<h1><big><font color="#3c34ec"><i>NuttShell (NSH)</i></font></big></h1>
<p>Last Updated: February 8, 2016</p>
<p>Last Updated: July 20, 2016</p>
</td>
</tr>
</table>
@@ -3277,7 +3277,7 @@ nsh&gt;
</tr>
<tr>
<td><b><code>mkfifo</code></b></td>
<td><code>CONFIG_NFILE_DESCRIPTORS</code> &gt; 0</td>
<td><code>CONFIG_NFILE_DESCRIPTORS</code> &gt; 0 &amp;&amp; <code>CONFIG_PIPES</code></td>
<td><code>CONFIG_NSH_DISABLE_MKFIFO</code></td>
</tr>
<tr>
Documentation/NuttxPortingGuide.html
+2 -2
View File
@@ -4439,7 +4439,7 @@ void board_autoled_off(int led);
</p>
<ul>
<li><b>Interface Definition</b>.
The header file for the NuttX PWM driver reside at <code>include/nuttx/pwm.h</code>.
The header file for the NuttX PWM driver reside at <code>include/nuttx/drivers/pwm.h</code>.
This header file includes both the application level interface to the PWM driver as well as the interface between the &quot;upper half&quot; and &quot;lower half&quot; drivers.
The PWM module uses a standard character driver framework.
However, since the PWM driver is a devices control interface and not a data transfer interface,
@@ -4472,7 +4472,7 @@ void board_autoled_off(int led);
</p>
<ul>
<li><b>Interface Definition</b>.
The header file for the NuttX CAN driver reside at <code>include/nuttx/can.h</code>.
The header file for the NuttX CAN driver resides at <code>include/nuttx/drivers/can.h</code>.
This header file includes both the application level interface to the CAN driver as well as the interface between the &quot;upper half&quot; and &quot;lower half&quot; drivers.
The CAN module uses a standard character driver framework.
</li>
Kconfig
+4 -4
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@@ -339,10 +339,10 @@ config ARCH_MATH_H
default n
---help---
There is also a re-directing version of math.h in the source tree.
However, it resides out-of-the-way at include/nuttx/math.h because it
However, it resides out-of-the-way at include/nuttx/lib/math.h because it
conflicts too often with the system math.h. If ARCH_MATH_H=y is
defined, however, the top-level makefile will copy the redirecting
math.h header file from include/nuttx/math.h to include/math.h. math.h
math.h header file from include/nuttx/lib/math.h to include/math.h. math.h
will then include the architecture-specific version of math.h that you
must provide at nuttx/arch/>architecture</include/math.h.
@@ -371,7 +371,7 @@ config ARCH_STDARG_H
default n
---help---
There is also a redirecting version of stdarg.h in the source tree
as well. It also resides out-of-the-way at include/nuttx/stdarg.h.
as well. It also resides out-of-the-way at include/nuttx/lib/stdarg.h.
This is because you should normally use your toolchain's stdarg.h
file. But sometimes, your toolchain's stdarg.h file may have other
header file dependencies and so may not be usable in the NuttX build
@@ -379,7 +379,7 @@ config ARCH_STDARG_H
specific stdarg.h header file at nuttx/arch/<architecture>/include/stdarg.h
If ARCH_STDARG_H=y is defined, the top-level makefile will copy the
re-directing stdarg.h header file from include/nuttx/stdarg.h to
re-directing stdarg.h header file from include/nuttx/lib/stdarg.h to
include/stdarg.h. So for the architectures that cannot use their
toolchain's stdarg.h file, they can use this alternative by defining
ARCH_STDARG_H=y and providing. If ARCH_STDARG_H, is not defined, then
Makefile.unix
+11 -11
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@@ -183,16 +183,16 @@ BIN = nuttx$(EXEEXT)
all: $(BIN)
.PHONY: context clean_context check_context export subdir_clean clean subdir_distclean distclean apps_clean apps_distclean
# Target used to copy include/nuttx/math.h. If CONFIG_ARCH_MATH_H is
# Target used to copy include/nuttx/lib/math.h. If CONFIG_ARCH_MATH_H is
# defined, then there is an architecture specific math.h header file
# that will be included indirectly from include/math.h. But first, we
# have to copy math.h from include/nuttx/. to include/. Logic within
# include/nuttx/math.h will hand the redirection to the architecture-
# include/nuttx/lib/math.h will hand the redirection to the architecture-
# specific math.h header file.
#
# If the CONFIG_LIBM is defined, the Rhombus libm will be built at libc/math.
# Definitions and prototypes for the Rhombus libm are also contained in
# include/nuttx/math.h and so the file must also be copied in that case.
# include/nuttx/lib/math.h and so the file must also be copied in that case.
#
# If neither CONFIG_ARCH_MATH_H nor CONFIG_LIBM is defined, then no math.h
# header file will be provided. You would want that behavior if (1) you
@@ -208,8 +208,8 @@ endif
endif
ifeq ($(NEED_MATH_H),y)
include/math.h: include/nuttx/math.h
$(Q) cp -f include/nuttx/math.h include/math.h
include/math.h: include/nuttx/lib/math.h
$(Q) cp -f include/nuttx/lib/math.h include/math.h
else
include/math.h:
endif
@@ -221,20 +221,20 @@ endif
# the settings in this float.h are actually correct for your platform!
ifeq ($(CONFIG_ARCH_FLOAT_H),y)
include/float.h: include/nuttx/float.h
$(Q) cp -f include/nuttx/float.h include/float.h
include/float.h: include/nuttx/lib/float.h
$(Q) cp -f include/nuttx/lib/float.h include/float.h
else
include/float.h:
endif
# Target used to copy include/nuttx/stdarg.h. If CONFIG_ARCH_STDARG_H is
# Target used to copy include/nuttx/lib/stdarg.h. If CONFIG_ARCH_STDARG_H is
# defined, then there is an architecture specific stdarg.h header file
# that will be included indirectly from include/stdarg.h. But first, we
# that will be included indirectly from include/lib/stdarg.h. But first, we
# have to copy stdarg.h from include/nuttx/. to include/.
ifeq ($(CONFIG_ARCH_STDARG_H),y)
include/stdarg.h: include/nuttx/stdarg.h
$(Q) cp -f include/nuttx/stdarg.h include/stdarg.h
include/stdarg.h: include/nuttx/lib/stdarg.h
$(Q) cp -f include/nuttx/lib/stdarg.h include/stdarg.h
else
include/stdarg.h:
endif
README.txt
+2 -2
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@@ -321,13 +321,13 @@ Notes about Header Files
If you have a custom, architecture specific math.h header file, then
that header file should be placed at arch/<cpu>/include/math.h. There
is a stub math.h header file located at include/nuttx/math.h. This stub
is a stub math.h header file located at include/nuttx/lib/math.h. This stub
header file can be used to "redirect" the inclusion to an architecture-
specific math.h header file. If you add an architecture specific math.h
header file then you should also define CONFIG_ARCH_MATH_H=y in your
NuttX Configuration file. If CONFIG_ARCH_MATH_H is selected, then the
top-level Makefile will copy the stub math.h header file from
include/nuttx/math.h to include/math.h where it will become the system
include/nuttx/lib/math.h to include/math.h where it will become the system
math.h header file. The stub math.h header file does nothing other
than to include that architecture-specific math.h header file as the
system math.h header file.
TODO
+11 -1
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@@ -1,4 +1,4 @@
NuttX TODO List (Last updated July 3, 2016)
NuttX TODO List (Last updated July 20, 2016)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This file summarizes known NuttX bugs, limitations, inconsistencies with
@@ -447,6 +447,7 @@ o Kernel/Protected Build
mkfatfs mkfatfs
mkrd ramdisk_register()
ping icmp_ping()
mount foreach_mountpoint()
The busybox mkfatfs does not involve any OS calls; it does
its job by simply opening the block driver (using open/xopen)
@@ -1399,6 +1400,15 @@ o File system / Generic drivers (fs/, drivers/)
socket structures. There really should be one array that
is a union of file and socket descriptors. Then socket and
file descriptors could lie in the same range.
Another example of how the current implementation limits
functionality: I recently started an implement of the FILEMAX
(using pctl() instead sysctl()). My objective was to be able
to control the number of available file descriptors on a task-
by-task basis. The complexity due to the partitioning of
desciptor space in a range for file descriptors and a range
for socket descriptors made this feature nearly impossible to
implement.
Status: Open
Priority: Low
arch/arm/include/lpc17xx/lpc176x_irq.h
+1 -1
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@@ -147,7 +147,7 @@
* 42
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
# define LPC17_VALID_GPIOINT0 (0x7fff8ffful) /* GPIO port 0 interrupt set */
# define LPC17_VALID_GPIOINT2 (0x00003ffful) /* GPIO port 2 interrupt set */
arch/arm/include/lpc17xx/lpc178x_irq.h
+1 -1
View File
@@ -166,7 +166,7 @@
* 42
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
# define LPC17_VALID_GPIOINT0 (0xfffffffful) /* GPIO port 0 interrupt set */
# define LPC17_VALID_GPIOINT2 (0xfffffffful) /* GPIO port 2 interrupt set */
arch/arm/include/samdl/samd20_irq.h
+1 -1
View File
@@ -81,7 +81,7 @@
/* GPIO interrupts. Up to 16 pins may be configured to support interrupts */
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAMDL_GPIOIRQ
# define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */
# define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */
# define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */
arch/arm/include/samdl/samd21_irq.h
+1 -1
View File
@@ -88,7 +88,7 @@
/* GPIO interrupts. Up to 16 pins may be configured to support interrupts */
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAMDL_GPIOIRQ
# define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */
# define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */
# define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */
arch/arm/include/samdl/saml21_irq.h
+1 -1
View File
@@ -89,7 +89,7 @@
/* GPIO interrupts. Up to 16 pins may be configured to support interrupts */
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAMDL_GPIOIRQ
# define SAM_IRQ_EXTINT0 (SAM_IRQ_NIRQS+0) /* External interrupt 0 */
# define SAM_IRQ_EXTINT1 (SAM_IRQ_NIRQS+1) /* External interrupt 1 */
# define SAM_IRQ_EXTINT2 (SAM_IRQ_NIRQS+2) /* External interrupt 2 */
arch/arm/src/armv7-r/arm_doirq.c
-16
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@@ -52,22 +52,6 @@
#include "group/group.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/common/up_initialize.c
+26 -18
View File
@@ -44,14 +44,16 @@
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/sched_note.h>
#include <nuttx/fs/fs.h>
#include <nuttx/drivers/drivers.h>
#include <nuttx/fs/loop.h>
#include <nuttx/net/loopback.h>
#include <nuttx/net/tun.h>
#include <nuttx/net/telnet.h>
#include <nuttx/syslog/syslog.h>
#include <nuttx/syslog/syslog_console.h>
#include <nuttx/serial/pty.h>
#include <nuttx/crypto/crypto.h>
#include <nuttx/power/pm.h>
#include <arch/board/board.h>
@@ -158,21 +160,21 @@ void up_initialize(void)
up_irqinitialize();
#ifdef CONFIG_PM
/* Initialize the power management subsystem. This MCU-specific function
* must be called *very* early in the initialization sequence *before* any
* other device drivers are initialized (since they may attempt to register
* with the power management subsystem).
*/
#ifdef CONFIG_PM
up_pminitialize();
#endif
#ifdef CONFIG_ARCH_DMA
/* Initialize the DMA subsystem if the weak function up_dmainitialize has been
* brought into the build
*/
#ifdef CONFIG_ARCH_DMA
#ifdef CONFIG_HAVE_WEAKFUNCTIONS
if (up_dmainitialize)
#endif
@@ -196,6 +198,14 @@ void up_initialize(void)
devnull_register(); /* Standard /dev/null */
#endif
#if defined(CONFIG_DEV_RANDOM)
devrandom_register(); /* Standard /dev/random */
#endif
#if defined(CONFIG_DEV_URANDOM)
devurandom_register(); /* Standard /dev/urandom */
#endif
#if defined(CONFIG_DEV_ZERO)
devzero_register(); /* Standard /dev/zero */
#endif
@@ -228,22 +238,10 @@ void up_initialize(void)
ramlog_consoleinit();
#endif
/* Initialize the HW crypto and /dev/crypto */
#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_PSEUDOTERM_SUSV1)
/* Register the master pseudo-terminal multiplexor device */
#if defined(CONFIG_CRYPTO)
up_cryptoinitialize();
#endif
#if CONFIG_NFILE_DESCRIPTORS > 0
#if defined(CONFIG_CRYPTO_CRYPTODEV)
devcrypto_register();
#endif
#endif
/* Initialize the Random Number Generator (RNG) */
#ifdef CONFIG_DEV_RANDOM
up_rnginitialize();
(void)ptmx_register();
#endif
/* Early initialization of the system logging device. Some SYSLOG channel
@@ -253,6 +251,16 @@ void up_initialize(void)
syslog_initialize(SYSLOG_INIT_EARLY);
#if defined(CONFIG_CRYPTO)
/* Initialize the HW crypto and /dev/crypto */
up_cryptoinitialize();
#endif
#if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_CRYPTO_CRYPTODEV)
devcrypto_register();
#endif
#ifndef CONFIG_NETDEV_LATEINIT
/* Initialize the network */
arch/arm/src/common/up_internal.h
-6
View File
@@ -545,12 +545,6 @@ void up_usbuninitialize(void);
# define up_usbuninitialize()
#endif
/* Random Number Generator (RNG) ********************************************/
#ifdef CONFIG_DEV_RANDOM
void up_rnginitialize(void);
#endif
/* Debug ********************************************************************/
#ifdef CONFIG_STACK_COLORATION
void up_stack_color(FAR void *stackbase, size_t nbytes);
arch/arm/src/efm32/efm32_clockconfig.c
-3
View File
@@ -909,9 +909,6 @@ static inline void efm32_itm_syslog(void)
efm32_enable_auxhfrco();
/* Then perform ARMv7-M ITM SYSLOG initialization */
itm_syslog_initialize();
}
#else
# define efm32_itm_syslog()
arch/arm/src/efm32/efm32_irq.c
+2 -12
View File
@@ -93,10 +93,6 @@ volatile uint32_t *g_current_regs[1];
extern uint32_t _vectors[];
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -261,15 +257,9 @@ static int efm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
{
if (irq < NR_VECTORS)
{
n = irq - EFM32_IRQ_INTERRUPTS;
n = irq - EFM32_IRQ_INTERRUPTS;
*regaddr = NVIC_IRQ_ENABLE(n) + offset;
while (n >= 32)
{
n -= 32;
}
*bit = 1 << n;
*bit = (uint32_t)1 << (n & 0x1f);
}
else
{
arch/arm/src/efm32/efm32_pwm.c
+1 -1
View File
@@ -47,7 +47,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <nuttx/drivers/pwm.h>
#include <arch/board/board.h>
#include "up_arch.h"
arch/arm/src/efm32/efm32_pwm.h
+1 -1
View File
@@ -39,7 +39,7 @@
/* The EFM32 does not have dedicated PWM hardware. Rather, pulsed output
* control is a capability of the EFM32 timers. The logic in this file
* implements the lower half of the standard, NuttX PWM interface using the
* EFM32 timers. That interface is described in include/nuttx/pwm.h.
* EFM32 timers. That interface is described in include/nuttx/drivers/pwm.h.
*/
/****************************************************************************
arch/arm/src/efm32/efm32_start.c
+6
View File
@@ -275,6 +275,12 @@ void __start(void)
showprogress('C');
#ifdef CONFIG_ARMV7M_ITMSYSLOG
/* Perform ARMv7-M ITM SYSLOG initialization */
itm_syslog_initialize();
#endif
/* Perform early serial initialization */
up_earlyserialinit();
arch/arm/src/kinetis/Kconfig
+2 -9
View File
@@ -483,12 +483,12 @@ config KINETIS_FTM2_CHANNEL
menu "Kinetis GPIO Interrupt Configuration"
config GPIO_IRQ
config KINETIS_GPIOIRQ
bool "GPIO pin interrupts"
---help---
Enable support for interrupting GPIO pins
if GPIO_IRQ
if KINETIS_GPIOIRQ
config KINETIS_PORTAINTS
bool "GPIOA interrupts"
@@ -615,13 +615,6 @@ config KINETIS_SD4BIT_FREQ
Frequency to use for transferring data to/from an SD card using all four data lines.
endif
config KINETIS_SDHC_DMAPRIO
int "SDHC DMA priority"
depends on SDIO_DMA
---help---
SDHC DMA priority
endmenu # Kinetis SDHC Configuration
menu "Kinetis UART Configuration"
arch/arm/src/kinetis/Make.defs
+1 -1
View File
@@ -103,7 +103,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += kinetis_userspace.c kinetis_mpuinit.c
endif
ifeq ($(CONFIG_GPIO_IRQ),y)
ifeq ($(CONFIG_KINETIS_GPIOIRQ),y)
CHIP_CSRCS += kinetis_pinirq.c
endif
arch/arm/src/kinetis/chip/kinetis_k60memorymap.h
+2 -2
View File
@@ -44,7 +44,7 @@
#include "chip.h"
#ifdef KINETIS_K64
#ifdef KINETIS_K60
/************************************************************************************
* Pre-processor Definitions
@@ -192,5 +192,5 @@
* Public Functions
************************************************************************************/
#endif /* KINETIS_K64 */
#endif /* KINETIS_K60 */
#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K60MEMORYMAP_H */
arch/arm/src/kinetis/kinetis.h
+3 -3
View File
@@ -476,7 +476,7 @@ bool kinetis_gpioread(uint32_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KINETIS_GPIOIRQ
void kinetis_pinirqinitialize(void);
#else
# define kinetis_pinirqinitialize()
@@ -514,7 +514,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KINETIS_GPIOIRQ
void kinetis_pinirqenable(uint32_t pinset);
#else
# define kinetis_pinirqenable(pinset)
@@ -528,7 +528,7 @@ void kinetis_pinirqenable(uint32_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KINETIS_GPIOIRQ
void kinetis_pinirqdisable(uint32_t pinset);
#else
# define kinetis_pinirqdisable(pinset)
arch/arm/src/kinetis/kinetis_clockconfig.c
+2 -2
View File
@@ -39,8 +39,6 @@
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "kinetis.h"
@@ -50,6 +48,8 @@
#include "chip/kinetis_llwu.h"
#include "chip/kinetis_pinmux.h"
#include <arch/board/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
arch/arm/src/kinetis/kinetis_enet.c
+1 -1
View File
@@ -1840,7 +1840,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
phydata = 0xffff;
ret = kinetis_readmii(priv, phyaddr, MII_PHYID1, &phydata);
}
while (ret >= 0 && phydata == 0xffff && ++retries < 3);
while ((ret < 0 || phydata == 0xffff) && ++retries < 3);
/* If we successfully read anything then break out, using this PHY address */
arch/arm/src/kinetis/kinetis_irq.c
+1 -1
View File
@@ -439,7 +439,7 @@ void up_irqinitialize(void)
* configured pin interrupts.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KINETIS_GPIOIRQ
kinetis_pinirqinitialize();
#endif
arch/arm/src/kinetis/kinetis_pinirq.c
+2 -2
View File
@@ -52,7 +52,7 @@
#include "kinetis.h"
#include "chip/kinetis_port.h"
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KINETIS_GPIOIRQ
/****************************************************************************
* Pre-processor Definitions
@@ -450,4 +450,4 @@ void kinetis_pinirqdisable(uint32_t pinset)
}
#endif /* HAVE_PORTINTS */
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_KINETIS_GPIOIRQ */
arch/arm/src/kinetis/kinetis_pwm.c
+1 -1
View File
@@ -49,7 +49,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <nuttx/drivers/pwm.h>
#include <arch/board/board.h>
#include "up_internal.h"
arch/arm/src/kinetis/kinetis_sdhc.c
+1 -5
View File
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_sdhc.c
*
* Copyright (C) 2011-2012, 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -85,10 +85,6 @@
# define CONFIG_KINETIS_SDHC_PRIO NVIC_SYSH_PRIORITY_DEFAULT
#endif
#ifndef CONFIG_KINETIS_SDHC_DMAPRIO
# define CONFIG_KINETIS_SDHC_DMAPRIO DMA_CCR_PRIMED
#endif
#ifndef CONFIG_DEBUG_MEMCARD_INFO
# undef CONFIG_SDIO_XFRDEBUG
#endif
arch/arm/src/kinetis/kinetis_usbdev.c
+3 -1
View File
@@ -2738,7 +2738,7 @@ static int khci_interrupt(int irq, void *context)
#ifdef CONFIG_USBOTG
/* Session Request Protocol (SRP) Time Out Check */
/* if USB OTG SRP is ready */
/* Check if USB OTG SRP is ready */
# warning "Missing logic"
{
/* Check if the 1 millisecond timer has expired */
@@ -2960,6 +2960,8 @@ x
}
}
UNUSED(otgir); /* May not be used, depending on above conditional logic */
/* Clear the pending USB interrupt. Goto is used in the above to assure
* that all interrupt exists pass through this logic.
*/
arch/arm/src/kl/Kconfig
+2 -2
View File
@@ -345,12 +345,12 @@ config KL_TPM2_CHANNEL
comment "Kinetis GPIO Interrupt Configuration"
config GPIO_IRQ
config KL_GPIOIRQ
bool "GPIO pin interrupts"
---help---
Enable support for interrupting GPIO pins
if GPIO_IRQ
if KL_GPIOIRQ
config KL_PORTAINTS
bool "GPIOA interrupts"
arch/arm/src/kl/Make.defs
+1 -1
View File
@@ -81,7 +81,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += kl_userspace.c
endif
ifeq ($(CONFIG_GPIO_IRQ),y)
ifeq ($(CONFIG_KL_GPIOIRQ),y)
CHIP_CSRCS += kl_gpioirq.c
endif
arch/arm/src/kl/kl_gpio.h
+2 -2
View File
@@ -386,7 +386,7 @@ xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KL_GPIOIRQ
void kl_gpioirqenable(uint32_t pinset);
#else
# define kl_gpioirqenable(pinset)
@@ -400,7 +400,7 @@ void kl_gpioirqenable(uint32_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KL_GPIOIRQ
void kl_gpioirqdisable(uint32_t pinset);
#else
# define kl_gpioirqdisable(pinset)
arch/arm/src/kl/kl_gpioirq.c
+2 -2
View File
@@ -51,7 +51,7 @@
#include "chip/kl_port.h"
#include "kl_gpio.h"
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KL_GPIOIRQ
/****************************************************************************
* Pre-processor Definitions
@@ -396,4 +396,4 @@ void kl_gpioirqdisable(uint32_t pinset)
}
#endif /* HAVE_PORTINTS */
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_KL_GPIOIRQ */
arch/arm/src/kl/kl_irq.c
+1 -1
View File
@@ -248,7 +248,7 @@ void up_irqinitialize(void)
* configured pin interrupts.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_KL_GPIOIRQ
kl_gpioirqinitialize();
#endif
arch/arm/src/kl/kl_pwm.c
+1 -1
View File
@@ -48,7 +48,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <nuttx/drivers/pwm.h>
#include <arch/board/board.h>
#include "up_internal.h"
arch/arm/src/lpc11xx/Kconfig
+1 -1
View File
@@ -237,7 +237,7 @@ config CAN_REGDEBUG
endmenu
config GPIO_IRQ
config LPC11_GPIOIRQ
bool "GPIO interrupt support"
default n
---help---
arch/arm/src/lpc11xx/Make.defs
+1 -1
View File
@@ -84,7 +84,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
CHIP_CSRCS += lpc11_userspace.c
endif
ifeq ($(CONFIG_GPIO_IRQ),y)
ifeq ($(CONFIG_LPC11_GPIOIRQ),y)
CHIP_CSRCS += lpc11_gpioint.c
endif
arch/arm/src/lpc11xx/lpc111x_gpio.c
+5 -5
View File
@@ -79,7 +79,7 @@
* actually set up to interrupt until the interrupt is enabled.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
uint64_t g_intedge0;
uint64_t g_intedge2;
#endif
@@ -295,7 +295,7 @@ static int lpc11_pullup(lpc11_pinset_t cfgset, unsigned int port,
*
****************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
static void lpc11_setintedge(unsigned int port, unsigned int pin,
unsigned int value)
{
@@ -323,7 +323,7 @@ static void lpc11_setintedge(unsigned int port, unsigned int pin,
*intedge &= ~((uint64_t)3 << shift);
*intedge |= ((uint64_t)value << shift);
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_LPC11_GPIOIRQ */
/****************************************************************************
* Name: lpc11_setopendrain
@@ -453,7 +453,7 @@ static inline int lpc11_configinput(lpc11_pinset_t cfgset, unsigned int port,
/* Forget about any falling/rising edge interrupt enabled */
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
lpc11_setintedge(port, pin, 0);
#endif
}
@@ -495,7 +495,7 @@ static inline int lpc11_configinterrupt(lpc11_pinset_t cfgset, unsigned int port
/* Then just remember the rising/falling edge interrupt enabled */
DEBUGASSERT(port == 0 || port == 2);
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
lpc11_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT);
#endif
return OK;
arch/arm/src/lpc11xx/lpc11_gpio.h
+4 -4
View File
@@ -88,7 +88,7 @@ extern "C"
* lpc11_gpioint.c, and lpc11_gpiodbg.c
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
EXTERN uint64_t g_intedge0;
EXTERN uint64_t g_intedge2;
#endif
@@ -108,7 +108,7 @@ EXTERN const uint32_t g_intbase[GPIO_NPORTS];
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
void lpc11_gpioirqinitialize(void);
#else
# define lpc11_gpioirqinitialize()
@@ -152,7 +152,7 @@ bool lpc11_gpioread(lpc11_pinset_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
void lpc11_gpioirqenable(int irq);
#else
# define lpc11_gpioirqenable(irq)
@@ -166,7 +166,7 @@ void lpc11_gpioirqenable(int irq);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
void lpc11_gpioirqdisable(int irq);
#else
# define lpc11_gpioirqdisable(irq)
arch/arm/src/lpc11xx/lpc11_gpioint.c
+2 -2
View File
@@ -51,7 +51,7 @@
#include "chip.h"
#include "lpc11_gpio.h"
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
/****************************************************************************
* Pre-processor Definitions
@@ -543,5 +543,5 @@ void lpc11_gpioirqdisable(int irq)
}
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_LPC11_GPIOIRQ */
arch/arm/src/lpc11xx/lpc11_irq.c
+1 -1
View File
@@ -244,7 +244,7 @@ void up_irqinitialize(void)
* configured pin interrupts.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC11_GPIOIRQ
lpc11_gpioirqinitialize();
#endif
arch/arm/src/lpc11xx/lpc11_timer.c
+1 -1
View File
@@ -47,7 +47,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <nuttx/drivers/pwm.h>
#include <arch/board/board.h>
#include "up_internal.h"
arch/arm/src/lpc17xx/Kconfig
+1 -1
View File
@@ -604,7 +604,7 @@ config LPC17_CAN_REGDEBUG
endmenu
config GPIO_IRQ
config LPC17_GPIOIRQ
bool "GPIO interrupt support"
default n
---help---
arch/arm/src/lpc17xx/Make.defs
+1 -1
View File
@@ -133,7 +133,7 @@ ifeq ($(CONFIG_LPC17_EMC),y)
CHIP_CSRCS += lpc17_emc.c
endif
ifeq ($(CONFIG_GPIO_IRQ),y)
ifeq ($(CONFIG_LPC17_GPIOIRQ),y)
CHIP_CSRCS += lpc17_gpioint.c
endif
arch/arm/src/lpc17xx/lpc176x_gpio.c
+5 -5
View File
@@ -78,7 +78,7 @@
* actually set up to interrupt until the interrupt is enabled.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
uint64_t g_intedge0;
uint64_t g_intedge2;
#endif
@@ -300,7 +300,7 @@ static int lpc17_pullup(lpc17_pinset_t cfgset, unsigned int port,
*
****************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
static void lpc17_setintedge(unsigned int port, unsigned int pin,
unsigned int value)
{
@@ -328,7 +328,7 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin,
*intedge &= ~((uint64_t)3 << shift);
*intedge |= ((uint64_t)value << shift);
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_LPC17_GPIOIRQ */
/****************************************************************************
* Name: lpc17_setopendrain
@@ -412,7 +412,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port, un
/* Forget about any falling/rising edge interrupt enabled */
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
lpc17_setintedge(port, pin, 0);
#endif
}
@@ -453,7 +453,7 @@ static inline int lpc17_configinterrupt(lpc17_pinset_t cfgset, unsigned int port
/* Then just remember the rising/falling edge interrupt enabled */
DEBUGASSERT(port == 0 || port == 2);
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
lpc17_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT);
#endif
return OK;
arch/arm/src/lpc17xx/lpc178x_gpio.c
+5 -5
View File
@@ -79,7 +79,7 @@
* actually set up to interrupt until the interrupt is enabled.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
uint64_t g_intedge0;
uint64_t g_intedge2;
#endif
@@ -526,7 +526,7 @@ static void lpc17_setpullup(lpc17_pinset_t cfgset, unsigned int port,
*
****************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
static void lpc17_setintedge(unsigned int port, unsigned int pin,
unsigned int value)
{
@@ -554,7 +554,7 @@ static void lpc17_setintedge(unsigned int port, unsigned int pin,
*intedge &= ~((uint64_t)3 << shift);
*intedge |= ((uint64_t)value << shift);
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_LPC17_GPIOIRQ */
/****************************************************************************
* Name: lpc17_configinput
@@ -601,7 +601,7 @@ static inline int lpc17_configinput(lpc17_pinset_t cfgset, unsigned int port,
/* Forget about any falling/rising edge interrupt enabled */
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
lpc17_setintedge(port, pin, 0);
#endif
}
@@ -656,7 +656,7 @@ static inline int lpc17_configinterrupt(lpc17_pinset_t cfgset, unsigned int port
/* Then just remember the rising/falling edge interrupt enabled */
DEBUGASSERT(port == 0 || port == 2);
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
lpc17_setintedge(port, pin, (cfgset & GPIO_EDGE_MASK) >> GPIO_EDGE_SHIFT);
#endif
return OK;
arch/arm/src/lpc17xx/lpc17_can.c
+1 -1
View File
@@ -57,7 +57,7 @@
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/can.h>
#include <nuttx/drivers/can.h>
#include "up_internal.h"
#include "up_arch.h"
arch/arm/src/lpc17xx/lpc17_gpio.h
+4 -4
View File
@@ -89,7 +89,7 @@ extern "C"
* lpc17_gpioint.c, and lpc17_gpiodbg.c
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
EXTERN uint64_t g_intedge0;
EXTERN uint64_t g_intedge2;
#endif
@@ -109,7 +109,7 @@ EXTERN const uint32_t g_intbase[GPIO_NPORTS];
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
void lpc17_gpioirqinitialize(void);
#else
# define lpc17_gpioirqinitialize()
@@ -153,7 +153,7 @@ bool lpc17_gpioread(lpc17_pinset_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
void lpc17_gpioirqenable(int irq);
#else
# define lpc17_gpioirqenable(irq)
@@ -167,7 +167,7 @@ void lpc17_gpioirqenable(int irq);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_LPC17_GPIOIRQ
void lpc17_gpioirqdisable(int irq);
#else
# define lpc17_gpioirqdisable(irq)

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