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GP-3211 Added function start patterns, fixed issues with compile, fixed

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issues with .cspec load in 32-bit
This commit is contained in:
emteere
2023-09-07 23:18:11 +00:00
parent f32cee2268
commit 3ad1c1ea29
9 changed files with 71 additions and 47 deletions
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Ghidra/Processors/Loongarch/certification.manifest
+2
View File
@@ -22,3 +22,5 @@ data/languages/lp64f.cspec||GHIDRA||||END|
data/languages/lsx.sinc||GHIDRA||||END|
data/languages/lvz.sinc||GHIDRA||||END|
data/manuals/loongarch.idx||GHIDRA||||END|
data/patterns/loongarch_patterns.xml||GHIDRA||||END|
data/patterns/patternconstraints.xml||GHIDRA||||END|
Ghidra/Processors/Loongarch/data/languages/ilp32d.cspec
+9 -9
View File
@@ -77,7 +77,7 @@
<pentry minsize="1" maxsize="4">
<register name="a7"/>
</pentry>
<pentry minsize="5" maxsize="8">
<pentry minsize="5" maxsize="8">
<addr space="join" piece1="a0" piece2="a1"/>
</pentry>
<pentry minsize="5" maxsize="8">
@@ -143,14 +143,14 @@
<register name="s8"/>
<register name="sp"/>
<register name="fp"/>
<register name="fa24"/>
<register name="fa25"/>
<register name="fa26"/>
<register name="fa27"/>
<register name="fa28"/>
<register name="fa29"/>
<register name="fa30"/>
<register name="fa30"/>
<register name="fs0"/>
<register name="fs1"/>
<register name="fs2"/>
<register name="fs3"/>
<register name="fs4"/>
<register name="fs5"/>
<register name="fs6"/>
<register name="fs7"/>
</unaffected>
</prototype>
</default_proto>
Ghidra/Processors/Loongarch/data/languages/ilp32f.cspec
+17 -32
View File
@@ -29,42 +29,30 @@
<default_proto>
<prototype name="__stdcall" extrapop="0" stackshift="0">
<input>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa0"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa1"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa2"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa3"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa4"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa5"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa6"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa7"/>
</pentry>
<pentry minsize="5" maxsize="8" metatype="float">
<addr space="join" piece1="fa0" piece2="fa1"/>
</pentry>
<pentry minsize="5" maxsize="8" metatype="float">
<addr space="join" piece1="fa2" piece2="fa3"/>
</pentry>
<pentry minsize="5" maxsize="8" metatype="float">
<addr space="join" piece1="fa4" piece2="fa5"/>
</pentry>
<pentry minsize="5" maxsize="8" metatype="float">
<addr space="join" piece1="fa6" piece2="fa7"/>
</pentry>
<pentry minsize="1" maxsize="4">
<register name="a0"/>
</pentry>
@@ -106,10 +94,7 @@
</pentry>
</input>
<output>
<pentry minsize="5" maxsize="8">
<addr space="join" piece1="fa0" piece2="fa1"/>
</pentry>
<pentry minsize="1" maxsize="4" metatype="float">
<pentry minsize="1" maxsize="8" metatype="float">
<register name="fa0"/>
</pentry>
<pentry minsize="1" maxsize="4">
@@ -158,14 +143,14 @@
<register name="s8"/>
<register name="sp"/>
<register name="fp"/>
<register name="fa24"/>
<register name="fa25"/>
<register name="fa26"/>
<register name="fa27"/>
<register name="fa28"/>
<register name="fa29"/>
<register name="fa30"/>
<register name="fa30"/>
<register name="fs0"/>
<register name="fs1"/>
<register name="fs2"/>
<register name="fs3"/>
<register name="fs4"/>
<register name="fs5"/>
<register name="fs6"/>
<register name="fs7"/>
</unaffected>
</prototype>
</default_proto>
Ghidra/Processors/Loongarch/data/languages/loongarch32_f32.slaspec
-1
View File
@@ -3,7 +3,6 @@
@define ADDRSIZE 4
@include "loongarch_main.sinc"
@include "Loongarch32_instructions.sinc"
@include "privileged-32.sinc"
@include "loongarch_float.sinc"
@include "loongarch_double.sinc"
Ghidra/Processors/Loongarch/data/languages/loongarch32_f64.slaspec
-1
View File
@@ -3,7 +3,6 @@
@define ADDRSIZE 4
@include "loongarch_main.sinc"
@include "Loongarch32_instructions.sinc"
@include "privileged-32.sinc"
@include "loongarch_float.sinc"
@include "loongarch_double.sinc"
Ghidra/Processors/Loongarch/data/languages/loongarch64_f32.slaspec
-2
View File
@@ -6,8 +6,6 @@
@include "loongarch_main.sinc"
@include "Loongarch32_instructions.sinc"
@include "Loongarch64_instructions.sinc"
@include "privileged-32.sinc"
@include "privileged-64.sinc"
@include "loongarch_float.sinc"
@include "loongarch_double.sinc"
Ghidra/Processors/Loongarch/data/languages/loongarch64_f64.slaspec
-2
View File
@@ -6,8 +6,6 @@
@include "loongarch_main.sinc"
@include "Loongarch32_instructions.sinc"
@include "Loongarch64_instructions.sinc"
@include "privileged-32.sinc"
@include "privileged-64.sinc"
@include "loongarch_float.sinc"
@include "loongarch_double.sinc"
Ghidra/Processors/Loongarch/data/patterns/loongarch_patterns.xml
+38
View File
@@ -0,0 +1,38 @@
<patternlist>
<patternpairs totalbits="32" postbits="16">
<!-- Higher confidence patterns, after a return and more defined bits -->
<prepatterns>
<data>0x20 0x00 0x00 0x4c</data> <!-- ret -->
</prepatterns>
<postpatterns>
<data>0x63 ......00 111..... 0x02 01100001 .....000 11...... 0x29 </data> <!-- addi.d sp sp,-imm; st.d ra,sp(imm8)-->
<funcstart/>
</postpatterns>
</patternpairs>
<patternpairs totalbits="32" postbits="16">
<!-- Medium confidence, more bits, but prepattern are jumps, not return -->
<prepatterns>
<data> 11111111 ......11 ........ 01010011 </data> <!-- b imm , backwards a small amount -->
<data> 0x80 0x01 0x00 0x4c </data> <!-- jr t0 -->
</prepatterns>
<postpatterns>
<data>0x63 ......00 111..... 0x02 </data> <!-- addi.d sp sp,-imm; -->
<possiblefuncstart/>
</postpatterns>
</patternpairs>
<patternpairs totalbits="32" postbits="16">
<!-- Higher confidence patterns, after a return and more defined bits -->
<prepatterns>
<data>0x20 0x00 0x00 0x4c</data> <!-- ret -->
</prepatterns>
<postpatterns>
<data>0x63 ......00 111..... 0x02 </data> <!-- addi.d sp sp,-imm; -->
<possiblefuncstart/>
</postpatterns>
</patternpairs>
</patternlist>
Ghidra/Processors/Loongarch/data/patterns/patternconstraints.xml
+5
View File
@@ -0,0 +1,5 @@
<patternconstraints>
<language id="Loongarch:LE:*:*">
<patternfile>loongarch_patterns.xml</patternfile>
</language>
</patternconstraints>