mirror of
https://github.com/NationalSecurityAgency/ghidra.git
synced 2026-05-22 10:02:49 +08:00
GP-3211: Moved privileged instructions
This commit is contained in:
ghidorahrex
@@ -21,6 +21,4 @@ data/languages/lp64d.cspec||GHIDRA||||END|
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data/languages/lp64f.cspec||GHIDRA||||END|
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data/languages/lsx.sinc||GHIDRA||||END|
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data/languages/lvz.sinc||GHIDRA||||END|
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data/languages/privileged-32.sinc||GHIDRA||||END|
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data/languages/privileged-64.sinc||GHIDRA||||END|
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data/manuals/loongarch.idx||GHIDRA||||END|
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@@ -1140,4 +1140,186 @@ define pcodeop bstrins.w;
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}
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#########################
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# PRIVILEGED INSTRUCTIONS
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#########################
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#la-privileged-32.txt csrxchg mask=0x04000000 [@primary]
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#0x04000000 0xff000000 r0:5,r5:5,u10:14 ['reg0_5_s0', 'reg5_5_s0', 'imm10_14_s0']
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csr: csr is imm10_14 [csr = $(CSR_OFFSET) + imm10_14 * $(REGSIZE);] {
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export *[register]:$(REGSIZE) csr;
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}
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:csrxchg RD, RJsrc, csr is op24_31=0x4 & RD & RJsrc & csr {
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local csrval:$(REGSIZE) = csr;
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local mask = RJsrc;
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csr = RD & mask;
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RD = csrval & mask;
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}
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:cssrd RD, csr is op24_31=0x4 & RD & op5_9=0 & csr {
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RD = csr;
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}
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:cssrw RD, csr is op24_31=0x4 & RD & op5_9=1 & csr {
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local csrval:$(REGSIZE) = csr;
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csr = RD;
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RD = csrval;
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}
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define pcodeop cacop;
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#la-privileged-32.txt cacop mask=0x06000000 [@orig_fmt=Ud5JSk12, @primary]
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#0x06000000 0xffc00000 u0:5,r5:5,s10:12 ['imm0_5_s0', 'reg5_5_s0', 'simm10_12_s0']
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cache_obj: op0_2 is op0_2 { local tmp:1 = op0_2; export *[const]:1 tmp; }
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op_type: "initialization" is op3_4=0 { export 0:1; }
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op_type: "consistency" is op3_4=1 { export 1:1; }
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op_type: "coherency" is op3_4=2 { export 2:1; }
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op_type: "Custom" is op3_4=3 { export 3:1; }
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:cacop op_type^"("^cache_obj^")", ldst_addr is op22_31=0x18 & cache_obj & op_type & ldst_addr {
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cacop(op_type, cache_obj, ldst_addr);
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}
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define pcodeop lddir;
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level: imm10_8 is imm10_8 { export *[const]:1 imm10_8; }
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#la-privileged-32.txt lddir mask=0x06400000
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#0x06400000 0xfffc0000 r0:5,r5:5,u10:8 ['reg0_5_s0', 'reg5_5_s0', 'imm10_8_s0']
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:lddir RD, RJsrc, level is op18_31=0x190 & RD & RJsrc & level {
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RD = lddir(RJsrc, level);
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}
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define pcodeop ldpte;
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seq: imm10_8 is imm10_8 { export *[const]:1 imm10_8; }
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#la-privileged-32.txt ldpte mask=0x06440000
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#0x06440000 0xfffc001f r5:5,u10:8 ['reg5_5_s0', 'imm10_8_s0']
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:ldpte RJsrc, seq is op18_31=0x191 & op0_4=0x0 & RJsrc & seq {
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ldpte(RJsrc, seq);
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}
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#la-privileged-32.txt iocsrrd.b mask=0x06480000
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#0x06480000 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.b RD, RJsrc is op10_31=0x19200 & RD & RJsrc {
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local val:1 = *[iocsr]:1 RJsrc;
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RD = sext(val);
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}
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#la-privileged-32.txt iocsrrd.h mask=0x06480400
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#0x06480400 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.h RD, RJsrc is op10_31=0x19201 & RD & RJsrc {
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local val:2 = *[iocsr]:2 RJsrc;
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RD = sext(val);
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}
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#la-privileged-32.txt iocsrrd.w mask=0x06480800
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#0x06480800 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.w RD, RJsrc is op10_31=0x19202 & RD & RJsrc {
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local val:4 = *[iocsr]:4 RJsrc;
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RD = sext(val);
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}
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#la-privileged-32.txt iocsrwr.b mask=0x06481000
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#0x06481000 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.b RDsrc, RJsrc is op10_31=0x19204 & RDsrc & RJsrc {
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local val:1 = RDsrc:1;
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*[iocsr]:1 RJsrc = val;
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}
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#la-privileged-32.txt iocsrwr.h mask=0x06481400
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#0x06481400 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.h RDsrc, RJsrc is op10_31=0x19205 & RDsrc & RJsrc {
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local val:2= RDsrc:2;
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*[iocsr]:2 RJsrc = val;
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}
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#la-privileged-32.txt iocsrwr.w mask=0x06481800
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#0x06481800 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.w RDsrc, RJsrc is op10_31=0x19206 & RDsrc & RJsrc {
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local val:4= RDsrc:4;
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*[iocsr]:4 RJsrc = val;
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}
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define pcodeop tlbclr;
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#la-privileged-32.txt tlbclr mask=0x06482000
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#0x06482000 0xffffffff
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:tlbclr is instword=0x06482000 {
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tlbclr();
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}
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define pcodeop tlbflush;
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#la-privileged-32.txt tlbflush mask=0x06482400
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#0x06482400 0xffffffff
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:tlbflush is instword=0x06482400 {
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tlbflush();
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}
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define pcodeop tlbsrch;
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#la-privileged-32.txt tlbsrch mask=0x06482800 [@primary]
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#0x06482800 0xffffffff
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:tlbsrch is instword=0x06482800 {
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tlbsrch();
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}
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define pcodeop tlbrd;
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#la-privileged-32.txt tlbrd mask=0x06482c00 [@primary]
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#0x06482c00 0xffffffff
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:tlbrd is instword=0x06482c00 {
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tlbrd();
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}
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define pcodeop tlbwr;
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#la-privileged-32.txt tlbwr mask=0x06483000 [@primary]
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#0x06483000 0xffffffff
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:tlbwr is instword=0x06483000 {
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tlbwr();
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}
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define pcodeop tlbfill;
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#la-privileged-32.txt tlbfill mask=0x06483400 [@primary]
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#0x06483400 0xffffffff
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:tlbfill is instword=0x06483400 {
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tlbfill();
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}
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define pcodeop ertn;
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#la-privileged-32.txt eret mask=0x06483800 [@orig_name=ertn, @primary]
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#0x06483800 0xffffffff
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:ertn is instword=0x06483800 {
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local ret:$(REGSIZE) = ertn();
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return [ret];
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}
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define pcodeop idle;
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#la-privileged-32.txt idle mask=0x06488000 [@primary]
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#0x06488000 0xffff8000 u0:15 ['imm0_15_s0']
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:idle imm0_15 is op15_31=0xc91 & imm0_15 {
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idle(imm0_15:2);
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}
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define pcodeop invtlb;
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#la-privileged-32.txt tlbinv mask=0x06498000 [@orig_name=invtlb, @orig_fmt=Ud5JK, @primary]
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#0x06498000 0xffff8000 u0:5,r5:5,r10:5 ['imm0_5_s0', 'reg5_5_s0', 'reg10_5_s0']
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:invtlb RJsrc, RKsrc, imm0_5 is op15_31=0xc93 & RJsrc & RKsrc & imm0_5 {
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invtlb(RJsrc, RKsrc, imm0_5:1);
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}
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@@ -740,4 +740,21 @@ define pcodeop crcc.w.d.w;
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}
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#########################
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# PRIVILEGED INSTRUCTIONS
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#########################
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#la-privileged-64.txt iocsrrd.d mask=0x06480c00
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#0x06480c00 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.d RD, RJsrc is op10_31=0x19203 & RD & RJsrc {
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RD = *[iocsr]:8 RJsrc;
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}
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#la-privileged-64.txt iocsrwr.d mask=0x06481c00
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#0x06481c00 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.d RDsrc, RJsrc is op10_31=0x19207 & RDsrc & RJsrc {
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*[iocsr]:8 RJsrc = RDsrc;
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}
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@@ -1,178 +0,0 @@
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#la-privileged-32.txt csrxchg mask=0x04000000 [@primary]
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#0x04000000 0xff000000 r0:5,r5:5,u10:14 ['reg0_5_s0', 'reg5_5_s0', 'imm10_14_s0']
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csr: csr is imm10_14 [csr = $(CSR_OFFSET) + imm10_14 * $(REGSIZE);] {
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export *[register]:$(REGSIZE) csr;
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}
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:csrxchg RD, RJsrc, csr is op24_31=0x4 & RD & RJsrc & csr {
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local csrval:$(REGSIZE) = csr;
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local mask = RJsrc;
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csr = RD & mask;
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RD = csrval & mask;
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}
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:cssrd RD, csr is op24_31=0x4 & RD & op5_9=0 & csr {
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RD = csr;
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}
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:cssrw RD, csr is op24_31=0x4 & RD & op5_9=1 & csr {
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local csrval:$(REGSIZE) = csr;
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csr = RD;
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RD = csrval;
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}
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define pcodeop cacop;
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#la-privileged-32.txt cacop mask=0x06000000 [@orig_fmt=Ud5JSk12, @primary]
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#0x06000000 0xffc00000 u0:5,r5:5,s10:12 ['imm0_5_s0', 'reg5_5_s0', 'simm10_12_s0']
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cache_obj: op0_2 is op0_2 { local tmp:1 = op0_2; export *[const]:1 tmp; }
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op_type: "initialization" is op3_4=0 { export 0:1; }
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op_type: "consistency" is op3_4=1 { export 1:1; }
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op_type: "coherency" is op3_4=2 { export 2:1; }
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op_type: "Custom" is op3_4=3 { export 3:1; }
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:cacop op_type^"("^cache_obj^")", ldst_addr is op22_31=0x18 & cache_obj & op_type & ldst_addr {
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cacop(op_type, cache_obj, ldst_addr);
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}
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define pcodeop lddir;
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level: imm10_8 is imm10_8 { export *[const]:1 imm10_8; }
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#la-privileged-32.txt lddir mask=0x06400000
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#0x06400000 0xfffc0000 r0:5,r5:5,u10:8 ['reg0_5_s0', 'reg5_5_s0', 'imm10_8_s0']
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:lddir RD, RJsrc, level is op18_31=0x190 & RD & RJsrc & level {
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RD = lddir(RJsrc, level);
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}
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define pcodeop ldpte;
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seq: imm10_8 is imm10_8 { export *[const]:1 imm10_8; }
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#la-privileged-32.txt ldpte mask=0x06440000
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#0x06440000 0xfffc001f r5:5,u10:8 ['reg5_5_s0', 'imm10_8_s0']
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:ldpte RJsrc, seq is op18_31=0x191 & op0_4=0x0 & RJsrc & seq {
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ldpte(RJsrc, seq);
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}
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#la-privileged-32.txt iocsrrd.b mask=0x06480000
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#0x06480000 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.b RD, RJsrc is op10_31=0x19200 & RD & RJsrc {
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local val:1 = *[iocsr]:1 RJsrc;
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RD = sext(val);
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}
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#la-privileged-32.txt iocsrrd.h mask=0x06480400
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#0x06480400 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.h RD, RJsrc is op10_31=0x19201 & RD & RJsrc {
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local val:2 = *[iocsr]:2 RJsrc;
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RD = sext(val);
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}
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#la-privileged-32.txt iocsrrd.w mask=0x06480800
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#0x06480800 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrrd.w RD, RJsrc is op10_31=0x19202 & RD & RJsrc {
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local val:4 = *[iocsr]:4 RJsrc;
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RD = sext(val);
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}
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#la-privileged-32.txt iocsrwr.b mask=0x06481000
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#0x06481000 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.b RDsrc, RJsrc is op10_31=0x19204 & RDsrc & RJsrc {
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local val:1 = RDsrc:1;
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*[iocsr]:1 RJsrc = val;
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}
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#la-privileged-32.txt iocsrwr.h mask=0x06481400
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#0x06481400 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.h RDsrc, RJsrc is op10_31=0x19205 & RDsrc & RJsrc {
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local val:2= RDsrc:2;
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*[iocsr]:2 RJsrc = val;
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}
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#la-privileged-32.txt iocsrwr.w mask=0x06481800
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#0x06481800 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
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:iocsrwr.w RDsrc, RJsrc is op10_31=0x19206 & RDsrc & RJsrc {
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local val:4= RDsrc:4;
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*[iocsr]:4 RJsrc = val;
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}
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define pcodeop tlbclr;
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#la-privileged-32.txt tlbclr mask=0x06482000
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#0x06482000 0xffffffff
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:tlbclr is instword=0x06482000 {
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tlbclr();
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}
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define pcodeop tlbflush;
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#la-privileged-32.txt tlbflush mask=0x06482400
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#0x06482400 0xffffffff
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:tlbflush is instword=0x06482400 {
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tlbflush();
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}
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define pcodeop tlbsrch;
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#la-privileged-32.txt tlbsrch mask=0x06482800 [@primary]
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#0x06482800 0xffffffff
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:tlbsrch is instword=0x06482800 {
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tlbsrch();
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}
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define pcodeop tlbrd;
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#la-privileged-32.txt tlbrd mask=0x06482c00 [@primary]
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#0x06482c00 0xffffffff
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:tlbrd is instword=0x06482c00 {
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tlbrd();
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}
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define pcodeop tlbwr;
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#la-privileged-32.txt tlbwr mask=0x06483000 [@primary]
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#0x06483000 0xffffffff
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:tlbwr is instword=0x06483000 {
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tlbwr();
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}
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define pcodeop tlbfill;
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#la-privileged-32.txt tlbfill mask=0x06483400 [@primary]
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#0x06483400 0xffffffff
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:tlbfill is instword=0x06483400 {
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tlbfill();
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}
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define pcodeop ertn;
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#la-privileged-32.txt eret mask=0x06483800 [@orig_name=ertn, @primary]
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#0x06483800 0xffffffff
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:ertn is instword=0x06483800 {
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local ret:$(REGSIZE) = ertn();
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return [ret];
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}
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define pcodeop idle;
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||||
#la-privileged-32.txt idle mask=0x06488000 [@primary]
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||||
#0x06488000 0xffff8000 u0:15 ['imm0_15_s0']
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||||
:idle imm0_15 is op15_31=0xc91 & imm0_15 {
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||||
idle(imm0_15:2);
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||||
}
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||||
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||||
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||||
define pcodeop invtlb;
|
||||
#la-privileged-32.txt tlbinv mask=0x06498000 [@orig_name=invtlb, @orig_fmt=Ud5JK, @primary]
|
||||
#0x06498000 0xffff8000 u0:5,r5:5,r10:5 ['imm0_5_s0', 'reg5_5_s0', 'reg10_5_s0']
|
||||
:invtlb RJsrc, RKsrc, imm0_5 is op15_31=0xc93 & RJsrc & RKsrc & imm0_5 {
|
||||
invtlb(RJsrc, RKsrc, imm0_5:1);
|
||||
}
|
||||
|
||||
|
||||
@@ -1,14 +0,0 @@
|
||||
#la-privileged-64.txt iocsrrd.d mask=0x06480c00
|
||||
#0x06480c00 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
|
||||
:iocsrrd.d RD, RJsrc is op10_31=0x19203 & RD & RJsrc {
|
||||
RD = *[iocsr]:8 RJsrc;
|
||||
}
|
||||
|
||||
|
||||
#la-privileged-64.txt iocsrwr.d mask=0x06481c00
|
||||
#0x06481c00 0xfffffc00 r0:5,r5:5 ['reg0_5_s0', 'reg5_5_s0']
|
||||
:iocsrwr.d RDsrc, RJsrc is op10_31=0x19207 & RDsrc & RJsrc {
|
||||
*[iocsr]:8 RJsrc = RDsrc;
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user