The CoreWing F405 Wing Mini V2 is a compact variant of the
CoreWingF405WingV2. The hwdef inherits from the base target and only
overrides the Mini-specific hardware differences.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
The CoreWing F405 Wing V2 is a fixed-wing and QuadPlane/VTOL flight
controller with an STM32F405 MCU, ICM-42688P or BMI270 IMU, SPA06-003
baro, AT7456E OSD, integrated PDB and a USB extender connector for an
optional BLE/WiFi telemetry module.
Co-authored-by: Henry Wurzburg <hwurzburg@yahoo.com>
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Hardware revision 1 replaces the IIM-42653 with an LSM6DSV32X on the
same SPI1 CS and DRDY pins. Probe both devices so a single firmware
image supports both revisions.
Each of these "define NAME value" lines creates a macro which no code,
script or ChibiOS source references, so they have no effect:
- ALLOW_ARM_NO_GPS (AeroCogito-H7Digital): no such macro (unlike
ALLOW_ARM_NO_COMPASS, which is consumed by AP_Arming_Copter.cpp)
- AP_BATTERY_TIBQ76952_I2C_DEVICE (VM-L431-BMS): driver uses
AP_BATTMON_TIBQ76952_BUS/_ADDR
- AP_COMPASS_IST8308_DEFAULT_ROTATION (GreenSightUltraBlue): no such
macro; rotation comes from the COMPASS line
- HAL_BLHELI_PASSTHROUGH_ENABLED/_UART and
HAL_ESC_TELEMETRY_UART/_ENABLED (NucleoH753ZI): no such macros
- HAL_CAN_ENABLED, HAL_CAN_NUM_DRIVERS (SkyRukh_Surge_H7): obsolete;
CAN interface count is derived from the CAN pin definitions
- HAL_HEATER3_GPIO_PIN, HAL_HEATER4_GPIO_PIN (rFCU): IMU_heater.cpp
only supports HAL_HEATER_GPIO_PIN and HAL_HEATER2_GPIO_PIN
- HAL_BL_IOMCU_FW_DETECT and HAL_IO_FMU_COMMS_TX_DMA_CHANNEL/
_RX_DMA_STREAM/_RX_DMA_CHANNEL (CubeRedSecondary-IO): iofirmware
only consumes HAL_IO_FMU_COMMS_TX_DMA_STREAM and
HAL_IO_FMU_COMMS_TX_IRQ_PRIORITY, which are retained
- HAL_LED_OFF (OrqaH7QuadCore, SkystarsH7HD bootloaders): bootloader
uses HAL_LED_ON and derives off as !HAL_LED_ON
- HAL_BOOTLOADER_NAME, HAL_BOOTLOADER_BOOT_FROM_SDCARD
(PilotGaeaSH7V1-bdshot): no such macros; SD-card boot would be
AP_BOOTLOADER_FLASH_FROM_SD_ENABLED
- HAL_BUZZER_ON (SIMPLIFLYH7): no buzzer-polarity macro exists
- HAL_NEOPIXEL_COUNT (KakuteF4): no such macro; LED count comes from
the NTF_LED_LEN parameter
- VDD_BRICK2_VALID (sparknavi-blue): only meaningful as a pin label,
which this board does not have; as a bare define it does nothing
- HAL_HEATER_MAG_OFFSET_RM3100 (ZeroOneX6): the consuming
HAL_HEATER_MAG_OFFSET define is commented out, and the offset
vector is zero in any case
All affected boards still process cleanly through chibios_hwdef.py.
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Some STM32F4 CMSIS headers omit the unsupported SDIO start-bit error flag. Define it as zero when absent, matching the ChibiOS SDIO driver and allowing DrotekP3Pro builds to compile.
RCOutput_iofirmware.cpp carried a second copy of the decode table, used by
the reversed-channel decoder on STM32F1. That copy is live: PB8 and PA1 are
declared BIDIR on iomcu-f103-dshot, so those channels kept the old
one-in-sixteen false accept rate while the main path was fixed.
Hoist the table, the quintet check and the checksum into one helper so the
two cannot drift again. Removing the duplicate saves 172 bytes on the F103,
which has 8k of flash left.
The GCR decode table used 0 for the sixteen quintets the encoding never emits,
which is indistinguishable from the legitimate 0 at index 25. A corrupt quintet
therefore decoded silently to nibble 0, leaving only the checksum between it and
a bad eRPM - and four bits of checksum let roughly one in sixteen corruptions
through.
Mark the impossible quintets and reject any word containing one. Betaflight
reports 5-8% of frames failing to decode with motors running, so this path is
exercised constantly, and a bad eRPM feeds RPM-referenced harmonic notch
tracking.
Add an early boot service that exports the microSD block device over
USB mass storage before the filesystem and normal flight application
start. The service retains exclusive ownership until a power cycle and
continues servicing the watchdog.
Enable the service on supported boards, provide explicit build control,
increase the MSD worker stacks for the SD wait path, scope the ChibiOS
fixed-width serial warning suppression to the MSD object, and reject
explicit enable requests on unsupported boards.
The shared module inc probed the ICM-45686 at 24MHz, the part's rated
maximum. Every other icm45686 in the tree probes at 2MHz and only steps
up afterwards. The high-speed clock is unchanged at 24MHz.
Pull module-fixed pins (MCU type, oscillator, CAN1, USB, SWD, RMII
Ethernet PHY, on-module SPI3 IMU pads, CAN sleep/shutdown) into
hwdef.inc and hwdef-bl.inc so additional carrier boards built on the
CubeNode H757 module can reuse them without duplicating the module
pinout. The existing CubeNode AP_Periph dat files become thin wrappers
over the shared inc plus their AP_Periph-specific config.
CubeNode-ETH continues to include CubeNode/hwdef.dat unchanged.
The VTX power switch pin is defined with a default OUTPUT level in
hwdef.dat, but was never mirrored into hwdef-bl.dat. Since ChibiOS's own
unconfigured-pin default is INPUT FLOATING, the pin floated for the
entire time each of these boards sat in the bootloader (DFU / SD-card
flashing), even though the main firmware correctly drove it once it
booted. Add the matching line so the VTX power rail has a defined state
throughout.
- AEDROXH7 (PB12 VTX_SW)
- DAKEFPVF405 (PB4 VTX_PWR)
- DAKEFPVH743Pro (PE3 PINIO2)
- FlyFishRCF405 (PC5 PINIO1)
- HWH7 (PE4 VTX_POWER)
- JHEMCUF405WING (PC13 PINIO1)
- LongBowF405WING (PC13 PINIO1)
- OrqaF405Pro (PB9 VTX_SW)
- SIMPLIFLYH7 (PB2 PINIO1)
- SPEDIXH743 (PA2 VTX_SW)
- SpeedyBeeF405WING (PC13 PINIO1)
- speedybeef4v5 (PC13 VTX_PWR)
STM32F405 based board with ICM-42688-P IMU, DPS310 barometer,
MAX7456 OSD, onboard dataflash, 8 PWM outputs, hardware SBUS
inverter on USART2, and USB OTG.
Processing these hwdefs printed "<name> already in defines with same
value". In four of them the board repeats a define it has just taken
from the hwdef it includes:
DAKEFPVH743 DEFAULT_NTF_LED_TYPES from DAKEFPVH743Pro
MatekF765-Wing-bdshot DEFAULT_NTF_LED_TYPES from MatekF765-Wing
SkystarsH7HDv2 AP_MSP_VIDEOTX_ENABLED from SkystarsH7HD-bdshot
TBS_LUCID_H7_WING DEFAULT_NTF_LED_TYPES from TBS_LUCID_H7
and in the other two the same define appears twice in the one file:
sparknavi-blue HAL_WITH_RAMTRON
esp32diy HAL_LOGGING_BACKENDS_DEFAULT
The generated hwdef.h held each of these twice, as an identical
redefinition, and now holds it once; the value reaching the compiler is
unchanged. hw.dat loses the line too, so it and the ROMFS which
embeds it are one line shorter.
Parsed state - defines, intdefines, config, pins and the rest - is
unchanged for all 490 boards.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Three places looped over af_labels asking whether a label named an
alternative function, and none of them used the entry which matched.
str.startswith() takes a tuple of prefixes and does the whole test at
once, so ask it that way instead; two of the three are in
get_alt_function(), which is called for every pin line.
Processing all 443 ChibiOS hwdefs goes from 0.335s to 0.325s. The
parse state of all 490 boards is unchanged.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
valid_type() still ran nine uncompiled re.match() calls for every pin
line, cross-checking the peripheral number in a pin's type against the
one in its label. Compile them once as class members.
Processing all 443 ChibiOS hwdefs goes from 0.35s to 0.32s. The parse
state of all 490 boards is unchanged.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Every line was split into words three times over: once by
process_file() to see whether it was an include line, once by the
HAL-specific process_line(), and once again by the base
process_line() the HAL-specific one delegates to.
Have process_line() take the words the caller has already split out,
and only split in process_file() for lines which could be an include.
That takes the number of splits done to process all 443 ChibiOS hwdefs
from 140374 to 56389, and the time from 0.40s to 0.35s.
The parse state of all 490 boards, and the hwdef.h, ldscript.ld and
hw.dat generated for a sample of 14 boards and their bootloaders, are
unchanged.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
valid_type() rebuilt an 18-entry list of patterns and ran up to 18
uncompiled re.match() calls for every pin line in every hwdef. Compile
the alternation once as a class member instead.
get_mcu_lib() called importlib.import_module() every time, which is
also once per pin line; remember the module we found.
Together these take processing all 443 ChibiOS hwdefs from 0.45s to
0.40s. The parse state of all 490 boards is unchanged.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
shlex is a character-at-a-time lexer written in Python, and it
dominated the cost of processing hwdefs: 65% of the time spent parsing
all 443 ChibiOS hwdefs was inside shlex.split().
Almost no hwdef line needs it. A line containing none of shlex's
special characters, whose whitespace is only spaces and tabs, is split
identically by str.split(); 99.1% of the lines the parser sees qualify.
Take that path when it applies and fall back to shlex otherwise.
Processing all 443 ChibiOS hwdefs goes from 1.39s to 0.45s. The parse
state of all 490 boards, and the hwdef.h, ldscript.ld and hw.dat
generated for a sample of 13 boards and their bootloaders, are
unchanged.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
AP_Periph configures the ZED-F9P from its own parameters at every boot, so
the copy saved into the receiver's flash is never the source of truth. Each
save is a UBX-CFG-CFG sent with no deviceMask, which the receiver applies to
BBR and flash: an erase and program of the whole flash configuration layer.
That write lands 5s or more after startup and only while disarmed, which is
exactly when a unit is likely to be unplugged, and the receiver shares the
board supply so there is no orderly shutdown. A power cut mid-save can leave
the configuration layer corrupt.
Defaulting GPS_SAVE_CFG to 0 keeps the receiver configured from RAM on every
boot and removes the write.
The STM32L4+ port's stm32_isr.c unconditionally includes the
stm32_i2c1..4.inc ISR files, which require STM32_I2C_USE_I2Cx to be
defined. In bootloader builds HAL_USE_I2C is FALSE so hal_i2c_lld.h
(which supplies FALSE defaults) is never included, breaking the
PixFlamingo bootloader build.
Add ifndef-guarded FALSE defaults, matching the STM32G4 fix in
abffee1520.
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
ALLOW_ARM_NO_COMPASS has not had the stated effect since Nov 2019; remove it from
the template output of the betaflight hwdef conversion script.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
ALLOW_ARM_NO_COMPASS was broken by commit 653fad44d4 in Nov 2019
which changed AP_Arming::compass_checks() to call use_for_yaw(0)
instead of use_for_yaw(void). The void version implicitly called
healthy() which caused compass_checks() to return true (pass) when
no compass was present. After that change, compass_checks() proceeds
to call healthy() directly and fails pre-arm even with this define set.
The define has not had the stated effect for over 5 years.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
boards coming in with stale defines. The defines are several versions old, so I don't think it's really worth adding code to enforce no-more-merging of these bad defines.
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