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Changes to px4fmu-v2 for upstream Nuttx and hardfault logging

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This commit is contained in:
David Sidrane
2016-12-12 13:04:56 -10:00
committed by Lorenz Meier
parent 82cb9353d1
commit d9575964a4
16 changed files with 1431 additions and 603 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake/configs/nuttx_px4fmu-v2_default.cmake
+8 -3
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@@ -1,5 +1,7 @@
include(nuttx/px4_impl_nuttx) include(nuttx/px4_impl_nuttx)
px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common)
set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake) set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
set(config_uavcan_num_ifaces 2) set(config_uavcan_num_ifaces 2)
@@ -46,7 +48,7 @@ set(config_module_list
drivers/pwm_input drivers/pwm_input
drivers/camera_trigger drivers/camera_trigger
drivers/bst drivers/bst
#drivers/snapdragon_rc_pwm ##TO FIT drivers/snapdragon_rc_pwm
drivers/lis3mdl drivers/lis3mdl
drivers/iridiumsbd drivers/iridiumsbd
@@ -57,6 +59,7 @@ set(config_module_list
systemcmds/config systemcmds/config
#systemcmds/dumpfile #systemcmds/dumpfile
#systemcmds/esc_calib #systemcmds/esc_calib
systemcmds/hardfault_log
systemcmds/mixer systemcmds/mixer
#systemcmds/motor_ramp #systemcmds/motor_ramp
systemcmds/mtd systemcmds/mtd
@@ -202,11 +205,13 @@ set(config_io_extra_libs
add_custom_target(sercon) add_custom_target(sercon)
set_target_properties(sercon PROPERTIES set_target_properties(sercon PROPERTIES
PRIORITY "SCHED_PRIORITY_DEFAULT" PRIORITY "SCHED_PRIORITY_DEFAULT"
MAIN "sercon" STACK_MAIN "2048" MAIN "sercon"
STACK_MAIN "2048"
COMPILE_FLAGS "-Os") COMPILE_FLAGS "-Os")
add_custom_target(serdis) add_custom_target(serdis)
set_target_properties(serdis PROPERTIES set_target_properties(serdis PROPERTIES
PRIORITY "SCHED_PRIORITY_DEFAULT" PRIORITY "SCHED_PRIORITY_DEFAULT"
MAIN "serdis" STACK_MAIN "2048" MAIN "serdis"
STACK_MAIN "2048"
COMPILE_FLAGS "-Os") COMPILE_FLAGS "-Os")
cmake/configs/nuttx_px4fmu-v2_test.cmake
+8 -3
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@@ -1,5 +1,7 @@
include(nuttx/px4_impl_nuttx) include(nuttx/px4_impl_nuttx)
px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_test)
set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake) set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
set(config_uavcan_num_ifaces 2) set(config_uavcan_num_ifaces 2)
@@ -18,7 +20,7 @@ set(config_module_list
drivers/boards/px4fmu-v2 drivers/boards/px4fmu-v2
drivers/rgbled drivers/rgbled
drivers/mpu6000 drivers/mpu6000
drivers/mpu9250 #TO FIT drivers/mpu9250
drivers/lsm303d drivers/lsm303d
drivers/l3gd20 drivers/l3gd20
drivers/hmc5883 drivers/hmc5883
@@ -56,6 +58,7 @@ set(config_module_list
systemcmds/config systemcmds/config
systemcmds/dumpfile systemcmds/dumpfile
#systemcmds/esc_calib #systemcmds/esc_calib
#TO FIT systemcmds/hardfault_log
systemcmds/mixer systemcmds/mixer
systemcmds/motor_ramp systemcmds/motor_ramp
systemcmds/mtd systemcmds/mtd
@@ -202,9 +205,11 @@ set(config_io_extra_libs
add_custom_target(sercon) add_custom_target(sercon)
set_target_properties(sercon PROPERTIES set_target_properties(sercon PROPERTIES
PRIORITY "SCHED_PRIORITY_DEFAULT" PRIORITY "SCHED_PRIORITY_DEFAULT"
MAIN "sercon" STACK_MAIN "2048") MAIN "sercon" STACK_MAIN "2048"
COMPILE_FLAGS "-Os")
add_custom_target(serdis) add_custom_target(serdis)
set_target_properties(serdis PROPERTIES set_target_properties(serdis PROPERTIES
PRIORITY "SCHED_PRIORITY_DEFAULT" PRIORITY "SCHED_PRIORITY_DEFAULT"
MAIN "serdis" STACK_MAIN "2048") MAIN "serdis" STACK_MAIN "2048"
COMPILE_FLAGS "-Os")
nuttx-configs/px4fmu-v2/Kconfig
+22
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@@ -0,0 +1,22 @@
#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
if ARCH_BOARD_PX4FMU_V2
config BOARD_HAS_PROBES
bool "Board provides GPIO or other Hardware for signaling to timing analyze."
default y
---help---
This board provides GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers.
config BOARD_USE_PROBES
bool "Enable the use the board provided GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers"
default n
depends on BOARD_HAS_PROBES
---help---
Select to use GPIO FMU-CH1-6 to provide timing signals from selected drivers.
endif
nuttx-configs/px4fmu-v2/include/board.h
+108 -50
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@@ -1,5 +1,5 @@
/************************************************************************************ /************************************************************************************
* configs/px4fmu/include/board.h * nuttx-configs/px4fmu-v2/include/board.h
* include/arch/board/board.h * include/arch/board/board.h
* *
* Copyright (C) 2009 Gregory Nutt. All rights reserved. * Copyright (C) 2009 Gregory Nutt. All rights reserved.
@@ -147,11 +147,23 @@
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx. * otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1 * Note: TIM1,8-11 are on APB2, others on APB1
*/ */
#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY) #define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY) #define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
/* SDIO dividers. Note that slower clocking is required when DMA is disabled /* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses * in order to avoid RX overrun/TX underrun errors due to delayed responses
@@ -196,81 +208,127 @@
/* Alternate function pin selections ************************************************/ /* Alternate function pin selections ************************************************/
/* /* UARTs */
* UARTs.
*/
#define GPIO_USART1_RX GPIO_USART1_RX_1 /* console in from IO */
#define GPIO_USART1_TX 0 /* USART1 is RX-only */
#define GPIO_USART2_RX GPIO_USART2_RX_2 #define GPIO_USART1_RX GPIO_USART1_RX_1 /* Console in from IO */
#define GPIO_USART2_TX GPIO_USART2_TX_2 #define GPIO_USART1_TX 0 /* USART1 is RX-only */
#define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART2_CTS GPIO_USART2_CTS_2
#define GPIO_USART3_RX GPIO_USART3_RX_3 #define GPIO_USART2_RX GPIO_USART2_RX_2
#define GPIO_USART3_TX GPIO_USART3_TX_3 #define GPIO_USART2_TX GPIO_USART2_TX_2
#define GPIO_USART3_RTS GPIO_USART3_RTS_2 #define GPIO_USART2_RTS GPIO_USART2_RTS_2
#define GPIO_USART3_CTS GPIO_USART3_CTS_2 #define GPIO_USART2_CTS GPIO_USART2_CTS_2
#define GPIO_UART4_RX GPIO_UART4_RX_1 #define GPIO_USART3_RX GPIO_USART3_RX_3
#define GPIO_UART4_TX GPIO_UART4_TX_1 #define GPIO_USART3_TX GPIO_USART3_TX_3
#define GPIO_USART3_RTS GPIO_USART3_RTS_2
#define GPIO_USART3_CTS GPIO_USART3_CTS_2
#define GPIO_USART6_RX GPIO_USART6_RX_1 #define GPIO_UART4_RX GPIO_UART4_RX_1
#define GPIO_USART6_TX GPIO_USART6_TX_1 #define GPIO_UART4_TX GPIO_UART4_TX_1
#define GPIO_UART7_RX GPIO_UART7_RX_1 #define GPIO_USART6_RX GPIO_USART6_RX_1
#define GPIO_UART7_TX GPIO_UART7_TX_1 #define GPIO_USART6_TX GPIO_USART6_TX_1
#define GPIO_UART7_RX GPIO_UART7_RX_1
#define GPIO_UART7_TX GPIO_UART7_TX_1
/* UART8 has no alternate pin config */ /* UART8 has no alternate pin config */
/* UART RX DMA configurations */ /* UART RX DMA configurations */
#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2 #define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2 #define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
/* /* CAN
* CAN
* *
* CAN1 is routed to the onboard transceiver. * CAN1 is routed to the onboard transceiver.
* CAN2 is routed to the expansion connector. * CAN2 is routed to the expansion connector.
*/ */
#define GPIO_CAN1_RX GPIO_CAN1_RX_3
#define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN2_RX GPIO_CAN2_RX_1
#define GPIO_CAN2_TX GPIO_CAN2_TX_2
/* #define GPIO_CAN1_RX GPIO_CAN1_RX_3
* I2C #define GPIO_CAN1_TX GPIO_CAN1_TX_3
#define GPIO_CAN2_RX GPIO_CAN2_RX_1
#define GPIO_CAN2_TX GPIO_CAN2_TX_2
/* I2C
* *
* The optional _GPIO configurations allow the I2C driver to manually * The optional _GPIO configurations allow the I2C driver to manually
* reset the bus to clear stuck slaves. They match the pin configuration, * reset the bus to clear stuck slaves. They match the pin configuration,
* but are normally-high GPIOs. * but are normally-high GPIOs.
*/ */
#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 #define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 #define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
#define GPIO_I2C2_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10) #define GPIO_I2C1_SCL_GPIO \
#define GPIO_I2C2_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11) (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
/* #define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
* SPI #define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
/* SPI
* *
* There are sensors on SPI1, and SPI2 is connected to the FRAM. * There are sensors on SPI1, and SPI2 is connected to the FRAM.
*/ */
#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz) #define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz) #define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz) #define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
#define GPIO_SPI4_MISO GPIO_SPI4_MISO_1
#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1
#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1
/* LED Definitions. Needed if CONFIG_ARCH_LEDs is defined */
#define LED_STARTED 0
#define LED_HEAPALLOCATE 0
#define LED_IRQSENABLED 0
#define LED_STACKCREATED 1
#define LED_INIRQ 1
#define LED_SIGNAL 1
#define LED_ASSERTION 1
#define LED_PANIC 1
/* Board provides GPIO or other Hardware for signaling to timing analyzer */
#if defined(CONFIG_BOARD_USE_PROBES)
# define PROBE_N(n) (1<<((n)-1))
# define PROBE_1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14)
# define PROBE_2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)
# define PROBE_3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11)
# define PROBE_4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9)
# define PROBE_5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
# define PROBE_6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14)
# define PROBE_INIT(mask) \
do { \
if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
} while(0)
# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0)
# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true)
#else
# define PROBE_INIT(mask)
# define PROBE(n,s)
# define PROBE_MARK(n)
#endif
#define GPIO_SPI4_MISO (GPIO_SPI4_MISO_1|GPIO_SPEED_50MHz)
#define GPIO_SPI4_MOSI (GPIO_SPI4_MOSI_1|GPIO_SPEED_50MHz)
#define GPIO_SPI4_SCK (GPIO_SPI4_SCK_1|GPIO_SPEED_50MHz)
/************************************************************************************ /************************************************************************************
* Public Data * Public Data
nuttx-configs/px4fmu-v2/nsh/Make.defs
+16 -11
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@@ -1,5 +1,5 @@
############################################################################ ############################################################################
# configs/px4fmu-v2/nsh/Make.defs # nuttx-configs/px4fmu-v2/nsh/Make.defs
# #
# Copyright (C) 2011 Gregory Nutt. All rights reserved. # Copyright (C) 2011 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org> # Author: Gregory Nutt <gnutt@nuttx.org>
@@ -35,14 +35,14 @@
include ${TOPDIR}/.config include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk include ${TOPDIR}/tools/Config.mk
include $(TOPDIR)/PX4_Warnings.mk include $(TOPDIR)/PX4_Warnings.mk
include $(TOPDIR)/PX4_Config.mk
# #
# We only support building with the ARM bare-metal toolchain from # We only support building with the ARM bare-metal toolchain from
# https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS. # https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
# #
CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI${HOST_OS_FIRST_LETTER}
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
@@ -62,17 +62,19 @@ ARCHCPUFLAGS = -mcpu=cortex-m4 \
-mfpu=fpv4-sp-d16 \ -mfpu=fpv4-sp-d16 \
-mfloat-abi=hard -mfloat-abi=hard
# Enable precise stack overflow tracking
# enable precise stack overflow tracking
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10 INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
endif endif
# pull in *just* libm from the toolchain ... this is grody # Pull in *just* libm from the toolchain ... this is grody
LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}" LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
EXTRA_LIBS += $(LIBM) EXTRA_LIBS += $(LIBM)
# use our linker script # Use our linker script
LDSCRIPT = ld.script LDSCRIPT = ld.script
ifeq ($(WINTOOL),y) ifeq ($(WINTOOL),y)
@@ -94,18 +96,20 @@ else
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
else else
# Linux/Cygwin-native toolchain # Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps.sh MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif endif
endif endif
# tool versions # Tool versions
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
# optimisation flags # Optimization flags
ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \ ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \
-fno-strict-aliasing \ -fno-strict-aliasing \
-fno-strength-reduce \ -fno-strength-reduce \
@@ -127,7 +131,8 @@ ARCHWARNINGSXX = $(ARCHWARNINGS) $(PX4_ARCHWARNINGSXX)
ARCHDEFINES = ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
# this seems to be the only way to add linker flags # This seems to be the only way to add linker flags
EXTRA_LIBS += --warn-common \ EXTRA_LIBS += --warn-common \
--gc-sections --gc-sections
@@ -146,8 +151,8 @@ OBJEXT = .o
LIBEXT = .a LIBEXT = .a
EXEEXT = EXEEXT =
# Produce partially-linked $1 from files in $2
# produce partially-linked $1 from files in $2
define PRELINK define PRELINK
@echo "PRELINK: $1" @echo "PRELINK: $1"
$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1 $(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1
nuttx-configs/px4fmu-v2/nsh/appconfig
-52
View File
@@ -1,52 +0,0 @@
############################################################################
# configs/px4fmu/nsh/appconfig
#
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
# Path to example in apps/examples containing the user_start entry point
CONFIGURED_APPS += examples/nsh
# The NSH application library
CONFIGURED_APPS += nshlib
CONFIGURED_APPS += system/readline
ifeq ($(CONFIG_CAN),y)
CONFIGURED_APPS += examples/can
endif
#ifeq ($(CONFIG_USBDEV),y)
#ifeq ($(CONFIG_CDCACM),y)
CONFIGURED_APPS += examples/cdcacm
#endif
#endif
nuttx-configs/px4fmu-v2/nsh/defconfig
+708 -234
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File diff suppressed because it is too large Load Diff
nuttx-configs/px4fmu-v2/nsh/setenv.sh
+4 -8
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@@ -1,7 +1,7 @@
#!/bin/bash #!/bin/bash
# configs/stm3240g-eval/nsh/setenv.sh # nuttx-configs/px4fmu-v2/nsh/setenv.sh
# #
# Copyright (C) 2011 Gregory Nutt. All rights reserved. # Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org> # Author: Gregory Nutt <gnutt@nuttx.org>
# #
# Redistribution and use in source and binary forms, with or without # Redistribution and use in source and binary forms, with or without
@@ -47,15 +47,11 @@ if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}" export PATH_ORIG="${PATH}"
fi fi
# This the Cygwin path to the location where I installed the RIDE
# toolchain under windows. You will also have to edit this if you install
# the RIDE toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
# This the Cygwin path to the location where I installed the CodeSourcery # This the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install # toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location # the CodeSourcery toolchain in any other location
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" #export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin
# This the Cygwin path to the location where I build the buildroot # This the Cygwin path to the location where I build the buildroot
# toolchain. # toolchain.
nuttx-configs/px4fmu-v2/scripts/ld.script
+12 -12
View File
@@ -1,5 +1,5 @@
/**************************************************************************** /****************************************************************************
* configs/px4fmu/common/ld.script * nuttx-configs/px4fmu-v2/scripts/ld.script
* *
* Copyright (C) 2011 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
@@ -61,7 +61,7 @@ OUTPUT_ARCH(arm)
ENTRY(__start) /* treat __start as the anchor for dead code stripping */ ENTRY(__start) /* treat __start as the anchor for dead code stripping */
EXTERN(_vectors) /* force the vectors to be included in the output */ EXTERN(_vectors) /* force the vectors to be included in the output */
/* /*
* Ensure that abort() is present in the final object. The exception handling * Ensure that abort() is present in the final object. The exception handling
* code pulled in by libgcc.a requires it (and that code cannot be easily avoided). * code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
*/ */
@@ -73,24 +73,24 @@ SECTIONS
.text : { .text : {
_stext = ABSOLUTE(.); _stext = ABSOLUTE(.);
*(.vectors) *(.vectors)
. = ALIGN(32); . = ALIGN(32);
/* /*
This signature provides the bootloader with a way to delay booting This signature provides the bootloader with a way to delay booting
*/ */
_bootdelay_signature = ABSOLUTE(.); _bootdelay_signature = ABSOLUTE(.);
FILL(0xffecc2925d7d05c5) FILL(0xffecc2925d7d05c5)
. += 8; . += 8;
*(.text .text.*) *(.text .text.*)
*(.fixup) *(.fixup)
*(.gnu.warning) *(.gnu.warning)
*(.rodata .rodata.*) *(.rodata .rodata.*)
*(.gnu.linkonce.t.*) *(.gnu.linkonce.t.*)
*(.got) *(.got)
*(.gcc_except_table) *(.gcc_except_table)
*(.gnu.linkonce.r.*) *(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.); _etext = ABSOLUTE(.);
/* /*
* This is a hack to make the newlib libm __errno() call * This is a hack to make the newlib libm __errno() call
* use the NuttX get_errno_ptr() function. * use the NuttX get_errno_ptr() function.
*/ */
nuttx-configs/px4fmu-v2/src/Makefile
+16 -14
View File
@@ -1,5 +1,4 @@
############################################################################ ############################################################################
# configs/px4fmu/src/Makefile
# #
# Copyright (C) 2011 Gregory Nutt. All rights reserved. # Copyright (C) 2011 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org> # Author: Gregory Nutt <gnutt@nuttx.org>
@@ -35,24 +34,24 @@
-include $(TOPDIR)/Make.defs -include $(TOPDIR)/Make.defs
CFLAGS += -I$(TOPDIR)/sched CFLAGS += -I$(TOPDIR)/sched
ASRCS = ASRCS =
AOBJS = $(ASRCS:.S=$(OBJEXT)) AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = empty.c CSRCS = empty.c
COBJS = $(CSRCS:.c=$(OBJEXT)) COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS) SRCS = $(ASRCS) $(CSRCS)
OBJS = $(AOBJS) $(COBJS) OBJS = $(AOBJS) $(COBJS)
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
ifeq ($(WINTOOL),y) ifeq ($(WINTOOL),y)
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \ CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \ -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
-I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}" -I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
else else
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
endif endif
all: libboard$(LIBEXT) all: libboard$(LIBEXT)
@@ -80,5 +79,8 @@ distclean: clean
$(call DELFILE, Make.dep) $(call DELFILE, Make.dep)
$(call DELFILE, .depend) $(call DELFILE, .depend)
-include Make.dep ifneq ($(BOARD_CONTEXT),y)
context:
endif
-include Make.dep
src/drivers/boards/px4fmu-v2/board_config.h
+32 -29
View File
@@ -47,11 +47,6 @@
#include <nuttx/compiler.h> #include <nuttx/compiler.h>
#include <stdint.h> #include <stdint.h>
#include <stm32.h>
#include <arch/board/board.h>
#define UDID_START 0x1FFF7A10
/**************************************************************************************************** /****************************************************************************************************
* Definitions * Definitions
****************************************************************************************************/ ****************************************************************************************************/
@@ -241,9 +236,9 @@
#define BOARD_NAME "PX4FMU_V2" #define BOARD_NAME "PX4FMU_V2"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC /* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction)
* system_power interface, and therefore provides the true logic * this board support the ADC system_power interface, and therefore
* GPIO BOARD_ADC_xxxx macros. * provides the true logic GPIO BOARD_ADC_xxxx macros.
*/ */
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS)) #define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_VDD_BRICK_VALID)) #define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
@@ -295,30 +290,38 @@ __BEGIN_DECLS
****************************************************************************************************/ ****************************************************************************************************/
extern void stm32_spiinitialize(void); extern void stm32_spiinitialize(void);
extern void board_spi_reset(int ms);
/************************************************************************************
* Name: stm32_spi_bus_initialize
*
* Description:
* Called to configure SPI Buses.
*
************************************************************************************/
extern int stm32_spi_bus_initialize(void);
/****************************************************************************************************
* Name: board_spi_reset board_peripheral_reset
*
* Description:
* Called to reset SPI and the perferal bus
*
****************************************************************************************************/
void board_spi_reset(int ms);
extern void board_peripheral_reset(int ms);
/****************************************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called to configure USB IO.
*
****************************************************************************************************/
extern void stm32_usbinitialize(void); extern void stm32_usbinitialize(void);
extern void board_peripheral_reset(int ms);
/****************************************************************************
* Name: nsh_archinitialize
*
* Description:
* Perform architecture specific initialization for NSH.
*
* CONFIG_NSH_ARCHINIT=y :
* Called from the NSH library
*
* CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
* CONFIG_NSH_ARCHINIT=n :
* Called from board_initialize().
*
****************************************************************************/
#ifdef CONFIG_NSH_LIBRARY
int nsh_archinitialize(void);
#endif
#include "../common/board_common.h" #include "../common/board_common.h"
src/drivers/boards/px4fmu-v2/px4fmu2_init.c
+371 -47
View File
File diff suppressed because it is too large Load Diff
src/drivers/boards/px4fmu-v2/px4fmu2_led.c
+6 -6
View File
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{ {
/* Configure LED1 GPIO for output */ /* Configure LED1 GPIO for output */
px4_arch_configgpio(GPIO_LED1); stm32_configgpio(GPIO_LED1);
} }
__EXPORT void led_on(int led) __EXPORT void led_on(int led)
{ {
if (led == 1) { if (led == 1) {
/* Pull down to switch on */ /* Pull down to switch on */
px4_arch_gpiowrite(GPIO_LED1, false); stm32_gpiowrite(GPIO_LED1, false);
} }
} }
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{ {
if (led == 1) { if (led == 1) {
/* Pull up to switch off */ /* Pull up to switch off */
px4_arch_gpiowrite(GPIO_LED1, true); stm32_gpiowrite(GPIO_LED1, true);
} }
} }
__EXPORT void led_toggle(int led) __EXPORT void led_toggle(int led)
{ {
if (led == 1) { if (led == 1) {
if (px4_arch_gpioread(GPIO_LED1)) { if (stm32_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false); stm32_gpiowrite(GPIO_LED1, false);
} else { } else {
px4_arch_gpiowrite(GPIO_LED1, true); stm32_gpiowrite(GPIO_LED1, true);
} }
} }
} }
src/drivers/boards/px4fmu-v2/px4fmu_can.c
+3 -18
View File
@@ -46,7 +46,7 @@
#include <errno.h> #include <errno.h>
#include <debug.h> #include <debug.h>
#include <nuttx/can.h> #include <nuttx/drivers/can.h>
#include <arch/board/board.h> #include <arch/board/board.h>
#include "chip.h" #include "chip.h"
@@ -74,21 +74,6 @@
# define CAN_PORT 2 # define CAN_PORT 2
#endif #endif
/* Debug ***************************************************************************/
/* Non-standard debug that may be enabled just for testing CAN */
#ifdef CONFIG_DEBUG_CAN
# define candbg dbg
# define canvdbg vdbg
# define canlldbg lldbg
# define canllvdbg llvdbg
#else
# define candbg(x...)
# define canvdbg(x...)
# define canlldbg(x...)
# define canllvdbg(x...)
#endif
/************************************************************************************ /************************************************************************************
* Private Functions * Private Functions
************************************************************************************/ ************************************************************************************/
@@ -121,7 +106,7 @@ int can_devinit(void)
can = stm32_caninitialize(CAN_PORT); can = stm32_caninitialize(CAN_PORT);
if (can == NULL) { if (can == NULL) {
candbg("ERROR: Failed to get CAN interface\n"); canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV; return -ENODEV;
} }
@@ -130,7 +115,7 @@ int can_devinit(void)
ret = can_register("/dev/can0", can); ret = can_register("/dev/can0", can);
if (ret < 0) { if (ret < 0) {
candbg("ERROR: can_register failed: %d\n", ret); canerr("ERROR: can_register failed: %d\n", ret);
return ret; return ret;
} }
src/drivers/boards/px4fmu-v2/px4fmu_spi.c
+113 -112
View File
@@ -47,7 +47,8 @@
#include <stdbool.h> #include <stdbool.h>
#include <debug.h> #include <debug.h>
#include <unistd.h> #include <unistd.h>
#include <nuttx/spi.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h> #include <arch/board/board.h>
#include <up_arch.h> #include <up_arch.h>
@@ -71,42 +72,42 @@
__EXPORT void stm32_spiinitialize(void) __EXPORT void stm32_spiinitialize(void)
{ {
#ifdef CONFIG_STM32_SPI1 #ifdef CONFIG_STM32_SPI1
px4_arch_configgpio(GPIO_SPI_CS_GYRO); stm32_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG); stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO); stm32_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_HMC); stm32_configgpio(GPIO_SPI_CS_HMC);
px4_arch_configgpio(GPIO_SPI_CS_MPU); stm32_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals, /* De-activate all peripherals,
* required for some peripheral * required for some peripheral
* state machines * state machines
*/ */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1); stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY); stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY); stm32_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY); stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY); stm32_configgpio(GPIO_EXTI_MPU_DRDY);
#endif #endif
#ifdef CONFIG_STM32_SPI2 #ifdef CONFIG_STM32_SPI2
px4_arch_configgpio(GPIO_SPI_CS_FRAM); stm32_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1); stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif #endif
#ifdef CONFIG_STM32_SPI4 #ifdef CONFIG_STM32_SPI4
px4_arch_configgpio(GPIO_SPI_CS_EXT0); stm32_configgpio(GPIO_SPI_CS_EXT0);
px4_arch_configgpio(GPIO_SPI_CS_EXT1); stm32_configgpio(GPIO_SPI_CS_EXT1);
px4_arch_configgpio(GPIO_SPI_CS_EXT2); stm32_configgpio(GPIO_SPI_CS_EXT2);
px4_arch_configgpio(GPIO_SPI_CS_EXT3); stm32_configgpio(GPIO_SPI_CS_EXT3);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
#endif #endif
} }
@@ -117,56 +118,56 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) { switch (devid) {
case PX4_SPIDEV_GYRO: case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected); stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1); stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
break; break;
case PX4_SPIDEV_ACCEL_MAG: case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1); stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
break; break;
case PX4_SPIDEV_BARO: case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected); stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1); stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
break; break;
case PX4_SPIDEV_HMC: case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, !selected); stm32_gpiowrite(GPIO_SPI_CS_HMC, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
break; break;
case PX4_SPIDEV_LIS: case PX4_SPIDEV_LIS:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_LIS, !selected); stm32_gpiowrite(GPIO_SPI_CS_LIS, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
break; break;
case PX4_SPIDEV_MPU: case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1); stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected); stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break; break;
default: default:
@@ -184,7 +185,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{ {
/* there can only be one device on this bus, so always select it */ /* there can only be one device on this bus, so always select it */
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected); stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
} }
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -201,34 +202,34 @@ __EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) { switch (devid) {
case PX4_SPIDEV_EXT0: case PX4_SPIDEV_EXT0:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, !selected); stm32_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break; break;
case PX4_SPIDEV_EXT1: case PX4_SPIDEV_EXT1:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, !selected); stm32_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break; break;
case PX4_SPIDEV_EXT2: case PX4_SPIDEV_EXT2:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, !selected); stm32_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break; break;
case PX4_SPIDEV_EXT3: case PX4_SPIDEV_EXT3:
/* Making sure the other peripherals are not selected */ /* Making sure the other peripherals are not selected */
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1); stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, !selected); stm32_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
break; break;
default: default:
@@ -245,37 +246,37 @@ __EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void board_spi_reset(int ms) __EXPORT void board_spi_reset(int ms)
{ {
/* disable SPI bus */ /* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_GYRO_OFF); stm32_configgpio(GPIO_SPI_CS_GYRO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF); stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
px4_arch_configgpio(GPIO_SPI_CS_BARO_OFF); stm32_configgpio(GPIO_SPI_CS_BARO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_MPU_OFF); stm32_configgpio(GPIO_SPI_CS_MPU_OFF);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0); stm32_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0); stm32_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0); stm32_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
px4_arch_configgpio(GPIO_SPI1_SCK_OFF); stm32_configgpio(GPIO_SPI1_SCK_OFF);
px4_arch_configgpio(GPIO_SPI1_MISO_OFF); stm32_configgpio(GPIO_SPI1_MISO_OFF);
px4_arch_configgpio(GPIO_SPI1_MOSI_OFF); stm32_configgpio(GPIO_SPI1_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0); stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0); stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0); stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_GYRO_DRDY_OFF); stm32_configgpio(GPIO_GYRO_DRDY_OFF);
px4_arch_configgpio(GPIO_MAG_DRDY_OFF); stm32_configgpio(GPIO_MAG_DRDY_OFF);
px4_arch_configgpio(GPIO_ACCEL_DRDY_OFF); stm32_configgpio(GPIO_ACCEL_DRDY_OFF);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY_OFF); stm32_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
px4_arch_gpiowrite(GPIO_GYRO_DRDY_OFF, 0); stm32_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_MAG_DRDY_OFF, 0); stm32_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0); stm32_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0); stm32_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
/* set the sensor rail off */ /* set the sensor rail off */
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN); stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0); stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */ /* wait for the sensor rail to reach GND */
usleep(ms * 1000); usleep(ms * 1000);
@@ -284,36 +285,36 @@ __EXPORT void board_spi_reset(int ms)
/* re-enable power */ /* re-enable power */
/* switch the sensor rail back on */ /* switch the sensor rail back on */
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1); stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */ /* wait a bit before starting SPI, different times didn't influence results */
usleep(100); usleep(100);
/* reconfigure the SPI pins */ /* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1 #ifdef CONFIG_STM32_SPI1
px4_arch_configgpio(GPIO_SPI_CS_GYRO); stm32_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG); stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO); stm32_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_MPU); stm32_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals, /* De-activate all peripherals,
* required for some peripheral * required for some peripheral
* state machines * state machines
*/ */
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1); stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1); stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1); stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1); stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_configgpio(GPIO_SPI1_SCK); stm32_configgpio(GPIO_SPI1_SCK);
px4_arch_configgpio(GPIO_SPI1_MISO); stm32_configgpio(GPIO_SPI1_MISO);
px4_arch_configgpio(GPIO_SPI1_MOSI); stm32_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again // // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY); // stm32_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY); // stm32_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY); // stm32_configgpio(GPIO_ACCEL_DRDY);
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY); // stm32_configgpio(GPIO_EXTI_MPU_DRDY);
#endif #endif
} }
src/drivers/boards/px4fmu-v2/px4fmu_usb.c
+4 -4
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ /* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS #ifdef CONFIG_STM32_OTGFS
px4_arch_configgpio(GPIO_OTGFS_VBUS); stm32_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode /* XXX We only support device mode
px4_arch_configgpio(GPIO_OTGFS_PWRON); stm32_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER); stm32_configgpio(GPIO_OTGFS_OVER);
*/ */
#endif #endif
} }
@@ -103,6 +103,6 @@ __EXPORT void stm32_usbinitialize(void)
__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume) __EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{ {
//ulldbg("resume: %d\n", resume); uinfo("resume: %d\n", resume);
} }