mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-05-21 13:02:25 +08:00
Changes to px4fmu-v2 for upstream Nuttx and hardfault logging
This commit is contained in:
David Sidrane
committed by
Lorenz Meier
Lorenz Meier
parent
82cb9353d1
commit
d9575964a4
@@ -1,5 +1,7 @@
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include(nuttx/px4_impl_nuttx)
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px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common)
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set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
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set(config_uavcan_num_ifaces 2)
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@@ -46,7 +48,7 @@ set(config_module_list
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drivers/pwm_input
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drivers/camera_trigger
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drivers/bst
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#drivers/snapdragon_rc_pwm
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##TO FIT drivers/snapdragon_rc_pwm
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drivers/lis3mdl
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drivers/iridiumsbd
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@@ -57,6 +59,7 @@ set(config_module_list
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systemcmds/config
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#systemcmds/dumpfile
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#systemcmds/esc_calib
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systemcmds/hardfault_log
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systemcmds/mixer
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#systemcmds/motor_ramp
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systemcmds/mtd
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@@ -202,11 +205,13 @@ set(config_io_extra_libs
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add_custom_target(sercon)
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set_target_properties(sercon PROPERTIES
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PRIORITY "SCHED_PRIORITY_DEFAULT"
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MAIN "sercon" STACK_MAIN "2048"
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MAIN "sercon"
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STACK_MAIN "2048"
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COMPILE_FLAGS "-Os")
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add_custom_target(serdis)
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set_target_properties(serdis PROPERTIES
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PRIORITY "SCHED_PRIORITY_DEFAULT"
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MAIN "serdis" STACK_MAIN "2048"
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MAIN "serdis"
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STACK_MAIN "2048"
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COMPILE_FLAGS "-Os")
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@@ -1,5 +1,7 @@
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include(nuttx/px4_impl_nuttx)
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px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_test)
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set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
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set(config_uavcan_num_ifaces 2)
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@@ -18,7 +20,7 @@ set(config_module_list
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drivers/boards/px4fmu-v2
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drivers/rgbled
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drivers/mpu6000
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drivers/mpu9250
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#TO FIT drivers/mpu9250
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drivers/lsm303d
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drivers/l3gd20
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drivers/hmc5883
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@@ -56,6 +58,7 @@ set(config_module_list
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systemcmds/config
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systemcmds/dumpfile
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#systemcmds/esc_calib
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#TO FIT systemcmds/hardfault_log
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systemcmds/mixer
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systemcmds/motor_ramp
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systemcmds/mtd
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@@ -202,9 +205,11 @@ set(config_io_extra_libs
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add_custom_target(sercon)
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set_target_properties(sercon PROPERTIES
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PRIORITY "SCHED_PRIORITY_DEFAULT"
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MAIN "sercon" STACK_MAIN "2048")
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MAIN "sercon" STACK_MAIN "2048"
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COMPILE_FLAGS "-Os")
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add_custom_target(serdis)
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set_target_properties(serdis PROPERTIES
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PRIORITY "SCHED_PRIORITY_DEFAULT"
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MAIN "serdis" STACK_MAIN "2048")
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MAIN "serdis" STACK_MAIN "2048"
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COMPILE_FLAGS "-Os")
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@@ -0,0 +1,22 @@
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#
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# For a description of the syntax of this configuration file,
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# see misc/tools/kconfig-language.txt.
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#
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if ARCH_BOARD_PX4FMU_V2
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config BOARD_HAS_PROBES
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bool "Board provides GPIO or other Hardware for signaling to timing analyze."
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default y
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---help---
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This board provides GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers.
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config BOARD_USE_PROBES
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bool "Enable the use the board provided GPIO FMU-CH1-6 as PROBE_1-6 to provide timing signals from selected drivers"
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default n
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depends on BOARD_HAS_PROBES
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---help---
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Select to use GPIO FMU-CH1-6 to provide timing signals from selected drivers.
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endif
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@@ -1,5 +1,5 @@
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/************************************************************************************
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* configs/px4fmu/include/board.h
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* nuttx-configs/px4fmu-v2/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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@@ -147,11 +147,23 @@
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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* Note: TIM1,8-11 are on APB2, others on APB1
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*/
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#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
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#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
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#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
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#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
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#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
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#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
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#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
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#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
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#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
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#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
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#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
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#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
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#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
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#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
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#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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* in order to avoid RX overrun/TX underrun errors due to delayed responses
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@@ -196,81 +208,127 @@
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/* Alternate function pin selections ************************************************/
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/*
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* UARTs.
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*/
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#define GPIO_USART1_RX GPIO_USART1_RX_1 /* console in from IO */
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#define GPIO_USART1_TX 0 /* USART1 is RX-only */
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/* UARTs */
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#define GPIO_USART2_RX GPIO_USART2_RX_2
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#define GPIO_USART2_TX GPIO_USART2_TX_2
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#define GPIO_USART2_RTS GPIO_USART2_RTS_2
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#define GPIO_USART2_CTS GPIO_USART2_CTS_2
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#define GPIO_USART1_RX GPIO_USART1_RX_1 /* Console in from IO */
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#define GPIO_USART1_TX 0 /* USART1 is RX-only */
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#define GPIO_USART3_RX GPIO_USART3_RX_3
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#define GPIO_USART3_TX GPIO_USART3_TX_3
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#define GPIO_USART3_RTS GPIO_USART3_RTS_2
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#define GPIO_USART3_CTS GPIO_USART3_CTS_2
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#define GPIO_USART2_RX GPIO_USART2_RX_2
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#define GPIO_USART2_TX GPIO_USART2_TX_2
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#define GPIO_USART2_RTS GPIO_USART2_RTS_2
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#define GPIO_USART2_CTS GPIO_USART2_CTS_2
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#define GPIO_UART4_RX GPIO_UART4_RX_1
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#define GPIO_UART4_TX GPIO_UART4_TX_1
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#define GPIO_USART3_RX GPIO_USART3_RX_3
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#define GPIO_USART3_TX GPIO_USART3_TX_3
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#define GPIO_USART3_RTS GPIO_USART3_RTS_2
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#define GPIO_USART3_CTS GPIO_USART3_CTS_2
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#define GPIO_USART6_RX GPIO_USART6_RX_1
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#define GPIO_USART6_TX GPIO_USART6_TX_1
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#define GPIO_UART4_RX GPIO_UART4_RX_1
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#define GPIO_UART4_TX GPIO_UART4_TX_1
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#define GPIO_UART7_RX GPIO_UART7_RX_1
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#define GPIO_UART7_TX GPIO_UART7_TX_1
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#define GPIO_USART6_RX GPIO_USART6_RX_1
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#define GPIO_USART6_TX GPIO_USART6_TX_1
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#define GPIO_UART7_RX GPIO_UART7_RX_1
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#define GPIO_UART7_TX GPIO_UART7_TX_1
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/* UART8 has no alternate pin config */
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/* UART RX DMA configurations */
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#define DMAMAP_USART1_RX DMAMAP_USART1_RX_2
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#define DMAMAP_USART6_RX DMAMAP_USART6_RX_2
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/*
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* CAN
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/* CAN
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*
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* CAN1 is routed to the onboard transceiver.
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* CAN2 is routed to the expansion connector.
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*/
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#define GPIO_CAN1_RX GPIO_CAN1_RX_3
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#define GPIO_CAN1_TX GPIO_CAN1_TX_3
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#define GPIO_CAN2_RX GPIO_CAN2_RX_1
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#define GPIO_CAN2_TX GPIO_CAN2_TX_2
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/*
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* I2C
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#define GPIO_CAN1_RX GPIO_CAN1_RX_3
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#define GPIO_CAN1_TX GPIO_CAN1_TX_3
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#define GPIO_CAN2_RX GPIO_CAN2_RX_1
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#define GPIO_CAN2_TX GPIO_CAN2_TX_2
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/* I2C
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*
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* The optional _GPIO configurations allow the I2C driver to manually
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* reset the bus to clear stuck slaves. They match the pin configuration,
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* but are normally-high GPIOs.
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*/
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#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
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#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
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#define GPIO_I2C1_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
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#define GPIO_I2C1_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
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#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
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#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
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#define GPIO_I2C2_SCL_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
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#define GPIO_I2C2_SDA_GPIO (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
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#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
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#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
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#define GPIO_I2C1_SCL_GPIO \
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(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8)
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#define GPIO_I2C1_SDA_GPIO \
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(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
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/*
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* SPI
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#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
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#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
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#define GPIO_I2C2_SCL_GPIO \
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(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
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#define GPIO_I2C2_SDA_GPIO \
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(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
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/* SPI
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*
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* There are sensors on SPI1, and SPI2 is connected to the FRAM.
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*/
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#define GPIO_SPI1_MISO (GPIO_SPI1_MISO_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI1_MOSI (GPIO_SPI1_MOSI_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI1_SCK (GPIO_SPI1_SCK_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI2_MISO (GPIO_SPI2_MISO_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI2_MOSI (GPIO_SPI2_MOSI_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI2_SCK (GPIO_SPI2_SCK_2|GPIO_SPEED_50MHz)
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#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
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#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
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#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
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#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
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#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
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#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2
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#define GPIO_SPI4_MISO GPIO_SPI4_MISO_1
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#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1
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#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1
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/* LED Definitions. Needed if CONFIG_ARCH_LEDs is defined */
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 0
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#define LED_IRQSENABLED 0
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#define LED_STACKCREATED 1
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#define LED_INIRQ 1
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#define LED_SIGNAL 1
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#define LED_ASSERTION 1
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#define LED_PANIC 1
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/* Board provides GPIO or other Hardware for signaling to timing analyzer */
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#if defined(CONFIG_BOARD_USE_PROBES)
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# define PROBE_N(n) (1<<((n)-1))
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# define PROBE_1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN14)
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# define PROBE_2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)
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# define PROBE_3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN11)
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# define PROBE_4 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN9)
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# define PROBE_5 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN13)
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# define PROBE_6 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTD|GPIO_PIN14)
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# define PROBE_INIT(mask) \
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do { \
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if ((mask)& PROBE_N(1)) { stm32_configgpio(PROBE_1); } \
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if ((mask)& PROBE_N(2)) { stm32_configgpio(PROBE_2); } \
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if ((mask)& PROBE_N(3)) { stm32_configgpio(PROBE_3); } \
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if ((mask)& PROBE_N(4)) { stm32_configgpio(PROBE_4); } \
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if ((mask)& PROBE_N(5)) { stm32_configgpio(PROBE_5); } \
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if ((mask)& PROBE_N(6)) { stm32_configgpio(PROBE_6); } \
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} while(0)
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# define PROBE(n,s) do {stm32_gpiowrite(PROBE_##n,(s));}while(0)
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# define PROBE_MARK(n) PROBE(n,false);PROBE(n,true)
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#else
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# define PROBE_INIT(mask)
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# define PROBE(n,s)
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# define PROBE_MARK(n)
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#endif
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#define GPIO_SPI4_MISO (GPIO_SPI4_MISO_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI4_MOSI (GPIO_SPI4_MOSI_1|GPIO_SPEED_50MHz)
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#define GPIO_SPI4_SCK (GPIO_SPI4_SCK_1|GPIO_SPEED_50MHz)
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/************************************************************************************
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* Public Data
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@@ -1,5 +1,5 @@
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############################################################################
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# configs/px4fmu-v2/nsh/Make.defs
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# nuttx-configs/px4fmu-v2/nsh/Make.defs
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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@@ -35,14 +35,14 @@
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include ${TOPDIR}/.config
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include ${TOPDIR}/tools/Config.mk
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include $(TOPDIR)/PX4_Warnings.mk
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include $(TOPDIR)/PX4_Config.mk
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#
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# We only support building with the ARM bare-metal toolchain from
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# https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
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#
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CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI
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CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI${HOST_OS_FIRST_LETTER}
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include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
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@@ -62,17 +62,19 @@ ARCHCPUFLAGS = -mcpu=cortex-m4 \
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-mfpu=fpv4-sp-d16 \
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-mfloat-abi=hard
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# Enable precise stack overflow tracking
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# enable precise stack overflow tracking
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
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endif
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# pull in *just* libm from the toolchain ... this is grody
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# Pull in *just* libm from the toolchain ... this is grody
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LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
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EXTRA_LIBS += $(LIBM)
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# use our linker script
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# Use our linker script
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LDSCRIPT = ld.script
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ifeq ($(WINTOOL),y)
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@@ -94,18 +96,20 @@ else
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
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else
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# Linux/Cygwin-native toolchain
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MKDEP = $(TOPDIR)/tools/mkdeps.sh
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MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
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ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
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ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
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endif
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endif
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# tool versions
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# Tool versions
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ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
|
||||
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
|
||||
|
||||
# optimisation flags
|
||||
# Optimization flags
|
||||
|
||||
ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \
|
||||
-fno-strict-aliasing \
|
||||
-fno-strength-reduce \
|
||||
@@ -127,7 +131,8 @@ ARCHWARNINGSXX = $(ARCHWARNINGS) $(PX4_ARCHWARNINGSXX)
|
||||
ARCHDEFINES =
|
||||
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
|
||||
|
||||
# this seems to be the only way to add linker flags
|
||||
# This seems to be the only way to add linker flags
|
||||
|
||||
EXTRA_LIBS += --warn-common \
|
||||
--gc-sections
|
||||
|
||||
@@ -146,8 +151,8 @@ OBJEXT = .o
|
||||
LIBEXT = .a
|
||||
EXEEXT =
|
||||
|
||||
# Produce partially-linked $1 from files in $2
|
||||
|
||||
# produce partially-linked $1 from files in $2
|
||||
define PRELINK
|
||||
@echo "PRELINK: $1"
|
||||
$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1
|
||||
|
||||
@@ -1,52 +0,0 @@
|
||||
############################################################################
|
||||
# configs/px4fmu/nsh/appconfig
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# Path to example in apps/examples containing the user_start entry point
|
||||
|
||||
CONFIGURED_APPS += examples/nsh
|
||||
|
||||
# The NSH application library
|
||||
CONFIGURED_APPS += nshlib
|
||||
CONFIGURED_APPS += system/readline
|
||||
|
||||
ifeq ($(CONFIG_CAN),y)
|
||||
CONFIGURED_APPS += examples/can
|
||||
endif
|
||||
|
||||
#ifeq ($(CONFIG_USBDEV),y)
|
||||
#ifeq ($(CONFIG_CDCACM),y)
|
||||
CONFIGURED_APPS += examples/cdcacm
|
||||
#endif
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,7 +1,7 @@
|
||||
#!/bin/bash
|
||||
# configs/stm3240g-eval/nsh/setenv.sh
|
||||
# nuttx-configs/px4fmu-v2/nsh/setenv.sh
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
@@ -47,15 +47,11 @@ if [ -z "${PATH_ORIG}" ]; then
|
||||
export PATH_ORIG="${PATH}"
|
||||
fi
|
||||
|
||||
# This the Cygwin path to the location where I installed the RIDE
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the RIDE toolchain in any other location
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
|
||||
|
||||
# This the Cygwin path to the location where I installed the CodeSourcery
|
||||
# toolchain under windows. You will also have to edit this if you install
|
||||
# the CodeSourcery toolchain in any other location
|
||||
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
|
||||
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
|
||||
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin
|
||||
|
||||
# This the Cygwin path to the location where I build the buildroot
|
||||
# toolchain.
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/****************************************************************************
|
||||
* configs/px4fmu/common/ld.script
|
||||
* nuttx-configs/px4fmu-v2/scripts/ld.script
|
||||
*
|
||||
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
@@ -61,7 +61,7 @@ OUTPUT_ARCH(arm)
|
||||
ENTRY(__start) /* treat __start as the anchor for dead code stripping */
|
||||
EXTERN(_vectors) /* force the vectors to be included in the output */
|
||||
|
||||
/*
|
||||
/*
|
||||
* Ensure that abort() is present in the final object. The exception handling
|
||||
* code pulled in by libgcc.a requires it (and that code cannot be easily avoided).
|
||||
*/
|
||||
@@ -73,24 +73,24 @@ SECTIONS
|
||||
.text : {
|
||||
_stext = ABSOLUTE(.);
|
||||
*(.vectors)
|
||||
. = ALIGN(32);
|
||||
/*
|
||||
This signature provides the bootloader with a way to delay booting
|
||||
*/
|
||||
_bootdelay_signature = ABSOLUTE(.);
|
||||
FILL(0xffecc2925d7d05c5)
|
||||
. += 8;
|
||||
*(.text .text.*)
|
||||
. = ALIGN(32);
|
||||
/*
|
||||
This signature provides the bootloader with a way to delay booting
|
||||
*/
|
||||
_bootdelay_signature = ABSOLUTE(.);
|
||||
FILL(0xffecc2925d7d05c5)
|
||||
. += 8;
|
||||
*(.text .text.*)
|
||||
*(.fixup)
|
||||
*(.gnu.warning)
|
||||
*(.rodata .rodata.*)
|
||||
*(.rodata .rodata.*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.got)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.r.*)
|
||||
_etext = ABSOLUTE(.);
|
||||
|
||||
/*
|
||||
/*
|
||||
* This is a hack to make the newlib libm __errno() call
|
||||
* use the NuttX get_errno_ptr() function.
|
||||
*/
|
||||
|
||||
@@ -1,5 +1,4 @@
|
||||
############################################################################
|
||||
# configs/px4fmu/src/Makefile
|
||||
#
|
||||
# Copyright (C) 2011 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
@@ -35,24 +34,24 @@
|
||||
|
||||
-include $(TOPDIR)/Make.defs
|
||||
|
||||
CFLAGS += -I$(TOPDIR)/sched
|
||||
CFLAGS += -I$(TOPDIR)/sched
|
||||
|
||||
ASRCS =
|
||||
AOBJS = $(ASRCS:.S=$(OBJEXT))
|
||||
ASRCS =
|
||||
AOBJS = $(ASRCS:.S=$(OBJEXT))
|
||||
|
||||
CSRCS = empty.c
|
||||
COBJS = $(CSRCS:.c=$(OBJEXT))
|
||||
CSRCS = empty.c
|
||||
COBJS = $(CSRCS:.c=$(OBJEXT))
|
||||
|
||||
SRCS = $(ASRCS) $(CSRCS)
|
||||
OBJS = $(AOBJS) $(COBJS)
|
||||
SRCS = $(ASRCS) $(CSRCS)
|
||||
OBJS = $(AOBJS) $(COBJS)
|
||||
|
||||
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
|
||||
ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src
|
||||
ifeq ($(WINTOOL),y)
|
||||
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
|
||||
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
|
||||
-I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
|
||||
CFLAGS += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
|
||||
-I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
|
||||
-I "${shell cygpath -w $(ARCH_SRCDIR)/armv7-m}"
|
||||
else
|
||||
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
|
||||
CFLAGS += -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/armv7-m
|
||||
endif
|
||||
|
||||
all: libboard$(LIBEXT)
|
||||
@@ -80,5 +79,8 @@ distclean: clean
|
||||
$(call DELFILE, Make.dep)
|
||||
$(call DELFILE, .depend)
|
||||
|
||||
-include Make.dep
|
||||
ifneq ($(BOARD_CONTEXT),y)
|
||||
context:
|
||||
endif
|
||||
|
||||
-include Make.dep
|
||||
|
||||
@@ -47,11 +47,6 @@
|
||||
#include <nuttx/compiler.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include <stm32.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#define UDID_START 0x1FFF7A10
|
||||
|
||||
/****************************************************************************************************
|
||||
* Definitions
|
||||
****************************************************************************************************/
|
||||
@@ -241,9 +236,9 @@
|
||||
|
||||
#define BOARD_NAME "PX4FMU_V2"
|
||||
|
||||
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
|
||||
* system_power interface, and therefore provides the true logic
|
||||
* GPIO BOARD_ADC_xxxx macros.
|
||||
/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction)
|
||||
* this board support the ADC system_power interface, and therefore
|
||||
* provides the true logic GPIO BOARD_ADC_xxxx macros.
|
||||
*/
|
||||
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
|
||||
#define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
|
||||
@@ -295,30 +290,38 @@ __BEGIN_DECLS
|
||||
****************************************************************************************************/
|
||||
|
||||
extern void stm32_spiinitialize(void);
|
||||
extern void board_spi_reset(int ms);
|
||||
|
||||
/************************************************************************************
|
||||
* Name: stm32_spi_bus_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI Buses.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
extern int stm32_spi_bus_initialize(void);
|
||||
|
||||
/****************************************************************************************************
|
||||
* Name: board_spi_reset board_peripheral_reset
|
||||
*
|
||||
* Description:
|
||||
* Called to reset SPI and the perferal bus
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
void board_spi_reset(int ms);
|
||||
extern void board_peripheral_reset(int ms);
|
||||
|
||||
/****************************************************************************************************
|
||||
* Name: stm32_usbinitialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure USB IO.
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
extern void stm32_usbinitialize(void);
|
||||
|
||||
extern void board_peripheral_reset(int ms);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nsh_archinitialize
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture specific initialization for NSH.
|
||||
*
|
||||
* CONFIG_NSH_ARCHINIT=y :
|
||||
* Called from the NSH library
|
||||
*
|
||||
* CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
|
||||
* CONFIG_NSH_ARCHINIT=n :
|
||||
* Called from board_initialize().
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_NSH_LIBRARY
|
||||
int nsh_archinitialize(void);
|
||||
#endif
|
||||
|
||||
#include "../common/board_common.h"
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -64,14 +64,14 @@ __EXPORT void led_init()
|
||||
{
|
||||
/* Configure LED1 GPIO for output */
|
||||
|
||||
px4_arch_configgpio(GPIO_LED1);
|
||||
stm32_configgpio(GPIO_LED1);
|
||||
}
|
||||
|
||||
__EXPORT void led_on(int led)
|
||||
{
|
||||
if (led == 1) {
|
||||
/* Pull down to switch on */
|
||||
px4_arch_gpiowrite(GPIO_LED1, false);
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
|
||||
{
|
||||
if (led == 1) {
|
||||
/* Pull up to switch off */
|
||||
px4_arch_gpiowrite(GPIO_LED1, true);
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
}
|
||||
|
||||
__EXPORT void led_toggle(int led)
|
||||
{
|
||||
if (led == 1) {
|
||||
if (px4_arch_gpioread(GPIO_LED1)) {
|
||||
px4_arch_gpiowrite(GPIO_LED1, false);
|
||||
if (stm32_gpioread(GPIO_LED1)) {
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
|
||||
} else {
|
||||
px4_arch_gpiowrite(GPIO_LED1, true);
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -46,7 +46,7 @@
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/can.h>
|
||||
#include <nuttx/drivers/can.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "chip.h"
|
||||
@@ -74,21 +74,6 @@
|
||||
# define CAN_PORT 2
|
||||
#endif
|
||||
|
||||
/* Debug ***************************************************************************/
|
||||
/* Non-standard debug that may be enabled just for testing CAN */
|
||||
|
||||
#ifdef CONFIG_DEBUG_CAN
|
||||
# define candbg dbg
|
||||
# define canvdbg vdbg
|
||||
# define canlldbg lldbg
|
||||
# define canllvdbg llvdbg
|
||||
#else
|
||||
# define candbg(x...)
|
||||
# define canvdbg(x...)
|
||||
# define canlldbg(x...)
|
||||
# define canllvdbg(x...)
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Private Functions
|
||||
************************************************************************************/
|
||||
@@ -121,7 +106,7 @@ int can_devinit(void)
|
||||
can = stm32_caninitialize(CAN_PORT);
|
||||
|
||||
if (can == NULL) {
|
||||
candbg("ERROR: Failed to get CAN interface\n");
|
||||
canerr("ERROR: Failed to get CAN interface\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
@@ -130,7 +115,7 @@ int can_devinit(void)
|
||||
ret = can_register("/dev/can0", can);
|
||||
|
||||
if (ret < 0) {
|
||||
candbg("ERROR: can_register failed: %d\n", ret);
|
||||
canerr("ERROR: can_register failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -47,7 +47,8 @@
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
#include <unistd.h>
|
||||
#include <nuttx/spi.h>
|
||||
|
||||
#include <nuttx/spi/spi.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include <up_arch.h>
|
||||
@@ -71,42 +72,42 @@
|
||||
__EXPORT void stm32_spiinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_BARO);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_HMC);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_MPU);
|
||||
stm32_configgpio(GPIO_SPI_CS_GYRO);
|
||||
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
|
||||
stm32_configgpio(GPIO_SPI_CS_BARO);
|
||||
stm32_configgpio(GPIO_SPI_CS_HMC);
|
||||
stm32_configgpio(GPIO_SPI_CS_MPU);
|
||||
|
||||
/* De-activate all peripherals,
|
||||
* required for some peripheral
|
||||
* state machines
|
||||
*/
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
|
||||
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
|
||||
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
|
||||
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
|
||||
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_MPU_DRDY);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI2
|
||||
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
|
||||
stm32_configgpio(GPIO_SPI_CS_FRAM);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI4
|
||||
px4_arch_configgpio(GPIO_SPI_CS_EXT0);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_EXT1);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_EXT2);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_EXT3);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
stm32_configgpio(GPIO_SPI_CS_EXT0);
|
||||
stm32_configgpio(GPIO_SPI_CS_EXT1);
|
||||
stm32_configgpio(GPIO_SPI_CS_EXT2);
|
||||
stm32_configgpio(GPIO_SPI_CS_EXT3);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -117,56 +118,56 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
|
||||
switch (devid) {
|
||||
case PX4_SPIDEV_GYRO:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_ACCEL_MAG:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_BARO:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_HMC:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_HMC, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_LIS:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_LIS, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_LIS, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_MPU:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -184,7 +185,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
|
||||
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
{
|
||||
/* there can only be one device on this bus, so always select it */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
|
||||
}
|
||||
|
||||
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
@@ -201,34 +202,34 @@ __EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
|
||||
switch (devid) {
|
||||
case PX4_SPIDEV_EXT0:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_EXT1:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_EXT2:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_EXT3:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -245,37 +246,37 @@ __EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
|
||||
__EXPORT void board_spi_reset(int ms)
|
||||
{
|
||||
/* disable SPI bus */
|
||||
px4_arch_configgpio(GPIO_SPI_CS_GYRO_OFF);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_BARO_OFF);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_MPU_OFF);
|
||||
stm32_configgpio(GPIO_SPI_CS_GYRO_OFF);
|
||||
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
|
||||
stm32_configgpio(GPIO_SPI_CS_BARO_OFF);
|
||||
stm32_configgpio(GPIO_SPI_CS_MPU_OFF);
|
||||
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
|
||||
|
||||
px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
|
||||
px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
|
||||
px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
|
||||
stm32_configgpio(GPIO_SPI1_SCK_OFF);
|
||||
stm32_configgpio(GPIO_SPI1_MISO_OFF);
|
||||
stm32_configgpio(GPIO_SPI1_MOSI_OFF);
|
||||
|
||||
px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
|
||||
|
||||
px4_arch_configgpio(GPIO_GYRO_DRDY_OFF);
|
||||
px4_arch_configgpio(GPIO_MAG_DRDY_OFF);
|
||||
px4_arch_configgpio(GPIO_ACCEL_DRDY_OFF);
|
||||
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
|
||||
stm32_configgpio(GPIO_GYRO_DRDY_OFF);
|
||||
stm32_configgpio(GPIO_MAG_DRDY_OFF);
|
||||
stm32_configgpio(GPIO_ACCEL_DRDY_OFF);
|
||||
stm32_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
|
||||
|
||||
px4_arch_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
|
||||
px4_arch_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
|
||||
|
||||
/* set the sensor rail off */
|
||||
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
|
||||
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
|
||||
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
|
||||
|
||||
/* wait for the sensor rail to reach GND */
|
||||
usleep(ms * 1000);
|
||||
@@ -284,36 +285,36 @@ __EXPORT void board_spi_reset(int ms)
|
||||
/* re-enable power */
|
||||
|
||||
/* switch the sensor rail back on */
|
||||
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
|
||||
|
||||
/* wait a bit before starting SPI, different times didn't influence results */
|
||||
usleep(100);
|
||||
|
||||
/* reconfigure the SPI pins */
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_BARO);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_MPU);
|
||||
stm32_configgpio(GPIO_SPI_CS_GYRO);
|
||||
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
|
||||
stm32_configgpio(GPIO_SPI_CS_BARO);
|
||||
stm32_configgpio(GPIO_SPI_CS_MPU);
|
||||
|
||||
/* De-activate all peripherals,
|
||||
* required for some peripheral
|
||||
* state machines
|
||||
*/
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
|
||||
|
||||
px4_arch_configgpio(GPIO_SPI1_SCK);
|
||||
px4_arch_configgpio(GPIO_SPI1_MISO);
|
||||
px4_arch_configgpio(GPIO_SPI1_MOSI);
|
||||
stm32_configgpio(GPIO_SPI1_SCK);
|
||||
stm32_configgpio(GPIO_SPI1_MISO);
|
||||
stm32_configgpio(GPIO_SPI1_MOSI);
|
||||
|
||||
// // XXX bring up the EXTI pins again
|
||||
// px4_arch_configgpio(GPIO_GYRO_DRDY);
|
||||
// px4_arch_configgpio(GPIO_MAG_DRDY);
|
||||
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
|
||||
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
|
||||
// stm32_configgpio(GPIO_GYRO_DRDY);
|
||||
// stm32_configgpio(GPIO_MAG_DRDY);
|
||||
// stm32_configgpio(GPIO_ACCEL_DRDY);
|
||||
// stm32_configgpio(GPIO_EXTI_MPU_DRDY);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
|
||||
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
|
||||
|
||||
#ifdef CONFIG_STM32_OTGFS
|
||||
px4_arch_configgpio(GPIO_OTGFS_VBUS);
|
||||
stm32_configgpio(GPIO_OTGFS_VBUS);
|
||||
/* XXX We only support device mode
|
||||
px4_arch_configgpio(GPIO_OTGFS_PWRON);
|
||||
px4_arch_configgpio(GPIO_OTGFS_OVER);
|
||||
stm32_configgpio(GPIO_OTGFS_PWRON);
|
||||
stm32_configgpio(GPIO_OTGFS_OVER);
|
||||
*/
|
||||
#endif
|
||||
}
|
||||
@@ -103,6 +103,6 @@ __EXPORT void stm32_usbinitialize(void)
|
||||
|
||||
__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
|
||||
{
|
||||
//ulldbg("resume: %d\n", resume);
|
||||
uinfo("resume: %d\n", resume);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user