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https://github.com/PX4/PX4-Autopilot.git
synced 2026-05-26 01:17:51 +08:00
Add PIC32 Ethernet driver (initial is just crude LPC17xx port)
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4276 7fd9a85b-ad96-42d3-883c-3090e2eb8679
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@@ -73,3 +73,7 @@ endif
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ifeq ($(CONFIG_PIC32MX_USBDEV),y)
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CHIP_CSRCS += pic32mx-usbdev.c
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endif
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ifeq ($(CONFIG_PIC32MX_ETHERNET),y)
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CHIP_CSRCS += pic32mx-ethernet.c
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endif
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@@ -187,7 +187,7 @@
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# define PIC32MX_CHE_K1BASE (PIC32MX_SFR_K1BASE + 0x00084000)
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/* USB2 Register Base Addresses */
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/* USBOTG Register Base Addresses */
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# define PIC32MX_USB_K1BASE (PIC32MX_SFR_K1BASE + 0x00085000)
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@@ -200,17 +200,17 @@
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# define PIC32MX_IOPORTE 4
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# define PIC32MX_IOPORTF 5
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# define PIC32MX_IOPORTG 6
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# define PIC32MX_IOPORT_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00086000 + 0x40*(n))
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# define PIC32MX_IOPORT_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00086000 + 0x40*(n))
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# define PIC32MX_IOPORTA_K1BASE (PIC32MX_SFR_K1BASE + 0x00086000)
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# define PIC32MX_IOPORTB_K1BASE (PIC32MX_SFR_K1BASE + 0x00086040)
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# define PIC32MX_IOPORTC_K1BASE (PIC32MX_SFR_K1BASE + 0x00086080)
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# define PIC32MX_IOPORTD_K1BASE (PIC32MX_SFR_K1BASE + 0x000860c0)
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# define PIC32MX_IOPORTE_K1BASE (PIC32MX_SFR_K1BASE + 0x00086100)
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# define PIC32MX_IOPORTF_K1BASE (PIC32MX_SFR_K1BASE + 0x00086140)
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# define PIC32MX_IOPORTG_K1BASE (PIC32MX_SFR_K1BASE + 0x00086180)
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# define PIC32MX_IOPORTA_K1BASE (PIC32MX_SFR_K1BASE + 0x00086000)
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# define PIC32MX_IOPORTB_K1BASE (PIC32MX_SFR_K1BASE + 0x00086040)
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# define PIC32MX_IOPORTC_K1BASE (PIC32MX_SFR_K1BASE + 0x00086080)
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# define PIC32MX_IOPORTD_K1BASE (PIC32MX_SFR_K1BASE + 0x000860c0)
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# define PIC32MX_IOPORTE_K1BASE (PIC32MX_SFR_K1BASE + 0x00086100)
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# define PIC32MX_IOPORTF_K1BASE (PIC32MX_SFR_K1BASE + 0x00086140)
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# define PIC32MX_IOPORTG_K1BASE (PIC32MX_SFR_K1BASE + 0x00086180)
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# define PIC32MX_IOPORTCN_K1BASE (PIC32MX_SFR_K1BASE + 0x000861c0)
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# define PIC32MX_IOPORTCN_K1BASE (PIC32MX_SFR_K1BASE + 0x000861c0)
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#elif defined(CHIP_PIC32MX5) || defined(CHIP_PIC32MX6) || defined(CHIP_PIC32MX7)
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@@ -330,7 +330,7 @@
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# define PIC32MX_CHE_K1BASE (PIC32MX_SFR_K1BASE + 0x00084000)
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/* USB2 Register Base Addresses */
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/* USBOTG Register Base Addresses */
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# define PIC32MX_USB_K1BASE (PIC32MX_SFR_K1BASE + 0x00085000)
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@@ -343,17 +343,26 @@
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# define PIC32MX_IOPORTE 4
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# define PIC32MX_IOPORTF 5
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# define PIC32MX_IOPORTG 6
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# define PIC32MX_IOPORT_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00086000 + 0x40*(n))
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# define PIC32MX_IOPORT_K1BASE(n) (PIC32MX_SFR_K1BASE + 0x00086000 + 0x40*(n))
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# define PIC32MX_IOPORTA_K1BASE (PIC32MX_SFR_K1BASE + 0x00086000)
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# define PIC32MX_IOPORTB_K1BASE (PIC32MX_SFR_K1BASE + 0x00086040)
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# define PIC32MX_IOPORTC_K1BASE (PIC32MX_SFR_K1BASE + 0x00086080)
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# define PIC32MX_IOPORTD_K1BASE (PIC32MX_SFR_K1BASE + 0x000860c0)
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# define PIC32MX_IOPORTE_K1BASE (PIC32MX_SFR_K1BASE + 0x00086100)
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# define PIC32MX_IOPORTF_K1BASE (PIC32MX_SFR_K1BASE + 0x00086140)
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# define PIC32MX_IOPORTG_K1BASE (PIC32MX_SFR_K1BASE + 0x00086180)
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# define PIC32MX_IOPORTA_K1BASE (PIC32MX_SFR_K1BASE + 0x00086000)
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# define PIC32MX_IOPORTB_K1BASE (PIC32MX_SFR_K1BASE + 0x00086040)
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# define PIC32MX_IOPORTC_K1BASE (PIC32MX_SFR_K1BASE + 0x00086080)
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# define PIC32MX_IOPORTD_K1BASE (PIC32MX_SFR_K1BASE + 0x000860c0)
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# define PIC32MX_IOPORTE_K1BASE (PIC32MX_SFR_K1BASE + 0x00086100)
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# define PIC32MX_IOPORTF_K1BASE (PIC32MX_SFR_K1BASE + 0x00086140)
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# define PIC32MX_IOPORTG_K1BASE (PIC32MX_SFR_K1BASE + 0x00086180)
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# define PIC32MX_IOPORTCN_K1BASE (PIC32MX_SFR_K1BASE + 0x000861c0)
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# define PIC32MX_IOPORTCN_K1BASE (PIC32MX_SFR_K1BASE + 0x000861c0)
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/* Ethernet Controller Register Base Addresses */
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# define PIC32MX_ETHERNET_K1BASE (PIC32MX_SFR_K1BASE + 0x00089000)
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/* CAN1/2 Register Base Addresses */
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# define PIC32MX_CAN1_K1BASE (PIC32MX_SFR_K1BASE + 0x0008b000)
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# define PIC32MX_CAN2_K1BASE (PIC32MX_SFR_K1BASE + 0x0008c000)
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#else
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# error "Memory map unknown for this PIC32 chip"
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