mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-06-05 22:24:47 +08:00
Clean out old drivers we're not using anymore.
This commit is contained in:
px4dev
@@ -1,99 +0,0 @@
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/*
|
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* Copyright (C) 2012 Lorenz Meier. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of the author or the names of contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
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||||
* Driver for the BOSCH BMA180 MEMS accelerometer
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||||
*/
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||||
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||||
/* IMPORTANT NOTES:
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*
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||||
* SPI max. clock frequency: 25 Mhz
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* CS has to be high before transfer,
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* go low right before transfer and
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* go high again right after transfer
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*
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*/
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#include <sys/ioctl.h>
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#define _BMA180BASE 0x6300
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#define BMA180C(_x) _IOC(_BMA180BASE, _x)
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/*
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* Sets the sensor internal sampling rate, and if a buffer
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* has been configured, the rate at which entries will be
|
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* added to the buffer.
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||||
*/
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#define BMA180_SETRATE BMA180C(1)
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#define BMA180_RATE_LP_10HZ (0<<4)
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#define BMA180_RATE_LP_20HZ (1<<4)
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#define BMA180_RATE_LP_40HZ (2<<4)
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#define BMA180_RATE_LP_75HZ (3<<4)
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#define BMA180_RATE_LP_150HZ (4<<4)
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#define BMA180_RATE_LP_300HZ (5<<4)
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#define BMA180_RATE_LP_600HZ (6<<4)
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#define BMA180_RATE_LP_1200HZ (7<<4)
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/*
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* Sets the sensor internal range.
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*/
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#define BMA180_SETRANGE BMA180C(2)
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#define BMA180_RANGE_1G (0<<1)
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#define BMA180_RANGE_1_5G (1<<1)
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#define BMA180_RANGE_2G (2<<1)
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#define BMA180_RANGE_3G (3<<1)
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#define BMA180_RANGE_4G (4<<1)
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#define BMA180_RANGE_8G (5<<1)
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#define BMA180_RANGE_16G (6<<1)
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/*
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* Sets the address of a shared BMA180_buffer
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* structure that is maintained by the driver.
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*
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* If zero is passed as the address, disables
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* the buffer updating.
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*/
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#define BMA180_SETBUFFER BMA180C(3)
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struct bma180_buffer {
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uint32_t size; /* number of entries in the samples[] array */
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uint32_t next; /* the next entry that will be populated */
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struct {
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uint16_t x;
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uint16_t y;
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uint16_t z;
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uint8_t temp;
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} samples[];
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};
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extern int bma180_attach(struct spi_dev_s *spi, int spi_id);
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@@ -1,100 +0,0 @@
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/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
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|
||||
/*
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* Driver for the ST HMC5883L gyroscope
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*/
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#include <sys/ioctl.h>
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#define _HMC5883LBASE 0x6100
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#define HMC5883LC(_x) _IOC(_HMC5883LBASE, _x)
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|
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/*
|
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* Sets the sensor internal sampling rate, and if a buffer
|
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* has been configured, the rate at which entries will be
|
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* added to the buffer.
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*/
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#define HMC5883L_SETRATE HMC5883LC(1)
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/* set rate (configuration A register */
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#define HMC5883L_RATE_0_75HZ (0 << 2) /* 0.75 Hz */
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#define HMC5883L_RATE_1_50HZ (1 << 2) /* 1.5 Hz */
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#define HMC5883L_RATE_3_00HZ (2 << 2) /* 3 Hz */
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#define HMC5883L_RATE_7_50HZ (3 << 2) /* 7.5 Hz */
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#define HMC5883L_RATE_15HZ (4 << 2) /* 15 Hz (default) */
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#define HMC5883L_RATE_30HZ (5 << 2) /* 30 Hz */
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#define HMC5883L_RATE_75HZ (6 << 2) /* 75 Hz */
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/*
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* Sets the sensor internal range.
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*/
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#define HMC5883L_SETRANGE HMC5883LC(2)
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#define HMC5883L_RANGE_0_88GA (0 << 5)
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#define HMC5883L_RANGE_1_33GA (1 << 5)
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#define HMC5883L_RANGE_1_90GA (2 << 5)
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#define HMC5883L_RANGE_2_50GA (3 << 5)
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#define HMC5883L_RANGE_4_00GA (4 << 5)
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/*
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* Set the sensor measurement mode.
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*/
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#define HMC5883L_MODE_NORMAL (0 << 0)
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#define HMC5883L_MODE_POSITIVE_BIAS (1 << 0)
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#define HMC5883L_MODE_NEGATIVE_BIAS (1 << 1)
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/*
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* Sets the address of a shared HMC5883L_buffer
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* structure that is maintained by the driver.
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*
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* If zero is passed as the address, disables
|
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* the buffer updating.
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*/
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#define HMC5883L_SETBUFFER HMC5883LC(3)
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struct hmc5883l_buffer {
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uint32_t size; /* number of entries in the samples[] array */
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uint32_t next; /* the next entry that will be populated */
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struct {
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int16_t x;
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int16_t y;
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int16_t z;
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} samples[];
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};
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#define HMC5883L_RESET HMC5883LC(4)
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#define HMC5883L_CALIBRATION_ON HMC5883LC(5)
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#define HMC5883L_CALIBRATION_OFF HMC5883LC(6)
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extern int hmc5883l_attach(struct i2c_dev_s *i2c);
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@@ -1,108 +0,0 @@
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/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
/*
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* Driver for the ST L3GD20 gyroscope
|
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*/
|
||||
|
||||
/* IMPORTANT NOTES:
|
||||
*
|
||||
* SPI max. clock frequency: 10 Mhz
|
||||
* CS has to be high before transfer,
|
||||
* go low right before transfer and
|
||||
* go high again right after transfer
|
||||
*
|
||||
*/
|
||||
|
||||
#include <sys/ioctl.h>
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#define _L3GD20BASE 0x6200
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#define L3GD20C(_x) _IOC(_L3GD20BASE, _x)
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||||
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/*
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||||
* Sets the sensor internal sampling rate, and if a buffer
|
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* has been configured, the rate at which entries will be
|
||||
* added to the buffer.
|
||||
*/
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||||
#define L3GD20_SETRATE L3GD20C(1)
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#define L3GD20_RATE_95HZ_LP_12_5HZ ((0<<7) | (0<<6) | (0<<5) | (0<<4))
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#define L3GD20_RATE_95HZ_LP_25HZ ((0<<7) | (0<<6) | (0<<5) | (1<<4))
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#define L3GD20_RATE_190HZ_LP_12_5HZ ((0<<7) | (1<<6) | (0<<5) | (0<<4))
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#define L3GD20_RATE_190HZ_LP_25HZ ((0<<7) | (1<<6) | (0<<5) | (1<<4))
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#define L3GD20_RATE_190HZ_LP_50HZ ((0<<7) | (1<<6) | (1<<5) | (0<<4))
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#define L3GD20_RATE_190HZ_LP_70HZ ((0<<7) | (1<<6) | (1<<5) | (1<<4))
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#define L3GD20_RATE_380HZ_LP_20HZ ((1<<7) | (0<<6) | (0<<5) | (0<<4))
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#define L3GD20_RATE_380HZ_LP_25HZ ((1<<7) | (0<<6) | (0<<5) | (1<<4))
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#define L3GD20_RATE_380HZ_LP_50HZ ((1<<7) | (0<<6) | (1<<5) | (0<<4))
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#define L3GD20_RATE_380HZ_LP_100HZ ((1<<7) | (0<<6) | (1<<5) | (1<<4))
|
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#define L3GD20_RATE_760HZ_LP_30HZ ((1<<7) | (1<<6) | (0<<5) | (0<<4))
|
||||
#define L3GD20_RATE_760HZ_LP_35HZ ((1<<7) | (1<<6) | (0<<5) | (1<<4))
|
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#define L3GD20_RATE_760HZ_LP_50HZ ((1<<7) | (1<<6) | (1<<5) | (0<<4))
|
||||
#define L3GD20_RATE_760HZ_LP_100HZ ((1<<7) | (1<<6) | (1<<5) | (1<<4))
|
||||
|
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/*
|
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* Sets the sensor internal range.
|
||||
*/
|
||||
#define L3GD20_SETRANGE L3GD20C(2)
|
||||
|
||||
#define L3GD20_RANGE_250DPS (0<<4)
|
||||
#define L3GD20_RANGE_500DPS (1<<4)
|
||||
#define L3GD20_RANGE_2000DPS (3<<4)
|
||||
|
||||
#define L3GD20_RATE_95HZ ((0<<6) | (0<<4))
|
||||
#define L3GD20_RATE_190HZ ((1<<6) | (0<<4))
|
||||
#define L3GD20_RATE_380HZ ((2<<6) | (1<<4))
|
||||
#define L3GD20_RATE_760HZ ((3<<6) | (2<<4))
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Sets the address of a shared l3gd20_buffer
|
||||
* structure that is maintained by the driver.
|
||||
*
|
||||
* If zero is passed as the address, disables
|
||||
* the buffer updating.
|
||||
*/
|
||||
#define L3GD20_SETBUFFER L3GD20C(3)
|
||||
|
||||
struct l3gd20_buffer {
|
||||
uint32_t size; /* number of entries in the samples[] array */
|
||||
uint32_t next; /* the next entry that will be populated */
|
||||
struct {
|
||||
int16_t x;
|
||||
int16_t y;
|
||||
int16_t z;
|
||||
} samples[];
|
||||
};
|
||||
|
||||
extern int l3gd20_attach(struct spi_dev_s *spi, int spi_id);
|
||||
@@ -1,83 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Driver for the ST LIS331 MEMS accelerometer
|
||||
*/
|
||||
|
||||
#include <sys/ioctl.h>
|
||||
|
||||
#define _LIS331BASE 0x6900
|
||||
#define LIS331C(_x) _IOC(_LIS331BASE, _x)
|
||||
|
||||
/*
|
||||
* Sets the sensor internal sampling rate, and if a buffer
|
||||
* has been configured, the rate at which entries will be
|
||||
* added to the buffer.
|
||||
*/
|
||||
#define LIS331_SETRATE LIS331C(1)
|
||||
|
||||
#define LIS331_RATE_50Hz (0<<3)
|
||||
#define LIS331_RATE_100Hz (1<<3)
|
||||
#define LIS331_RATE_400Hz (2<<3)
|
||||
#define LIS331_RATE_1000Hz (3<<3)
|
||||
|
||||
/*
|
||||
* Sets the sensor internal range.
|
||||
*/
|
||||
#define LIS331_SETRANGE LIS331C(2)
|
||||
|
||||
#define LIS331_RANGE_2G (0<<4)
|
||||
#define LIS331_RANGE_4G (1<<4)
|
||||
#define LIS331_RANGE_8G (3<<4)
|
||||
|
||||
/*
|
||||
* Sets the address of a shared lis331_buffer
|
||||
* structure that is maintained by the driver.
|
||||
*
|
||||
* If zero is passed as the address, disables
|
||||
* the buffer updating.
|
||||
*/
|
||||
#define LIS331_SETBUFFER LIS331C(3)
|
||||
|
||||
struct lis331_buffer {
|
||||
uint32_t size; /* number of entries in the samples[] array */
|
||||
uint32_t next; /* the next entry that will be populated */
|
||||
struct {
|
||||
uint16_t x;
|
||||
uint16_t y;
|
||||
uint16_t z;
|
||||
} samples[];
|
||||
};
|
||||
|
||||
extern int lis331_attach(struct spi_dev_s *spi, int spi_id);
|
||||
@@ -1,76 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Lorenz Meier. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of the author or the names of contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Driver for the Meas Spec MS5611 barometric pressure sensor
|
||||
*/
|
||||
|
||||
#include <sys/ioctl.h>
|
||||
|
||||
#define _MS5611BASE 0x6A00
|
||||
#define MS5611C(_x) _IOC(_MS5611BASE, _x)
|
||||
|
||||
/*
|
||||
* Sets the sensor internal sampling rate, and if a buffer
|
||||
* has been configured, the rate at which entries will be
|
||||
* added to the buffer.
|
||||
*/
|
||||
#define MS5611_SETRATE MS5611C(1)
|
||||
|
||||
/* set rate (configuration A register */
|
||||
#define MS5611_RATE_0_75HZ (0 << 2) /* 0.75 Hz */
|
||||
|
||||
/*
|
||||
* Sets the sensor internal range.
|
||||
*/
|
||||
#define MS5611_SETRANGE MS5611C(2)
|
||||
|
||||
#define MS5611_RANGE_0_88GA (0 << 5)
|
||||
|
||||
/*
|
||||
* Sets the address of a shared MS5611_buffer
|
||||
* structure that is maintained by the driver.
|
||||
*
|
||||
* If zero is passed as the address, disables
|
||||
* the buffer updating.
|
||||
*/
|
||||
#define MS5611_SETBUFFER MS5611C(3)
|
||||
|
||||
struct ms5611_buffer {
|
||||
uint32_t size; /* number of entries in the samples[] array */
|
||||
uint32_t next; /* the next entry that will be populated */
|
||||
struct {
|
||||
uint32_t pressure;
|
||||
uint16_t temperature;
|
||||
} samples[];
|
||||
};
|
||||
|
||||
extern int ms5611_attach(struct i2c_dev_s *i2c);
|
||||
@@ -41,7 +41,7 @@ ASRCS =
|
||||
AOBJS = $(ASRCS:.S=$(OBJEXT))
|
||||
|
||||
CSRCS = up_boot.c up_leds.c up_spi.c up_hrt.c \
|
||||
drv_gpio.c drv_bma180.c drv_l3gd20.c \
|
||||
drv_gpio.c \
|
||||
drv_led.c drv_eeprom.c \
|
||||
drv_tone_alarm.c up_pwm_servo.c up_usbdev.c \
|
||||
up_cpuload.c
|
||||
|
||||
@@ -1,341 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Lorenz Meier. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of the author or the names of contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Driver for the Bosch BMA 180 MEMS accelerometer
|
||||
*/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/spi.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "px4fmu-internal.h"
|
||||
|
||||
#include <arch/board/drv_bma180.h>
|
||||
|
||||
/*
|
||||
* BMA180 registers
|
||||
*/
|
||||
|
||||
/* Important Notes:
|
||||
*
|
||||
* - MAX SPI clock: 25 MHz
|
||||
* - Readout time: 0.417 ms in high accuracy mode
|
||||
* - Boot / ready time: 1.27 ms
|
||||
*
|
||||
*/
|
||||
|
||||
#define DIR_READ (1<<7)
|
||||
#define DIR_WRITE (0<<7)
|
||||
#define ADDR_INCREMENT (1<<6)
|
||||
|
||||
#define ADDR_CHIP_ID 0x00
|
||||
#define CHIP_ID 0x03
|
||||
#define ADDR_VERSION 0x01
|
||||
|
||||
#define ADDR_CTRL_REG0 0x0D
|
||||
#define ADDR_CTRL_REG1 0x0E
|
||||
#define ADDR_CTRL_REG2 0x0F
|
||||
#define ADDR_BWTCS 0x20
|
||||
#define ADDR_CTRL_REG3 0x21
|
||||
#define ADDR_CTRL_REG4 0x22
|
||||
#define ADDR_OLSB1 0x35
|
||||
|
||||
#define ADDR_ACC_X_LSB 0x02
|
||||
#define ADDR_ACC_Z_MSB 0x07
|
||||
#define ADDR_TEMPERATURE 0x08
|
||||
|
||||
#define ADDR_STATUS_REG1 0x09
|
||||
#define ADDR_STATUS_REG2 0x0A
|
||||
#define ADDR_STATUS_REG3 0x0B
|
||||
#define ADDR_STATUS_REG4 0x0C
|
||||
|
||||
#define ADDR_RESET 0x10
|
||||
#define SOFT_RESET 0xB6
|
||||
|
||||
#define ADDR_DIS_I2C 0x27
|
||||
|
||||
#define REG0_WRITE_ENABLE 0x10
|
||||
|
||||
#define RANGEMASK 0x0E
|
||||
#define BWMASK 0xF0
|
||||
|
||||
|
||||
static ssize_t bma180_read(struct file *filp, FAR char *buffer, size_t buflen);
|
||||
static int bma180_ioctl(struct file *filp, int cmd, unsigned long arg);
|
||||
|
||||
static const struct file_operations bma180_fops = {
|
||||
.read = bma180_read,
|
||||
.ioctl = bma180_ioctl,
|
||||
};
|
||||
|
||||
struct bma180_dev_s
|
||||
{
|
||||
struct spi_dev_s *spi;
|
||||
int spi_id;
|
||||
uint8_t rate;
|
||||
struct bma180_buffer *buffer;
|
||||
};
|
||||
|
||||
static struct bma180_dev_s bma180_dev;
|
||||
|
||||
static void bma180_write_reg(uint8_t address, uint8_t data);
|
||||
static uint8_t bma180_read_reg(uint8_t address);
|
||||
static bool read_fifo(uint16_t *data);
|
||||
static int bma180_set_range(uint8_t range);
|
||||
static int bma180_set_rate(uint8_t rate);
|
||||
|
||||
static void
|
||||
bma180_write_reg(uint8_t address, uint8_t data)
|
||||
{
|
||||
uint8_t cmd[2] = { address | DIR_WRITE, data };
|
||||
|
||||
SPI_SELECT(bma180_dev.spi, bma180_dev.spi_id, true);
|
||||
SPI_SNDBLOCK(bma180_dev.spi, &cmd, sizeof(cmd));
|
||||
SPI_SELECT(bma180_dev.spi, bma180_dev.spi_id, false);
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
bma180_read_reg(uint8_t address)
|
||||
{
|
||||
uint8_t cmd[2] = {address | DIR_READ, 0};
|
||||
uint8_t data[2];
|
||||
|
||||
SPI_SELECT(bma180_dev.spi, bma180_dev.spi_id, true);
|
||||
SPI_EXCHANGE(bma180_dev.spi, cmd, data, sizeof(cmd));
|
||||
SPI_SELECT(bma180_dev.spi, bma180_dev.spi_id, false);
|
||||
|
||||
return data[1];
|
||||
}
|
||||
|
||||
static bool
|
||||
read_fifo(uint16_t *data)
|
||||
{
|
||||
struct { /* status register and data as read back from the device */
|
||||
uint8_t cmd;
|
||||
int16_t x;
|
||||
int16_t y;
|
||||
int16_t z;
|
||||
uint8_t temp;
|
||||
} __attribute__((packed)) report;
|
||||
|
||||
report.cmd = ADDR_ACC_X_LSB | DIR_READ | ADDR_INCREMENT;
|
||||
|
||||
SPI_LOCK(bma180_dev.spi, true);
|
||||
report.x = bma180_read_reg(ADDR_ACC_X_LSB);
|
||||
report.x |= (bma180_read_reg(ADDR_ACC_X_LSB+1) << 8);
|
||||
report.y = bma180_read_reg(ADDR_ACC_X_LSB+2);
|
||||
report.y |= (bma180_read_reg(ADDR_ACC_X_LSB+3) << 8);
|
||||
report.z = bma180_read_reg(ADDR_ACC_X_LSB+4);
|
||||
report.z |= (bma180_read_reg(ADDR_ACC_X_LSB+5) << 8);
|
||||
report.temp = bma180_read_reg(ADDR_ACC_X_LSB+6);
|
||||
SPI_LOCK(bma180_dev.spi, false);
|
||||
|
||||
/* Collect status and remove two top bits */
|
||||
|
||||
uint8_t new_data = (report.x & 0x01) + (report.x & 0x01) + (report.x & 0x01);
|
||||
report.x = (report.x >> 2);
|
||||
report.y = (report.y >> 2);
|
||||
report.z = (report.z >> 2);
|
||||
|
||||
data[0] = report.x;
|
||||
data[1] = report.y;
|
||||
data[2] = report.z;
|
||||
|
||||
/* return 1 for all three axes new */
|
||||
return (new_data > 0); // bit funky, depends on timing
|
||||
}
|
||||
|
||||
static int
|
||||
bma180_set_range(uint8_t range)
|
||||
{
|
||||
/* enable writing to chip config */
|
||||
uint8_t ctrl0 = bma180_read_reg(ADDR_CTRL_REG0);
|
||||
ctrl0 |= REG0_WRITE_ENABLE;
|
||||
bma180_write_reg(ADDR_CTRL_REG0, ctrl0);
|
||||
|
||||
/* set range */
|
||||
uint8_t olsb1 = bma180_read_reg(ADDR_OLSB1);
|
||||
olsb1 &= (~RANGEMASK);
|
||||
olsb1 |= (range);// & RANGEMASK);
|
||||
bma180_write_reg(ADDR_OLSB1, olsb1);
|
||||
|
||||
// up_udelay(500);
|
||||
|
||||
/* block writing to chip config */
|
||||
ctrl0 = bma180_read_reg(ADDR_CTRL_REG0);
|
||||
ctrl0 &= (~REG0_WRITE_ENABLE);
|
||||
bma180_write_reg(ADDR_CTRL_REG0, ctrl0);
|
||||
|
||||
uint8_t new_olsb1 = bma180_read_reg(ADDR_OLSB1);
|
||||
|
||||
/* return 0 on success, 1 on failure */
|
||||
return !(olsb1 == new_olsb1);
|
||||
}
|
||||
|
||||
static int
|
||||
bma180_set_rate(uint8_t rate)
|
||||
{
|
||||
/* enable writing to chip config */
|
||||
uint8_t ctrl0 = bma180_read_reg(ADDR_CTRL_REG0);
|
||||
ctrl0 |= REG0_WRITE_ENABLE;
|
||||
bma180_write_reg(ADDR_CTRL_REG0, ctrl0);
|
||||
|
||||
/* set rate / bandwidth */
|
||||
uint8_t bwtcs = bma180_read_reg(ADDR_BWTCS);
|
||||
bwtcs &= (~BWMASK);
|
||||
bwtcs |= (rate);// & BWMASK);
|
||||
bma180_write_reg(ADDR_BWTCS, bwtcs);
|
||||
|
||||
// up_udelay(500);
|
||||
|
||||
/* block writing to chip config */
|
||||
ctrl0 = bma180_read_reg(ADDR_CTRL_REG0);
|
||||
ctrl0 &= (~REG0_WRITE_ENABLE);
|
||||
bma180_write_reg(ADDR_CTRL_REG0, ctrl0);
|
||||
|
||||
uint8_t new_bwtcs = bma180_read_reg(ADDR_BWTCS);
|
||||
|
||||
/* return 0 on success, 1 on failure */
|
||||
return !(bwtcs == new_bwtcs);
|
||||
}
|
||||
|
||||
static ssize_t
|
||||
bma180_read(struct file *filp, char *buffer, size_t buflen)
|
||||
{
|
||||
/* if the buffer is large enough, and data are available, return success */
|
||||
if (buflen >= 6) {
|
||||
if (read_fifo((uint16_t *)buffer))
|
||||
return 6;
|
||||
|
||||
/* no data */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* buffer too small */
|
||||
errno = ENOSPC;
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static int
|
||||
bma180_ioctl(struct file *filp, int cmd, unsigned long arg)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
switch (cmd) {
|
||||
case BMA180_SETRATE:
|
||||
result = bma180_set_rate(arg);
|
||||
break;
|
||||
|
||||
case BMA180_SETRANGE:
|
||||
result = bma180_set_range(arg);
|
||||
break;
|
||||
|
||||
case BMA180_SETBUFFER:
|
||||
bma180_dev.buffer = (struct bma180_buffer *)arg;
|
||||
result = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if (result)
|
||||
errno = EINVAL;
|
||||
return result;
|
||||
}
|
||||
|
||||
int
|
||||
bma180_attach(struct spi_dev_s *spi, int spi_id)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
bma180_dev.spi = spi;
|
||||
bma180_dev.spi_id = spi_id;
|
||||
|
||||
SPI_LOCK(bma180_dev.spi, true);
|
||||
|
||||
/* verify that the device is attached and functioning */
|
||||
if (bma180_read_reg(ADDR_CHIP_ID) == CHIP_ID) {
|
||||
|
||||
bma180_write_reg(ADDR_RESET, SOFT_RESET); // page 48
|
||||
|
||||
up_udelay(13000); // wait 12 ms, see page 49
|
||||
|
||||
/* Configuring the BMA180 */
|
||||
|
||||
/* enable writing to chip config */
|
||||
uint8_t ctrl0 = bma180_read_reg(ADDR_CTRL_REG0);
|
||||
ctrl0 |= REG0_WRITE_ENABLE;
|
||||
bma180_write_reg(ADDR_CTRL_REG0, ctrl0);
|
||||
|
||||
/* disable I2C interface, datasheet page 31 */
|
||||
uint8_t disi2c = bma180_read_reg(ADDR_DIS_I2C);
|
||||
disi2c |= 0x01;
|
||||
bma180_write_reg(ADDR_DIS_I2C, disi2c);
|
||||
|
||||
/* block writing to chip config */
|
||||
ctrl0 = bma180_read_reg(ADDR_CTRL_REG0);
|
||||
ctrl0 &= (~REG0_WRITE_ENABLE);
|
||||
bma180_write_reg(ADDR_CTRL_REG0, ctrl0);
|
||||
|
||||
// up_udelay(500);
|
||||
|
||||
/* set rate */
|
||||
result = bma180_set_rate(BMA180_RATE_LP_600HZ);
|
||||
|
||||
// up_udelay(500);
|
||||
|
||||
/* set range */
|
||||
result += bma180_set_range(BMA180_RANGE_4G);
|
||||
|
||||
// up_udelay(500);
|
||||
|
||||
if (result == 0) {
|
||||
/* make ourselves available */
|
||||
register_driver("/dev/bma180", &bma180_fops, 0666, NULL);
|
||||
}
|
||||
} else {
|
||||
errno = EIO;
|
||||
}
|
||||
|
||||
SPI_LOCK(bma180_dev.spi, false);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
@@ -1,386 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Lorenz Meier. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name of the author or the names of contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file drv_hmc5883l.c
|
||||
* Driver for the Honeywell/ST HMC5883L MEMS magnetometer
|
||||
*/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdio.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/i2c.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "px4fmu-internal.h"
|
||||
|
||||
#include <arch/board/drv_hmc5883l.h>
|
||||
|
||||
#define ADDR_CONF_A 0x00
|
||||
#define ADDR_CONF_B 0x01
|
||||
#define ADDR_MODE 0x02
|
||||
#define ADDR_DATA_OUT_X_MSB 0x03
|
||||
#define ADDR_DATA_OUT_X_LSB 0x04
|
||||
#define ADDR_DATA_OUT_Z_MSB 0x05
|
||||
#define ADDR_DATA_OUT_Z_LSB 0x06
|
||||
#define ADDR_DATA_OUT_Y_MSB 0x07
|
||||
#define ADDR_DATA_OUT_Y_LSB 0x08
|
||||
#define ADDR_STATUS 0x09
|
||||
#define ADDR_ID_A 0x10
|
||||
#define ADDR_ID_B 0x11
|
||||
#define ADDR_ID_C 0x12
|
||||
|
||||
#define HMC5883L_ADDRESS 0x1E
|
||||
|
||||
/* modes not changeable outside of driver */
|
||||
#define HMC5883L_MODE_NORMAL (0 << 0) /* default */
|
||||
#define HMC5883L_MODE_POSITIVE_BIAS (1 << 0) /* positive bias */
|
||||
#define HMC5883L_MODE_NEGATIVE_BIAS (1 << 1) /* negative bias */
|
||||
|
||||
#define HMC5883L_AVERAGING_1 (0 << 5) /* conf a register */
|
||||
#define HMC5883L_AVERAGING_2 (1 << 5)
|
||||
#define HMC5883L_AVERAGING_4 (2 << 5)
|
||||
#define HMC5883L_AVERAGING_8 (3 << 5)
|
||||
|
||||
#define MODE_REG_CONTINOUS_MODE (0 << 0)
|
||||
#define MODE_REG_SINGLE_MODE (1 << 0) /* default */
|
||||
|
||||
#define STATUS_REG_DATA_OUT_LOCK (1 << 1) /* page 16: set if data is only partially read, read device to reset */
|
||||
#define STATUS_REG_DATA_READY (1 << 0) /* page 16: set if all axes have valid measurements */
|
||||
|
||||
#define ID_A_WHO_AM_I 'H'
|
||||
#define ID_B_WHO_AM_I '4'
|
||||
#define ID_C_WHO_AM_I '3'
|
||||
|
||||
static FAR struct hmc5883l_dev_s hmc5883l_dev;
|
||||
|
||||
static ssize_t hmc5883l_read(struct file *filp, FAR char *buffer, size_t buflen);
|
||||
static int hmc5883l_ioctl(struct file *filp, int cmd, unsigned long arg);
|
||||
|
||||
static const struct file_operations hmc5883l_fops = {
|
||||
.open = 0,
|
||||
.close = 0,
|
||||
.read = hmc5883l_read,
|
||||
.write = 0,
|
||||
.seek = 0,
|
||||
.ioctl = hmc5883l_ioctl,
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
.poll = 0
|
||||
#endif
|
||||
};
|
||||
|
||||
struct hmc5883l_dev_s
|
||||
{
|
||||
struct i2c_dev_s *i2c;
|
||||
uint8_t rate;
|
||||
struct hmc5883l_buffer *buffer;
|
||||
};
|
||||
static bool hmc5883l_calibration_enabled = false;
|
||||
|
||||
static int hmc5883l_write_reg(uint8_t address, uint8_t data);
|
||||
static int hmc5883l_read_reg(uint8_t address);
|
||||
static int hmc5883l_reset(void);
|
||||
|
||||
static int
|
||||
hmc5883l_write_reg(uint8_t address, uint8_t data)
|
||||
{
|
||||
uint8_t cmd[] = {address, data};
|
||||
return I2C_WRITE(hmc5883l_dev.i2c, cmd, 2);
|
||||
}
|
||||
|
||||
static int
|
||||
hmc5883l_read_reg(uint8_t address)
|
||||
{
|
||||
uint8_t cmd = address;
|
||||
uint8_t data;
|
||||
|
||||
int ret = I2C_WRITEREAD(hmc5883l_dev.i2c, &cmd, 1, &data, 1);
|
||||
/* return data on success, error code on failure */
|
||||
if (ret == OK) {
|
||||
ret = data;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
hmc5883l_set_range(uint8_t range)
|
||||
{
|
||||
I2C_SETADDRESS(hmc5883l_dev.i2c, HMC5883L_ADDRESS, 7);
|
||||
|
||||
|
||||
/* mask out illegal bit positions */
|
||||
uint8_t write_range = range; //& REG4_RANGE_MASK;
|
||||
/* immediately return if user supplied invalid value */
|
||||
if (write_range != range) return EINVAL;
|
||||
/* set remaining bits to a sane value */
|
||||
// write_range |= REG4_BDU;
|
||||
/* write to device */
|
||||
hmc5883l_write_reg(ADDR_CONF_B, write_range);
|
||||
/* return 0 if register value is now written value, 1 if unchanged */
|
||||
return !(hmc5883l_read_reg(ADDR_CONF_B) == write_range);
|
||||
}
|
||||
|
||||
static int
|
||||
hmc5883l_set_rate(uint8_t rate)
|
||||
{
|
||||
I2C_SETADDRESS(hmc5883l_dev.i2c, HMC5883L_ADDRESS, 7);
|
||||
/* mask out illegal bit positions */
|
||||
uint8_t write_rate = rate;// & REG1_RATE_LP_MASK;
|
||||
/* immediately return if user supplied invalid value */
|
||||
if (write_rate != rate) return EINVAL;
|
||||
/* set remaining bits to a sane value */
|
||||
// write_rate |= REG1_POWER_NORMAL | REG1_Z_ENABLE | REG1_Y_ENABLE | REG1_X_ENABLE;
|
||||
write_rate |= HMC5883L_AVERAGING_8;
|
||||
/* write to device */
|
||||
hmc5883l_write_reg(ADDR_CONF_A, write_rate);
|
||||
/* return 0 if register value is now written value, 1 if unchanged */
|
||||
return !(hmc5883l_read_reg(ADDR_CONF_A) == write_rate);
|
||||
}
|
||||
|
||||
static int
|
||||
hmc5883l_set_mode(uint8_t mode)
|
||||
{
|
||||
// I2C_SETADDRESS(hmc5883l_dev.i2c, HMC5883L_ADDRESS, 7);
|
||||
// /* mask out illegal bit positions */
|
||||
// uint8_t write_mode = mode & 0x03;
|
||||
// /* immediately return if user supplied invalid value */
|
||||
// if (write_mode != mode) return EINVAL;
|
||||
// /* set mode */
|
||||
// write_mode |= hmc5883l_read_reg(ADDR_CONF_A);
|
||||
// /* set remaining bits to a sane value */
|
||||
// write_mode |= HMC5883L_AVERAGING_8;
|
||||
// /* write to device */
|
||||
// hmc5883l_write_reg(ADDR_CONF_A, write_mode);
|
||||
// /* return 0 if register value is now written value, 1 if unchanged */
|
||||
// return !(hmc5883l_read_reg(ADDR_CONF_A) == write_mode);
|
||||
}
|
||||
|
||||
static bool
|
||||
read_values(int16_t *data)
|
||||
{
|
||||
struct { /* status register and data as read back from the device */
|
||||
int16_t x;
|
||||
int16_t z;
|
||||
int16_t y;
|
||||
uint8_t status;
|
||||
} __attribute__((packed)) hmc_report;
|
||||
hmc_report.status = 0;
|
||||
|
||||
static int read_err_count = 0;
|
||||
|
||||
/* exchange the report structure with the device */
|
||||
|
||||
uint8_t cmd = ADDR_DATA_OUT_X_MSB;
|
||||
|
||||
int ret = 0;
|
||||
|
||||
I2C_SETADDRESS(hmc5883l_dev.i2c, HMC5883L_ADDRESS, 7);
|
||||
|
||||
/* set device into single mode, trigger next measurement */
|
||||
ret = hmc5883l_write_reg(ADDR_MODE, MODE_REG_SINGLE_MODE);
|
||||
|
||||
/* Only execute consecutive steps on success */
|
||||
if (ret == OK)
|
||||
{
|
||||
cmd = ADDR_DATA_OUT_X_MSB;
|
||||
ret = I2C_WRITEREAD(hmc5883l_dev.i2c, &cmd, 1, (uint8_t*)&hmc_report, 6);
|
||||
if (ret == OK)
|
||||
{
|
||||
/* Six bytes to read, stop if timed out */
|
||||
int hmc_status = hmc5883l_read_reg(ADDR_STATUS);
|
||||
if (hmc_status < 0)
|
||||
{
|
||||
//if (hmc_status == ETIMEDOUT)
|
||||
hmc5883l_reset();
|
||||
ret = hmc_status;
|
||||
}
|
||||
else
|
||||
{
|
||||
hmc_report.status = hmc_status;
|
||||
ret = OK;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ret == ETIMEDOUT || ret == -ETIMEDOUT) hmc5883l_reset();
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (ret == ETIMEDOUT || ret == -ETIMEDOUT) hmc5883l_reset();
|
||||
}
|
||||
|
||||
if (ret != OK)
|
||||
{
|
||||
read_err_count++;
|
||||
/* If the last reads failed as well, reset the bus and chip */
|
||||
if (read_err_count > 3) hmc5883l_reset();
|
||||
|
||||
*get_errno_ptr() = -ret;
|
||||
} else {
|
||||
read_err_count = 0;
|
||||
/* write values, and exchange the two 8bit blocks (big endian to little endian) */
|
||||
data[0] = ((hmc_report.x & 0x00FF) << 8) | ((hmc_report.x & 0xFF00) >> 8);
|
||||
data[1] = ((hmc_report.y & 0x00FF) << 8) | ((hmc_report.y & 0xFF00) >> 8);
|
||||
data[2] = ((hmc_report.z & 0x00FF) << 8) | ((hmc_report.z & 0xFF00) >> 8);
|
||||
// XXX TODO
|
||||
// write mode, range and lp-frequency enum values into data[3]-[6]
|
||||
if ((hmc_report.status & STATUS_REG_DATA_READY) > 0)
|
||||
{
|
||||
ret = 14;
|
||||
} else {
|
||||
ret = -EAGAIN;
|
||||
}
|
||||
}
|
||||
|
||||
/* return len if new data is available, error else. hmc_report.status is 0 on errors */
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t
|
||||
hmc5883l_read(struct file *filp, char *buffer, size_t buflen)
|
||||
{
|
||||
/* if the buffer is large enough, and data are available, return success */
|
||||
if (buflen >= 14) {
|
||||
return read_values((int16_t *)buffer);
|
||||
}
|
||||
|
||||
/* buffer too small */
|
||||
*get_errno_ptr() = ENOSPC;
|
||||
return -ERROR;
|
||||
}
|
||||
|
||||
static int
|
||||
hmc5883l_ioctl(struct file *filp, int cmd, unsigned long arg)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
switch (cmd) {
|
||||
case HMC5883L_SETRATE:
|
||||
result = hmc5883l_set_rate(arg);
|
||||
break;
|
||||
|
||||
case HMC5883L_SETRANGE:
|
||||
result = hmc5883l_set_range(arg);
|
||||
break;
|
||||
|
||||
case HMC5883L_CALIBRATION_ON:
|
||||
hmc5883l_calibration_enabled = true;
|
||||
result = OK;
|
||||
break;
|
||||
|
||||
case HMC5883L_CALIBRATION_OFF:
|
||||
hmc5883l_calibration_enabled = false;
|
||||
result = OK;
|
||||
break;
|
||||
//
|
||||
// case HMC5883L_SETBUFFER:
|
||||
// hmc5883l_dev.buffer = (struct hmc5883l_buffer *)arg;
|
||||
// result = 0;
|
||||
// break;
|
||||
|
||||
case HMC5883L_RESET:
|
||||
result = hmc5883l_reset();
|
||||
break;
|
||||
}
|
||||
|
||||
if (result)
|
||||
errno = EINVAL;
|
||||
return result;
|
||||
}
|
||||
|
||||
extern int up_i2creset(FAR struct i2c_dev_s * dev);
|
||||
|
||||
int hmc5883l_reset()
|
||||
{
|
||||
int ret;
|
||||
#if 1
|
||||
ret = up_i2creset(hmc5883l_dev.i2c);
|
||||
printf("HMC5883: BUS RESET %s\n", ret ? "FAIL" : "OK");
|
||||
#else
|
||||
printf("[hmc5883l drv] Resettet I2C2 BUS\n");
|
||||
up_i2cuninitialize(hmc5883l_dev.i2c);
|
||||
hmc5883l_dev.i2c = up_i2cinitialize(2);
|
||||
I2C_SETFREQUENCY(hmc5883l_dev.i2c, 400000);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
hmc5883l_attach(struct i2c_dev_s *i2c)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
hmc5883l_dev.i2c = i2c;
|
||||
|
||||
// I2C_LOCK(hmc5883l_dev.i2c, true);
|
||||
I2C_SETADDRESS(hmc5883l_dev.i2c, HMC5883L_ADDRESS, 7);
|
||||
|
||||
uint8_t cmd = ADDR_STATUS;
|
||||
uint8_t status_id[4] = {0, 0, 0, 0};
|
||||
|
||||
|
||||
int ret = I2C_WRITEREAD(i2c, &cmd, 1, status_id, 4);
|
||||
|
||||
/* verify that the device is attached and functioning */
|
||||
if ((ret >= 0) && (status_id[1] == ID_A_WHO_AM_I) && (status_id[2] == ID_B_WHO_AM_I) && (status_id[3] == ID_C_WHO_AM_I)) {
|
||||
|
||||
/* set update rate to 75 Hz */
|
||||
/* set 0.88 Ga range */
|
||||
if ((ret != 0) || (hmc5883l_set_range(HMC5883L_RANGE_0_88GA) != 0) ||
|
||||
(hmc5883l_set_rate(HMC5883L_RATE_75HZ) != 0))
|
||||
{
|
||||
errno = EIO;
|
||||
} else {
|
||||
|
||||
/* set device into single mode, start measurement */
|
||||
ret = hmc5883l_write_reg(ADDR_MODE, MODE_REG_SINGLE_MODE);
|
||||
|
||||
/* make ourselves available */
|
||||
register_driver("/dev/hmc5883l", &hmc5883l_fops, 0666, NULL);
|
||||
|
||||
result = 0;
|
||||
}
|
||||
|
||||
} else {
|
||||
errno = EIO;
|
||||
}
|
||||
|
||||
|
||||
|
||||
return result;
|
||||
}
|
||||
@@ -1,364 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Driver for the ST L3GD20 MEMS gyroscope
|
||||
*/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/spi.h>
|
||||
#include <arch/board/board.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <arch/board/drv_l3gd20.h>
|
||||
|
||||
#include "chip.h"
|
||||
#include "stm32_internal.h"
|
||||
#include "px4fmu-internal.h"
|
||||
|
||||
#define DIR_READ (1<<7)
|
||||
#define DIR_WRITE (0<<7)
|
||||
#define ADDR_INCREMENT (1<<6)
|
||||
|
||||
#define ADDR_WHO_AM_I 0x0F
|
||||
#define WHO_I_AM 0xD4
|
||||
#define ADDR_CTRL_REG1 0x20
|
||||
#define ADDR_CTRL_REG2 0x21
|
||||
#define ADDR_CTRL_REG3 0x22
|
||||
#define ADDR_CTRL_REG4 0x23
|
||||
#define ADDR_CTRL_REG5 0x24
|
||||
#define ADDR_REFERENCE 0x25
|
||||
#define ADDR_OUT_TEMP 0x26
|
||||
#define ADDR_STATUS_REG 0x27
|
||||
#define ADDR_OUT_X_L 0x28
|
||||
#define ADDR_OUT_X_H 0x29
|
||||
#define ADDR_OUT_Y_L 0x2A
|
||||
#define ADDR_OUT_Y_H 0x2B
|
||||
#define ADDR_OUT_Z_L 0x2C
|
||||
#define ADDR_OUT_Z_H 0x2D
|
||||
#define ADDR_FIFO_CTRL_REG 0x2E
|
||||
#define ADDR_FIFO_SRC_REG 0x2F
|
||||
#define ADDR_INT1_CFG 0x30
|
||||
#define ADDR_INT1_SRC 0x31
|
||||
#define ADDR_INT1_TSH_XH 0x32
|
||||
#define ADDR_INT1_TSH_XL 0x33
|
||||
#define ADDR_INT1_TSH_YH 0x34
|
||||
#define ADDR_INT1_TSH_YL 0x35
|
||||
#define ADDR_INT1_TSH_ZH 0x36
|
||||
#define ADDR_INT1_TSH_ZL 0x37
|
||||
#define ADDR_INT1_DURATION 0x38
|
||||
|
||||
#define REG1_RATE_LP_MASK 0xF0 /* Mask to guard partial register update */
|
||||
#define REG4_RANGE_MASK 0x30 /* Mask to guard partial register update */
|
||||
|
||||
/* Internal configuration values */
|
||||
#define REG1_POWER_NORMAL (1<<3)
|
||||
#define REG1_Z_ENABLE (1<<2)
|
||||
#define REG1_Y_ENABLE (1<<1)
|
||||
#define REG1_X_ENABLE (1<<0)
|
||||
|
||||
#define REG4_BDU (1<<7)
|
||||
#define REG4_BLE (1<<6)
|
||||
//#define REG4_SPI_3WIRE (1<<0)
|
||||
|
||||
#define REG5_FIFO_ENABLE (1<<6)
|
||||
#define REG5_REBOOT_MEMORY (1<<7)
|
||||
|
||||
#define STATUS_ZYXOR (1<<7)
|
||||
#define STATUS_ZOR (1<<6)
|
||||
#define STATUS_YOR (1<<5)
|
||||
#define STATUS_XOR (1<<4)
|
||||
#define STATUS_ZYXDA (1<<3)
|
||||
#define STATUS_ZDA (1<<2)
|
||||
#define STATUS_YDA (1<<1)
|
||||
#define STATUS_XDA (1<<0)
|
||||
|
||||
#define FIFO_CTRL_BYPASS_MODE (0<<5)
|
||||
#define FIFO_CTRL_FIFO_MODE (1<<5)
|
||||
#define FIFO_CTRL_STREAM_MODE (1<<6)
|
||||
#define FIFO_CTRL_STREAM_TO_FIFO_MODE (3<<5)
|
||||
#define FIFO_CTRL_BYPASS_TO_STREAM_MODE (1<<7)
|
||||
|
||||
static FAR struct l3gd20_dev_s l3gd20_dev;
|
||||
|
||||
static ssize_t l3gd20_read(struct file *filp, FAR char *buffer, size_t buflen);
|
||||
static int l3gd20_ioctl(struct file *filp, int cmd, unsigned long arg);
|
||||
|
||||
static const struct file_operations l3gd20_fops = {
|
||||
.open = 0,
|
||||
.close = 0,
|
||||
.read = l3gd20_read,
|
||||
.write = 0,
|
||||
.seek = 0,
|
||||
.ioctl = l3gd20_ioctl,
|
||||
#ifndef CONFIG_DISABLE_POLL
|
||||
.poll = 0
|
||||
#endif
|
||||
};
|
||||
|
||||
struct l3gd20_dev_s
|
||||
{
|
||||
struct spi_dev_s *spi;
|
||||
int spi_id;
|
||||
uint8_t rate;
|
||||
struct l3gd20_buffer *buffer;
|
||||
};
|
||||
|
||||
static void l3gd20_write_reg(uint8_t address, uint8_t data);
|
||||
static uint8_t l3gd20_read_reg(uint8_t address);
|
||||
|
||||
static void
|
||||
l3gd20_write_reg(uint8_t address, uint8_t data)
|
||||
{
|
||||
uint8_t cmd[2] = { address | DIR_WRITE, data };
|
||||
|
||||
SPI_SELECT(l3gd20_dev.spi, l3gd20_dev.spi_id, true);
|
||||
SPI_SNDBLOCK(l3gd20_dev.spi, &cmd, sizeof(cmd));
|
||||
SPI_SELECT(l3gd20_dev.spi, l3gd20_dev.spi_id, false);
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
l3gd20_read_reg(uint8_t address)
|
||||
{
|
||||
uint8_t cmd[2] = {address | DIR_READ, 0};
|
||||
uint8_t data[2];
|
||||
|
||||
SPI_SELECT(l3gd20_dev.spi, l3gd20_dev.spi_id, true);
|
||||
SPI_EXCHANGE(l3gd20_dev.spi, cmd, data, sizeof(cmd));
|
||||
SPI_SELECT(l3gd20_dev.spi, l3gd20_dev.spi_id, false);
|
||||
|
||||
return data[1];
|
||||
}
|
||||
|
||||
static int
|
||||
set_range(uint8_t range)
|
||||
{
|
||||
/* mask out illegal bit positions */
|
||||
uint8_t write_range = range & REG4_RANGE_MASK;
|
||||
/* immediately return if user supplied invalid value */
|
||||
if (write_range != range) return EINVAL;
|
||||
/* set remaining bits to a sane value */
|
||||
write_range |= REG4_BDU;
|
||||
/* write to device */
|
||||
l3gd20_write_reg(ADDR_CTRL_REG4, write_range);
|
||||
/* return 0 if register value is now written value, 1 if unchanged */
|
||||
return !(l3gd20_read_reg(ADDR_CTRL_REG4) == write_range);
|
||||
}
|
||||
|
||||
static int
|
||||
set_rate(uint8_t rate)
|
||||
{
|
||||
/* mask out illegal bit positions */
|
||||
uint8_t write_rate = rate & REG1_RATE_LP_MASK;
|
||||
/* immediately return if user supplied invalid value */
|
||||
if (write_rate != rate) return EINVAL;
|
||||
/* set remaining bits to a sane value */
|
||||
write_rate |= REG1_POWER_NORMAL | REG1_Z_ENABLE | REG1_Y_ENABLE | REG1_X_ENABLE;
|
||||
/* write to device */
|
||||
l3gd20_write_reg(ADDR_CTRL_REG1, write_rate);
|
||||
/* return 0 if register value is now written value, 1 if unchanged */
|
||||
return !(l3gd20_read_reg(ADDR_CTRL_REG1) == write_rate);
|
||||
}
|
||||
|
||||
static int
|
||||
read_fifo(int16_t *data)
|
||||
{
|
||||
|
||||
struct { /* status register and data as read back from the device */
|
||||
uint8_t cmd;
|
||||
uint8_t temp;
|
||||
uint8_t status;
|
||||
int16_t x;
|
||||
int16_t y;
|
||||
int16_t z;
|
||||
} __attribute__((packed)) report = {.status = 11};
|
||||
|
||||
report.cmd = 0x26 | DIR_READ | ADDR_INCREMENT;
|
||||
|
||||
SPI_LOCK(l3gd20_dev.spi, true);
|
||||
SPI_SELECT(l3gd20_dev.spi, PX4_SPIDEV_GYRO, true);
|
||||
SPI_SETFREQUENCY(l3gd20_dev.spi, 25000000);
|
||||
|
||||
SPI_EXCHANGE(l3gd20_dev.spi, &report, &report, sizeof(report));
|
||||
|
||||
/* XXX if the status value is unchanged, attempt a second exchange */
|
||||
if (report.status == 11) SPI_EXCHANGE(l3gd20_dev.spi, &report, &report, sizeof(report));
|
||||
/* XXX set magic error value if this still didn't succeed */
|
||||
if (report.status == 11) report.status = 12;
|
||||
|
||||
SPI_SETFREQUENCY(l3gd20_dev.spi, 10000000);
|
||||
SPI_SELECT(l3gd20_dev.spi, PX4_SPIDEV_GYRO, false);
|
||||
SPI_LOCK(l3gd20_dev.spi, false);
|
||||
|
||||
data[0] = report.x;
|
||||
data[1] = report.y;
|
||||
data[2] = report.z;
|
||||
|
||||
/* if all axes are valid, return buflen (6), else return negative status */
|
||||
int ret = -((int)report.status);
|
||||
if (STATUS_ZYXDA == (report.status & STATUS_ZYXDA) || STATUS_ZYXOR == (report.status & STATUS_ZYXOR))
|
||||
{
|
||||
ret = 6;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t
|
||||
l3gd20_read(struct file *filp, char *buffer, size_t buflen)
|
||||
{
|
||||
/* if the buffer is large enough, and data are available, return success */
|
||||
if (buflen >= 6) {
|
||||
/* return buflen or a negative value */
|
||||
int ret = read_fifo((int16_t *)buffer);
|
||||
if (ret != 6) *get_errno_ptr() = EAGAIN;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* buffer too small */
|
||||
*get_errno_ptr() = ENOSPC;
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static int
|
||||
l3gd20_ioctl(struct file *filp, int cmd, unsigned long arg)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
switch (cmd) {
|
||||
case L3GD20_SETRATE:
|
||||
if ((arg & REG1_RATE_LP_MASK) == arg) {
|
||||
SPI_LOCK(l3gd20_dev.spi, true);
|
||||
set_rate(arg);
|
||||
SPI_LOCK(l3gd20_dev.spi, false);
|
||||
result = 0;
|
||||
l3gd20_dev.rate = arg;
|
||||
}
|
||||
break;
|
||||
|
||||
case L3GD20_SETRANGE:
|
||||
if ((arg & REG4_RANGE_MASK) == arg) {
|
||||
SPI_LOCK(l3gd20_dev.spi, true);
|
||||
set_range(arg);
|
||||
SPI_LOCK(l3gd20_dev.spi, false);
|
||||
result = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case L3GD20_SETBUFFER:
|
||||
l3gd20_dev.buffer = (struct l3gd20_buffer *)arg;
|
||||
result = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if (result)
|
||||
errno = EINVAL;
|
||||
return result;
|
||||
}
|
||||
|
||||
int
|
||||
l3gd20_attach(struct spi_dev_s *spi, int spi_id)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
l3gd20_dev.spi = spi;
|
||||
l3gd20_dev.spi_id = spi_id;
|
||||
|
||||
SPI_LOCK(l3gd20_dev.spi, true);
|
||||
/* read dummy value to void to clear SPI statemachine on sensor */
|
||||
(void)l3gd20_read_reg(ADDR_WHO_AM_I);
|
||||
|
||||
/* verify that the device is attached and functioning */
|
||||
if (l3gd20_read_reg(ADDR_WHO_AM_I) == WHO_I_AM) {
|
||||
|
||||
/* reset device memory */
|
||||
//l3gd20_write_reg(ADDR_CTRL_REG5, REG5_REBOOT_MEMORY);
|
||||
//up_udelay(1000);
|
||||
|
||||
/* set default configuration */
|
||||
l3gd20_write_reg(ADDR_CTRL_REG1, REG1_POWER_NORMAL | REG1_Z_ENABLE | REG1_Y_ENABLE | REG1_X_ENABLE);
|
||||
l3gd20_write_reg(ADDR_CTRL_REG2, 0); /* disable high-pass filters */
|
||||
l3gd20_write_reg(ADDR_CTRL_REG3, 0); /* no interrupts - we don't use them */
|
||||
l3gd20_write_reg(ADDR_CTRL_REG4, 0x10);
|
||||
l3gd20_write_reg(ADDR_CTRL_REG5, 0);
|
||||
|
||||
l3gd20_write_reg(ADDR_CTRL_REG5, REG5_FIFO_ENABLE); /* disable wake-on-interrupt */
|
||||
l3gd20_write_reg(ADDR_FIFO_CTRL_REG, FIFO_CTRL_STREAM_MODE); /* Enable FIFO, old data is overwritten */
|
||||
|
||||
if ((set_range(L3GD20_RANGE_500DPS) != 0) ||
|
||||
(set_rate(L3GD20_RATE_760HZ_LP_100HZ) != 0)) /* takes device out of low-power mode */
|
||||
{
|
||||
errno = EIO;
|
||||
} else {
|
||||
/* Read out the first few funky values */
|
||||
struct { /* status register and data as read back from the device */
|
||||
uint8_t cmd;
|
||||
uint8_t temp;
|
||||
uint8_t status;
|
||||
int16_t x;
|
||||
int16_t y;
|
||||
int16_t z;
|
||||
} __attribute__((packed)) report;
|
||||
|
||||
report.cmd = 0x26 | DIR_READ | ADDR_INCREMENT;
|
||||
|
||||
SPI_SELECT(spi, PX4_SPIDEV_GYRO, true);
|
||||
SPI_EXCHANGE(spi, &report, &report, sizeof(report));
|
||||
SPI_SELECT(spi, PX4_SPIDEV_GYRO, false);
|
||||
up_udelay(500);
|
||||
/* And read another set */
|
||||
SPI_SELECT(spi, PX4_SPIDEV_GYRO, true);
|
||||
SPI_EXCHANGE(spi, &report, &report, sizeof(report));
|
||||
SPI_SELECT(spi, PX4_SPIDEV_GYRO, false);
|
||||
|
||||
|
||||
/* make ourselves available */
|
||||
register_driver("/dev/l3gd20", &l3gd20_fops, 0666, NULL);
|
||||
|
||||
result = 0;
|
||||
}
|
||||
|
||||
} else {
|
||||
|
||||
errno = EIO;
|
||||
}
|
||||
|
||||
SPI_LOCK(l3gd20_dev.spi, false);
|
||||
|
||||
return result;
|
||||
}
|
||||
@@ -1,272 +0,0 @@
|
||||
/****************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 PX4 Development Team. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name PX4 nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/*
|
||||
* Driver for the ST LIS331 MEMS accelerometer
|
||||
*/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/spi.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "chip.h"
|
||||
#include "stm32_internal.h"
|
||||
#include "px4fmu-internal.h"
|
||||
|
||||
#include <arch/board/drv_lis331.h>
|
||||
|
||||
/*
|
||||
* LIS331 registers
|
||||
*/
|
||||
|
||||
#define DIR_READ (1<<7)
|
||||
#define DIR_WRITE (0<<7)
|
||||
#define ADDR_INCREMENT (1<<6)
|
||||
|
||||
#define ADDR_WHO_AM_I 0x0f
|
||||
#define WHO_I_AM 0x32
|
||||
|
||||
#define ADDR_CTRL_REG1 0x20 /* sample rate constants are in the public header */
|
||||
#define REG1_POWER_NORMAL (1<<5)
|
||||
#define REG1_RATE_MASK (3<<3)
|
||||
#define REG1_Z_ENABLE (1<<2)
|
||||
#define REG1_Y_ENABLE (1<<1)
|
||||
#define REG1_X_ENABLE (1<<0)
|
||||
|
||||
#define ADDR_CTRL_REG2 0x21
|
||||
|
||||
#define ADDR_CTRL_REG3 0x22
|
||||
|
||||
#define ADDR_CTRL_REG4 0x23
|
||||
#define REG4_BDU (1<<7)
|
||||
#define REG4_BIG_ENDIAN (1<<6)
|
||||
#define REG4_RANGE_MASK (3<<4)
|
||||
#define REG4_SPI_3WIRE (1<<0)
|
||||
|
||||
#define ADDR_CTRL_REG5 0x24
|
||||
|
||||
#define ADDR_HP_FILTER_RESET 0x25
|
||||
#define ADDR_REFERENCE 0x26
|
||||
#define ADDR_STATUS_REG 0x27
|
||||
#define STATUS_ZYXOR (1<<7)
|
||||
#define STATUS_ZOR (1<<6)
|
||||
#define STATUS_YOR (1<<5)
|
||||
#define STATUS_XOR (1<<4)
|
||||
#define STATUS_ZYXDA (1<<3)
|
||||
#define STATUS_ZDA (1<<2)
|
||||
#define STATUS_YDA (1<<1)
|
||||
#define STATUS_XDA (1<<0)
|
||||
|
||||
#define ADDR_OUT_X 0x28 /* 16 bits */
|
||||
#define ADDR_OUT_Y 0x2A /* 16 bits */
|
||||
#define ADDR_OUT_Z 0x2C /* 16 bits */
|
||||
|
||||
|
||||
static ssize_t lis331_read(struct file *filp, FAR char *buffer, size_t buflen);
|
||||
static int lis331_ioctl(struct file *filp, int cmd, unsigned long arg);
|
||||
|
||||
static const struct file_operations lis331_fops = {
|
||||
.read = lis331_read,
|
||||
.ioctl = lis331_ioctl,
|
||||
};
|
||||
|
||||
struct lis331_dev_s
|
||||
{
|
||||
struct spi_dev_s *spi;
|
||||
int spi_id;
|
||||
|
||||
uint8_t rate;
|
||||
struct lis331_buffer *buffer;
|
||||
};
|
||||
|
||||
static struct lis331_dev_s lis331_dev;
|
||||
|
||||
static void write_reg(uint8_t address, uint8_t data);
|
||||
static uint8_t read_reg(uint8_t address);
|
||||
static bool read_fifo(uint16_t *data);
|
||||
static void set_range(uint8_t range);
|
||||
static void set_rate(uint8_t rate);
|
||||
|
||||
static void
|
||||
write_reg(uint8_t address, uint8_t data)
|
||||
{
|
||||
uint8_t cmd[2] = { address | DIR_WRITE, data };
|
||||
|
||||
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
|
||||
SPI_SNDBLOCK(lis331_dev.spi, &cmd, sizeof(cmd));
|
||||
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
read_reg(uint8_t address)
|
||||
{
|
||||
uint8_t cmd[2] = {address | DIR_READ, 0};
|
||||
uint8_t data[2];
|
||||
|
||||
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
|
||||
SPI_EXCHANGE(lis331_dev.spi, cmd, data, sizeof(cmd));
|
||||
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
|
||||
|
||||
return data[1];
|
||||
}
|
||||
|
||||
static bool
|
||||
read_fifo(uint16_t *data)
|
||||
{
|
||||
struct { /* status register and data as read back from the device */
|
||||
uint8_t cmd;
|
||||
uint8_t status;
|
||||
int16_t x;
|
||||
int16_t y;
|
||||
int16_t z;
|
||||
} __attribute__((packed)) report;
|
||||
|
||||
report.cmd = ADDR_STATUS_REG | DIR_READ | ADDR_INCREMENT;
|
||||
|
||||
/* exchange the report structure with the device */
|
||||
SPI_LOCK(lis331_dev.spi, true);
|
||||
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, true);
|
||||
SPI_EXCHANGE(lis331_dev.spi, &report, &report, sizeof(report));
|
||||
SPI_SELECT(lis331_dev.spi, lis331_dev.spi_id, false);
|
||||
SPI_LOCK(lis331_dev.spi, false);
|
||||
|
||||
data[0] = report.x;
|
||||
data[1] = report.y;
|
||||
data[2] = report.z;
|
||||
|
||||
return report.status & STATUS_ZYXDA;
|
||||
}
|
||||
|
||||
static void
|
||||
set_range(uint8_t range)
|
||||
{
|
||||
range &= REG4_RANGE_MASK;
|
||||
write_reg(ADDR_CTRL_REG4, range | REG4_BDU);
|
||||
}
|
||||
|
||||
static void
|
||||
set_rate(uint8_t rate)
|
||||
{
|
||||
rate &= REG1_RATE_MASK;
|
||||
write_reg(ADDR_CTRL_REG1, rate | REG1_POWER_NORMAL | REG1_Z_ENABLE | REG1_Y_ENABLE | REG1_X_ENABLE);
|
||||
}
|
||||
|
||||
static ssize_t
|
||||
lis331_read(struct file *filp, char *buffer, size_t buflen)
|
||||
{
|
||||
/* if the buffer is large enough, and data are available, return success */
|
||||
if (buflen >= 12) {
|
||||
if (read_fifo((uint16_t *)buffer))
|
||||
return 12;
|
||||
|
||||
/* no data */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* buffer too small */
|
||||
errno = ENOSPC;
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
static int
|
||||
lis331_ioctl(struct file *filp, int cmd, unsigned long arg)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
switch (cmd) {
|
||||
case LIS331_SETRATE:
|
||||
if ((arg & REG1_RATE_MASK) == arg) {
|
||||
set_rate(arg);
|
||||
result = 0;
|
||||
lis331_dev.rate = arg;
|
||||
}
|
||||
break;
|
||||
|
||||
case LIS331_SETRANGE:
|
||||
if ((arg & REG4_RANGE_MASK) == arg) {
|
||||
set_range(arg);
|
||||
result = 0;
|
||||
}
|
||||
break;
|
||||
|
||||
case LIS331_SETBUFFER:
|
||||
lis331_dev.buffer = (struct lis331_buffer *)arg;
|
||||
result = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if (result)
|
||||
errno = EINVAL;
|
||||
return result;
|
||||
}
|
||||
|
||||
int
|
||||
lis331_attach(struct spi_dev_s *spi, int spi_id)
|
||||
{
|
||||
int result = ERROR;
|
||||
|
||||
lis331_dev.spi = spi;
|
||||
|
||||
SPI_LOCK(lis331_dev.spi, true);
|
||||
|
||||
/* verify that the device is attached and functioning */
|
||||
if (read_reg(ADDR_WHO_AM_I) == WHO_I_AM) {
|
||||
|
||||
/* set default configuration */
|
||||
write_reg(ADDR_CTRL_REG2, 0); /* disable interrupt-generating high-pass filters */
|
||||
write_reg(ADDR_CTRL_REG3, 0); /* no interrupts - we don't use them */
|
||||
write_reg(ADDR_CTRL_REG5, 0); /* disable wake-on-interrupt */
|
||||
|
||||
set_range(LIS331_RANGE_4G);
|
||||
set_rate(LIS331_RATE_400Hz); /* takes device out of low-power mode */
|
||||
|
||||
/* make ourselves available */
|
||||
register_driver("/dev/lis331", &lis331_fops, 0666, NULL);
|
||||
|
||||
result = 0;
|
||||
} else {
|
||||
errno = EIO;
|
||||
}
|
||||
|
||||
SPI_LOCK(lis331_dev.spi, false);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user