Updated PX4 use / API of low level GPIO and other hardware-centric system facilities

This commit is contained in:
Lorenz Meier
2016-05-28 14:56:17 +02:00
parent c2e2645c82
commit 7398164fcc
89 changed files with 1294 additions and 1087 deletions
+3 -3
View File
@@ -255,14 +255,14 @@ Airspeed::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+3 -3
View File
@@ -465,14 +465,14 @@ BMA180::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+6 -6
View File
@@ -741,14 +741,14 @@ BMI160::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -837,14 +837,14 @@ BMI160::gyro_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_gyro_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+3 -3
View File
@@ -394,14 +394,14 @@ BMP280::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+6 -6
View File
@@ -225,10 +225,10 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
stm32_configgpio(GPIO_ADC1_IN11); /* J1 breakout */
stm32_configgpio(GPIO_ADC1_IN12); /* J1 breakout */
stm32_configgpio(GPIO_ADC1_IN13); /* J1 breakout */
px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
px4_arch_configgpio(GPIO_ADC1_IN11); /* J1 breakout */
px4_arch_configgpio(GPIO_ADC1_IN12); /* J1 breakout */
px4_arch_configgpio(GPIO_ADC1_IN13); /* J1 breakout */
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -263,7 +263,7 @@ __EXPORT int nsh_archinitialize(void)
led_off(LED_AMBER);
/* Configure Sensors on SPI bus #3 */
spi3 = up_spiinitialize(3);
spi3 = px4_spibus_initialize(3);
if (!spi3) {
message("[boot] FAILED to initialize SPI port 3\n");
@@ -282,7 +282,7 @@ __EXPORT int nsh_archinitialize(void)
message("[boot] Initialized SPI port 3 (SENSORS)\n");
/* Configure FRAM on SPI bus #4 */
spi4 = up_spiinitialize(4);
spi4 = px4_spibus_initialize(4);
if (!spi4) {
message("[boot] FAILED to initialize SPI port 4\n");
+12 -12
View File
@@ -63,19 +63,19 @@ __END_DECLS
__EXPORT void led_init()
{
stm32_configgpio(GPIO_LED0);
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED0);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
switch (led) {
case 0:
stm32_gpiowrite(GPIO_LED0, true);
px4_arch_gpiowrite(GPIO_LED0, true);
break;
case 1:
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
break;
default:
@@ -87,11 +87,11 @@ __EXPORT void led_off(int led)
{
switch (led) {
case 0:
stm32_gpiowrite(GPIO_LED0, false);
px4_arch_gpiowrite(GPIO_LED0, false);
break;
case 1:
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
break;
default:
@@ -103,21 +103,21 @@ __EXPORT void led_toggle(int led)
{
switch (led) {
case 0:
if (stm32_gpioread(GPIO_LED0)) {
stm32_gpiowrite(GPIO_LED0, false);
if (px4_arch_gpioread(GPIO_LED0)) {
px4_arch_gpiowrite(GPIO_LED0, false);
} else {
stm32_gpiowrite(GPIO_LED0, true);
px4_arch_gpiowrite(GPIO_LED0, true);
}
break;
case 1:
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
break;
+27 -27
View File
@@ -70,36 +70,36 @@
__EXPORT void stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI1_NSS);
stm32_gpiowrite(GPIO_SPI1_NSS, 1);
px4_arch_configgpio(GPIO_SPI1_NSS);
px4_arch_gpiowrite(GPIO_SPI1_NSS, 1);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI2_NSS);
stm32_gpiowrite(GPIO_SPI2_NSS, 1);
px4_arch_configgpio(GPIO_SPI2_NSS);
px4_arch_gpiowrite(GPIO_SPI2_NSS, 1);
#endif
#ifdef CONFIG_STM32_SPI3
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
#endif
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI4_NSS);
stm32_gpiowrite(GPIO_SPI4_NSS, 1);
px4_arch_configgpio(GPIO_SPI4_NSS);
px4_arch_gpiowrite(GPIO_SPI4_NSS, 1);
#endif
}
@@ -107,7 +107,7 @@ __EXPORT void stm32_spiinitialize(void)
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there is only one device broken-out so select it */
stm32_gpiowrite(GPIO_SPI1_NSS, !selected);
px4_arch_gpiowrite(GPIO_SPI1_NSS, !selected);
}
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -120,7 +120,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there is only one device broken-out so select it */
stm32_gpiowrite(GPIO_SPI2_NSS, !selected);
px4_arch_gpiowrite(GPIO_SPI2_NSS, !selected);
}
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -137,23 +137,23 @@ __EXPORT void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
break;
case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
break;
default:
@@ -172,7 +172,7 @@ __EXPORT uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI4_NSS, !selected);
px4_arch_gpiowrite(GPIO_SPI4_NSS, !selected);
}
__EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -174,6 +174,21 @@ __BEGIN_DECLS
#define BOARD_NAME "AEROCORE"
#define BOARD_HAS_PWM 8
/* AeroCore breaks out User GPIOs on J11 */
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0}, \
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0}, \
{GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0}, \
{GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0}, \
{GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0}, \
{GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -197,6 +212,9 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
#define board_spi_reset(ms)
#define board_peripheral_reset(ms)
/****************************************************************************
* Name: nsh_archinitialize
+33 -1
View File
@@ -43,7 +43,7 @@
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
@@ -292,6 +292,34 @@ __BEGIN_DECLS
#define BOARD_NAME "MINDPX_V2"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
* system_power interface, and therefore provides the true logic
* GPIO BOARD_ADC_xxxx macros.
*/
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (1)
#define BOARD_ADC_SERVO_VALID (1)
#define BOARD_ADC_PERIPH_5V_OC (0)
#define BOARD_ADC_HIPOWER_5V_OC (0)
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, 0}, \
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, 0}, \
{GPIO_GPIO8_INPUT, GPIO_GPIO8_OUTPUT, 0}, \
{GPIO_GPIO9_INPUT, GPIO_GPIO9_OUTPUT, 0}, \
{GPIO_GPIO10_INPUT, GPIO_GPIO10_OUTPUT, 0}, \
{GPIO_GPIO11_INPUT, GPIO_GPIO11_OUTPUT, 0}, \
{GPIO_GPIO12_INPUT, GPIO_GPIO12_OUTPUT, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -315,9 +343,13 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
void board_spi_reset(int ms);
extern void stm32_usbinitialize(void);
#define board_peripheral_reset(ms)
/****************************************************************************
* Name: nsh_archinitialize
*
+23 -23
View File
@@ -45,7 +45,7 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
#include <stdio.h>
@@ -230,23 +230,23 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_VOLTAGE_SENS */
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_CURRENT_SENS */
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// stm32_configgpio(GPIO_ADC1_IN11); /* unused */
// stm32_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
stm32_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
stm32_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
stm32_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN3); /* BATT_VOLTAGE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN2); /* BATT_CURRENT_SENS */
px4_arch_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// px4_arch_configgpio(GPIO_ADC1_IN11); /* unused */
// px4_arch_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
px4_arch_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
px4_arch_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
px4_arch_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
/* configure power supply control/sense pins */
// stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
// stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// stm32_configgpio(GPIO_VDD_BRICK_VALID);
// stm32_configgpio(GPIO_VDD_SERVO_VALID);
// stm32_configgpio(GPIO_VDD_5V_HIPOWER_OC);
// stm32_configgpio(GPIO_VDD_5V_PERIPH_OC);
// px4_arch_configgpio(GPIO_VDD_5V_PERIPH_EN);
// px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// px4_arch_configgpio(GPIO_VDD_BRICK_VALID);
// px4_arch_configgpio(GPIO_VDD_SERVO_VALID);
// px4_arch_configgpio(GPIO_VDD_5V_HIPOWER_OC);
// px4_arch_configgpio(GPIO_VDD_5V_PERIPH_OC);
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -282,7 +282,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
message("[boot] Initialized SPI port 4 (SENSORS)\n");
spi4 = up_spiinitialize(4);
spi4 = px4_spibus_initialize(4);
if (!spi4) {
message("[boot] FAILED to initialize SPI port 4\n");
@@ -303,7 +303,7 @@ __EXPORT int nsh_archinitialize(void)
/* Get the SPI port for the FRAM */
message("[boot] Initialized SPI port 1 (RAMTRON FRAM)\n");
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
@@ -324,7 +324,7 @@ __EXPORT int nsh_archinitialize(void)
message("[boot] Initialized SPI port 2 (nRF24 and ext)\n");
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
/* Default SPI2 to 10MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi2, 10000000);
@@ -360,12 +360,12 @@ __EXPORT int nsh_archinitialize(void)
#endif
stm32_configgpio(GPIO_I2C2_SCL);
stm32_configgpio(GPIO_I2C2_SDA);
px4_arch_configgpio(GPIO_I2C2_SCL);
px4_arch_configgpio(GPIO_I2C2_SDA);
message("[boot] Initialized ext I2C Port\n");
stm32_configgpio(GPIO_I2C1_SCL);
stm32_configgpio(GPIO_I2C1_SDA);
px4_arch_configgpio(GPIO_I2C1_SCL);
px4_arch_configgpio(GPIO_I2C1_SDA);
message("[boot] Initialized onboard I2C Port\n");
+7 -7
View File
@@ -37,7 +37,7 @@
* PX4FMU LED backend.
*/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
}
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
}
+1 -1
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <errno.h>
#include <debug.h>
+142 -61
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdint.h>
#include <stdbool.h>
@@ -54,6 +54,7 @@
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
@@ -70,42 +71,42 @@
__EXPORT void weak_function stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
// stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_configgpio(GPIO_SPI_CS_MPU);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
// px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM,1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM,1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
stm32_configgpio(GPIO_EXTI_MPU_DRDY);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI_CS_EXT0);
stm32_configgpio(GPIO_SPI_CS_EXT1);
stm32_configgpio(GPIO_SPI_CS_EXT2);
stm32_configgpio(GPIO_SPI_CS_EXT3);
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_configgpio(GPIO_SPI_CS_EXT0);
px4_arch_configgpio(GPIO_SPI_CS_EXT1);
px4_arch_configgpio(GPIO_SPI_CS_EXT2);
px4_arch_configgpio(GPIO_SPI_CS_EXT3);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
#endif
}
@@ -116,40 +117,40 @@ __EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM,1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM,1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
// case PX4_SPIDEV_FLASH:
// stm32_gpiowrite(GPIO_SPI_CS_BARO,1);
// stm32_gpiowrite(GPIO_SPI_CS_FRAM,!selected);
// px4_arch_gpiowrite(GPIO_SPI_CS_BARO,1);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM,!selected);
// break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
default:
@@ -167,7 +168,7 @@ __EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
}
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -184,34 +185,34 @@ __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_EXT0:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT1:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT2:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT3:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
break;
default:
@@ -224,3 +225,83 @@ __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
{
return SPI_STATUS_PRESENT;
}
__EXPORT void board_spi_reset(int ms)
{
/* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_GYRO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
px4_arch_configgpio(GPIO_SPI_CS_BARO_OFF);
// px4_arch_configgpio(GPIO_SPI_CS_FRAM_OFF);
px4_arch_configgpio(GPIO_SPI_CS_MPU_OFF);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
// px4_arch_gpiowrite(GPIO_SPI_CS_FRAM_OFF,0);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
px4_arch_configgpio(GPIO_SPI4_SCK_OFF);
px4_arch_configgpio(GPIO_SPI4_MISO_OFF);
px4_arch_configgpio(GPIO_SPI4_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI4_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI4_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI4_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_GYRO_DRDY_OFF);
px4_arch_configgpio(GPIO_MAG_DRDY_OFF);
px4_arch_configgpio(GPIO_ACCEL_DRDY_OFF);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
px4_arch_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
// /* set the sensor rail off */
// px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
// px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
//
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
//
// /* re-enable power */
//
// /* switch the sensor rail back on */
// px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
//
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI4
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
// px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_configgpio(GPIO_SPI4_SCK);
px4_arch_configgpio(GPIO_SPI4_MISO);
px4_arch_configgpio(GPIO_SPI4_MOSI);
// // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
#endif
}
+4 -4
View File
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <sys/types.h>
#include <stdint.h>
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
@@ -43,7 +43,7 @@
* Included Files
****************************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
@@ -45,7 +45,7 @@
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
#include <stdio.h>
@@ -37,7 +37,7 @@
* PX4-stm32f4discovery LED backend.
*/
#include <nuttx/config.h>
#include <px4_config.h>
#include <stdbool.h>
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
}
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
}
@@ -41,7 +41,7 @@
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <px4_config.h>
#include <sys/types.h>
#include <stdint.h>
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
+22 -1
View File
@@ -155,7 +155,7 @@ __BEGIN_DECLS
#define GPIO_GPIO6_OUTPUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN13)
#define GPIO_GPIO7_OUTPUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN12)
#define GPIO_GPIO_DIR (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
#define BOARD_GPIO_SHARED_BUFFERED_BITS 3
/*
* Tone alarm output
*/
@@ -206,6 +206,24 @@ __BEGIN_DECLS
#define BOARD_NAME "PX4FMU_V1"
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, GPIO_USART2_CTS_1}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, GPIO_USART2_RTS_1}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, GPIO_USART2_TX_1}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, GPIO_USART2_RX_1}, \
{GPIO_GPIO6_INPUT, GPIO_GPIO6_OUTPUT, GPIO_CAN2_TX_2}, \
{GPIO_GPIO7_INPUT, GPIO_GPIO7_OUTPUT, GPIO_CAN2_RX_2}, }
/* BOARD_HAS_MULTI_PURPOSE_GPIO defined because the board
* has alternate uses for GPIO as noted in that the third
* column above has entries.
*/
#define BOARD_HAS_MULTI_PURPOSE_GPIO 1
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -229,9 +247,12 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
#define board_spi_reset(ms)
extern void stm32_usbinitialize(void);
#define board_peripheral_reset(ms)
/****************************************************************************
* Name: nsh_archinitialize
*
+7 -7
View File
@@ -150,8 +150,8 @@ __EXPORT int nsh_archinitialize(void)
int result;
/* configure always-on ADC pins */
stm32_configgpio(GPIO_ADC1_IN10);
stm32_configgpio(GPIO_ADC1_IN11);
px4_arch_configgpio(GPIO_ADC1_IN10);
px4_arch_configgpio(GPIO_ADC1_IN11);
/* IN12 and IN13 further below */
/* configure the high-resolution time/callout interface */
@@ -187,7 +187,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\r\n");
@@ -210,7 +210,7 @@ __EXPORT int nsh_archinitialize(void)
*/
#ifdef CONFIG_STM32_SPI2
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
/* Default SPI2 to 1MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi2, 10000000);
SPI_SETBITS(spi2, 8);
@@ -223,13 +223,13 @@ __EXPORT int nsh_archinitialize(void)
spi2 = NULL;
message("[boot] Enabling IN12/13 instead of SPI2\n");
/* no SPI2, use pins for ADC */
stm32_configgpio(GPIO_ADC1_IN12);
stm32_configgpio(GPIO_ADC1_IN13); // jumperable to MPU6000 DRDY on some boards
px4_arch_configgpio(GPIO_ADC1_IN12);
px4_arch_configgpio(GPIO_ADC1_IN13); // jumperable to MPU6000 DRDY on some boards
#endif
/* Get the SPI port for the microSD slot */
spi3 = up_spiinitialize(3);
spi3 = px4_spibus_initialize(3);
if (!spi3) {
message("[boot] FAILED to initialize SPI port 3\n");
+12 -12
View File
@@ -64,20 +64,20 @@ __EXPORT void led_init(void)
{
/* Configure LED1-2 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
px4_arch_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED2);
}
__EXPORT void led_on(int led)
{
if (led == 0) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED2, false);
px4_arch_gpiowrite(GPIO_LED2, false);
}
}
@@ -85,32 +85,32 @@ __EXPORT void led_off(int led)
{
if (led == 0) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED2, true);
px4_arch_gpiowrite(GPIO_LED2, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 0) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
if (led == 1) {
if (stm32_gpioread(GPIO_LED2)) {
stm32_gpiowrite(GPIO_LED2, false);
if (px4_arch_gpioread(GPIO_LED2)) {
px4_arch_gpiowrite(GPIO_LED2, false);
} else {
stm32_gpiowrite(GPIO_LED2, true);
px4_arch_gpiowrite(GPIO_LED2, true);
}
}
}
+18 -18
View File
@@ -69,19 +69,19 @@
__EXPORT void stm32_spiinitialize(void)
{
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL);
stm32_configgpio(GPIO_SPI_CS_MPU);
stm32_configgpio(GPIO_SPI_CS_SDCARD);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
px4_arch_configgpio(GPIO_SPI_CS_SDCARD);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_gpiowrite(GPIO_SPI_CS_SDCARD, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_SDCARD, 1);
}
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
@@ -91,23 +91,23 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
break;
case PX4_SPIDEV_ACCEL:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
default:
@@ -143,7 +143,7 @@ __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI_CS_SDCARD, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_SDCARD, !selected);
}
__EXPORT uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+3 -3
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
@@ -244,6 +244,32 @@ __BEGIN_DECLS
#define BOARD_NAME "PX4FMU_V2"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
* system_power interface, and therefore provides the true logic
* GPIO BOARD_ADC_xxxx macros.
*/
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (!px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
#define BOARD_ADC_SERVO_VALID (!px4_arch_gpioread(GPIO_VDD_SERVO_VALID))
#define BOARD_ADC_PERIPH_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_PERIPH_OC))
#define BOARD_ADC_HIPOWER_5V_OC (!px4_arch_gpioread(GPIO_VDD_5V_HIPOWER_OC))
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{0, GPIO_VDD_5V_PERIPH_EN, 0}, \
{0, GPIO_VDD_3V3_SENSORS_EN, 0}, \
{GPIO_VDD_BRICK_VALID, 0, 0}, \
{GPIO_VDD_SERVO_VALID, 0, 0}, \
{GPIO_VDD_5V_HIPOWER_OC, 0, 0}, \
{GPIO_VDD_5V_PERIPH_OC, 0, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -267,9 +293,12 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
extern void board_spi_reset(int ms);
extern void stm32_usbinitialize(void);
extern void board_peripheral_reset(int ms);
/****************************************************************************
* Name: nsh_archinitialize
*
+47 -24
View File
@@ -71,6 +71,7 @@
#include <systemlib/cpuload.h>
#include <systemlib/perf_counter.h>
#include <systemlib/err.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -177,6 +178,28 @@ fat_dma_free(FAR void *memory, size_t size)
#endif
/************************************************************************************
* Name: board_peripheral_reset
*
* Description:
*
************************************************************************************/
__EXPORT void board_peripheral_reset(int ms)
{
/* set the peripheral rails off */
px4_arch_configgpio(GPIO_VDD_5V_PERIPH_EN);
px4_arch_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 1);
/* wait for the peripheral rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the peripheral rail back on */
px4_arch_gpiowrite(GPIO_VDD_5V_PERIPH_EN, 0);
}
/************************************************************************************
* Name: stm32_boardinitialize
*
@@ -216,31 +239,31 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
// stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// stm32_configgpio(GPIO_ADC1_IN11); /* unused */
// stm32_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
stm32_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
stm32_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
stm32_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
px4_arch_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
// px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
// px4_arch_configgpio(GPIO_ADC1_IN11); /* unused */
// px4_arch_configgpio(GPIO_ADC1_IN12); /* used by MPU6000 CS */
px4_arch_configgpio(GPIO_ADC1_IN13); /* FMU_AUX_ADC_1 */
px4_arch_configgpio(GPIO_ADC1_IN14); /* FMU_AUX_ADC_2 */
px4_arch_configgpio(GPIO_ADC1_IN15); /* PRESSURE_SENS */
/* configure power supply control/sense pins */
stm32_configgpio(GPIO_VDD_5V_PERIPH_EN);
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
stm32_configgpio(GPIO_VDD_BRICK_VALID);
stm32_configgpio(GPIO_VDD_SERVO_VALID);
stm32_configgpio(GPIO_VDD_5V_HIPOWER_OC);
stm32_configgpio(GPIO_VDD_5V_PERIPH_OC);
px4_arch_configgpio(GPIO_VDD_5V_PERIPH_EN);
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_configgpio(GPIO_VDD_BRICK_VALID);
px4_arch_configgpio(GPIO_VDD_SERVO_VALID);
px4_arch_configgpio(GPIO_VDD_5V_HIPOWER_OC);
px4_arch_configgpio(GPIO_VDD_5V_PERIPH_OC);
/* configure the GPIO pins to outputs and keep them low */
stm32_configgpio(GPIO_GPIO0_OUTPUT);
stm32_configgpio(GPIO_GPIO1_OUTPUT);
stm32_configgpio(GPIO_GPIO2_OUTPUT);
stm32_configgpio(GPIO_GPIO3_OUTPUT);
stm32_configgpio(GPIO_GPIO4_OUTPUT);
stm32_configgpio(GPIO_GPIO5_OUTPUT);
px4_arch_configgpio(GPIO_GPIO0_OUTPUT);
px4_arch_configgpio(GPIO_GPIO1_OUTPUT);
px4_arch_configgpio(GPIO_GPIO2_OUTPUT);
px4_arch_configgpio(GPIO_GPIO3_OUTPUT);
px4_arch_configgpio(GPIO_GPIO4_OUTPUT);
px4_arch_configgpio(GPIO_GPIO5_OUTPUT);
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -276,7 +299,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
@@ -296,7 +319,7 @@ __EXPORT int nsh_archinitialize(void)
/* Get the SPI port for the FRAM */
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
if (!spi2) {
message("[boot] FAILED to initialize SPI port 2\n");
@@ -313,7 +336,7 @@ __EXPORT int nsh_archinitialize(void)
SPI_SETMODE(spi2, SPIDEV_MODE3);
SPI_SELECT(spi2, SPIDEV_FLASH, false);
spi4 = up_spiinitialize(4);
spi4 = px4_spibus_initialize(4);
/* Default SPI4 to 1MHz and de-assert the known chip selects. */
SPI_SETFREQUENCY(spi4, 10000000);
+6 -6
View File
@@ -64,14 +64,14 @@ __EXPORT void led_init()
{
/* Configure LED1 GPIO for output */
stm32_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED1);
}
__EXPORT void led_on(int led)
{
if (led == 1) {
/* Pull down to switch on */
stm32_gpiowrite(GPIO_LED1, false);
px4_arch_gpiowrite(GPIO_LED1, false);
}
}
@@ -79,18 +79,18 @@ __EXPORT void led_off(int led)
{
if (led == 1) {
/* Pull up to switch off */
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
__EXPORT void led_toggle(int led)
{
if (led == 1) {
if (stm32_gpioread(GPIO_LED1)) {
stm32_gpiowrite(GPIO_LED1, false);
if (px4_arch_gpioread(GPIO_LED1)) {
px4_arch_gpiowrite(GPIO_LED1, false);
} else {
stm32_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED1, true);
}
}
}
+149 -72
View File
@@ -46,7 +46,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <unistd.h>
#include <nuttx/spi.h>
#include <arch/board/board.h>
@@ -54,6 +54,7 @@
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
@@ -70,42 +71,42 @@
__EXPORT void stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_GYRO);
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
stm32_configgpio(GPIO_SPI_CS_BARO);
stm32_configgpio(GPIO_SPI_CS_HMC);
stm32_configgpio(GPIO_SPI_CS_MPU);
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_HMC);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
stm32_configgpio(GPIO_EXTI_MPU_DRDY);
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif
#ifdef CONFIG_STM32_SPI4
stm32_configgpio(GPIO_SPI_CS_EXT0);
stm32_configgpio(GPIO_SPI_CS_EXT1);
stm32_configgpio(GPIO_SPI_CS_EXT2);
stm32_configgpio(GPIO_SPI_CS_EXT3);
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_configgpio(GPIO_SPI_CS_EXT0);
px4_arch_configgpio(GPIO_SPI_CS_EXT1);
px4_arch_configgpio(GPIO_SPI_CS_EXT2);
px4_arch_configgpio(GPIO_SPI_CS_EXT3);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
#endif
}
@@ -116,56 +117,56 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_GYRO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_ACCEL_MAG:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_LIS:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_LIS, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_LIS, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC, 1);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
default:
@@ -183,7 +184,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
/* there can only be one device on this bus, so always select it */
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
}
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -200,34 +201,34 @@ __EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_EXT0:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT1:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT2:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, 1);
break;
case PX4_SPIDEV_EXT3:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_EXT0, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT1, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT2, 1);
stm32_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT0, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT1, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT2, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_EXT3, !selected);
break;
default:
@@ -240,3 +241,79 @@ __EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
{
return SPI_STATUS_PRESENT;
}
__EXPORT void board_spi_reset(int ms)
{
/* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_GYRO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG_OFF);
px4_arch_configgpio(GPIO_SPI_CS_BARO_OFF);
px4_arch_configgpio(GPIO_SPI_CS_MPU_OFF);
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU_OFF, 0);
px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_GYRO_DRDY_OFF);
px4_arch_configgpio(GPIO_MAG_DRDY_OFF);
px4_arch_configgpio(GPIO_ACCEL_DRDY_OFF);
px4_arch_configgpio(GPIO_EXTI_MPU_DRDY_OFF);
px4_arch_gpiowrite(GPIO_GYRO_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_MAG_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_ACCEL_DRDY_OFF, 0);
px4_arch_gpiowrite(GPIO_EXTI_MPU_DRDY_OFF, 0);
/* set the sensor rail off */
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the sensor rail back on */
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
px4_arch_configgpio(GPIO_SPI_CS_BARO);
px4_arch_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU, 1);
px4_arch_configgpio(GPIO_SPI1_SCK);
px4_arch_configgpio(GPIO_SPI1_MISO);
px4_arch_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
}
+3 -3
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
+33 -6
View File
@@ -251,10 +251,10 @@ __BEGIN_DECLS
#define GPIO_PERIPH_3V3_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN5)
/* for R07, this signal is active low */
//#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
//#define INVERT_RC_INPUT(_s) stm32_gpiowrite(GPIO_SBUS_INV, 1-_s);
//#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, 1-_s);
/* for R12, this signal is active high */
#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
#define INVERT_RC_INPUT(_s) stm32_gpiowrite(GPIO_SBUS_INV, _s);
#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, _s);
#define GPIO_8266_GPIO0 (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN2)
#define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN4)
@@ -263,18 +263,41 @@ __BEGIN_DECLS
/* Power switch controls ******************************************************/
#define POWER_SPEKTRUM(_s) stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (1-_s))
#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (1-_s))
//#define GPIO_USART1_RX_SPEKTRUM (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7)
#define SPEKTRUM_RX_AS_UART() stm32_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
// FMUv4 has a separate GPIO for serial RC output
#define GPIO_RC_OUT (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)
#define SPEKTRUM_RX_AS_GPIO() stm32_configgpio(GPIO_RC_OUT)
#define SPEKTRUM_RX_HIGH(_s) stm32_gpiowrite(GPIO_RC_OUT, (_s))
#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_RC_OUT)
#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_RC_OUT, (_s))
#define BOARD_NAME "PX4FMU_V4"
/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
* system_power interface, and herefore provides the true logic
* GPIO BOARD_ADC_xxxx macros.
*/
#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
#define BOARD_ADC_SERVO_VALID (1)
#define BOARD_ADC_PERIPH_5V_OC (0)
#define BOARD_ADC_HIPOWER_5V_OC (0)
#define BOARD_HAS_PWM DIRECT_PWM_OUTPUT_CHANNELS
#define BOARD_FMU_GPIO_TAB { \
{GPIO_GPIO0_INPUT, GPIO_GPIO0_OUTPUT, 0}, \
{GPIO_GPIO1_INPUT, GPIO_GPIO1_OUTPUT, 0}, \
{GPIO_GPIO2_INPUT, GPIO_GPIO2_OUTPUT, 0}, \
{GPIO_GPIO3_INPUT, GPIO_GPIO3_OUTPUT, 0}, \
{GPIO_GPIO4_INPUT, GPIO_GPIO4_OUTPUT, 0}, \
{GPIO_GPIO5_INPUT, GPIO_GPIO5_OUTPUT, 0}, \
{0, GPIO_VDD_3V3_SENSORS_EN, 0}, \
{GPIO_VDD_BRICK_VALID, 0, 0}, }
/****************************************************************************************************
* Public Types
****************************************************************************************************/
@@ -298,9 +321,13 @@ __BEGIN_DECLS
****************************************************************************************************/
extern void stm32_spiinitialize(void);
void board_spi_reset(int ms);
extern void stm32_usbinitialize(void);
extern void board_peripheral_reset(int ms);
/****************************************************************************
* Name: nsh_archinitialize
*
+52 -22
View File
@@ -71,6 +71,7 @@
#include <systemlib/cpuload.h>
#include <systemlib/perf_counter.h>
#include <systemlib/err.h>
/****************************************************************************
* Pre-Processor Definitions
@@ -177,6 +178,35 @@ fat_dma_free(FAR void *memory, size_t size)
#endif
/************************************************************************************
* Name: board_peripheral_reset
*
* Description:
*
************************************************************************************/
__EXPORT void board_peripheral_reset(int ms)
{
/* set the peripheral rails off */
px4_arch_configgpio(GPIO_PERIPH_3V3_EN);
px4_arch_gpiowrite(GPIO_PERIPH_3V3_EN, 0);
bool last = px4_arch_gpioread(GPIO_SPEKTRUM_PWR_EN);
/* Keep Spektum on to discharge rail*/
px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, 1);
/* wait for the peripheral rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the peripheral rail back on */
px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, last);
px4_arch_gpiowrite(GPIO_PERIPH_3V3_EN, 1);
}
/************************************************************************************
* Name: stm32_boardinitialize
*
@@ -215,34 +245,34 @@ __EXPORT int nsh_archinitialize(void)
{
/* configure ADC pins */
stm32_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
stm32_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
stm32_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
stm32_configgpio(GPIO_ADC1_IN11); /* RSSI analog in */
px4_arch_configgpio(GPIO_ADC1_IN2); /* BATT_VOLTAGE_SENS */
px4_arch_configgpio(GPIO_ADC1_IN3); /* BATT_CURRENT_SENS */
px4_arch_configgpio(GPIO_ADC1_IN4); /* VDD_5V_SENS */
px4_arch_configgpio(GPIO_ADC1_IN11); /* RSSI analog in */
/* configure power supply control/sense pins */
stm32_configgpio(GPIO_PERIPH_3V3_EN);
stm32_configgpio(GPIO_VDD_BRICK_VALID);
px4_arch_configgpio(GPIO_PERIPH_3V3_EN);
px4_arch_configgpio(GPIO_VDD_BRICK_VALID);
stm32_configgpio(GPIO_SBUS_INV);
stm32_configgpio(GPIO_8266_GPIO0);
stm32_configgpio(GPIO_SPEKTRUM_PWR_EN);
stm32_configgpio(GPIO_8266_PD);
stm32_configgpio(GPIO_8266_RST);
stm32_configgpio(GPIO_BTN_SAFETY);
px4_arch_configgpio(GPIO_SBUS_INV);
px4_arch_configgpio(GPIO_8266_GPIO0);
px4_arch_configgpio(GPIO_SPEKTRUM_PWR_EN);
px4_arch_configgpio(GPIO_8266_PD);
px4_arch_configgpio(GPIO_8266_RST);
px4_arch_configgpio(GPIO_BTN_SAFETY);
#ifdef GPIO_RC_OUT
stm32_configgpio(GPIO_RC_OUT); /* Serial RC output pin */
stm32_gpiowrite(GPIO_RC_OUT, 1); /* set it high to pull RC input up */
px4_arch_configgpio(GPIO_RC_OUT); /* Serial RC output pin */
px4_arch_gpiowrite(GPIO_RC_OUT, 1); /* set it high to pull RC input up */
#endif
/* configure the GPIO pins to outputs and keep them low */
stm32_configgpio(GPIO_GPIO0_OUTPUT);
stm32_configgpio(GPIO_GPIO1_OUTPUT);
stm32_configgpio(GPIO_GPIO2_OUTPUT);
stm32_configgpio(GPIO_GPIO3_OUTPUT);
stm32_configgpio(GPIO_GPIO4_OUTPUT);
stm32_configgpio(GPIO_GPIO5_OUTPUT);
px4_arch_configgpio(GPIO_GPIO0_OUTPUT);
px4_arch_configgpio(GPIO_GPIO1_OUTPUT);
px4_arch_configgpio(GPIO_GPIO2_OUTPUT);
px4_arch_configgpio(GPIO_GPIO3_OUTPUT);
px4_arch_configgpio(GPIO_GPIO4_OUTPUT);
px4_arch_configgpio(GPIO_GPIO5_OUTPUT);
/* configure the high-resolution time/callout interface */
hrt_init();
@@ -280,7 +310,7 @@ __EXPORT int nsh_archinitialize(void)
/* Configure SPI-based devices */
spi1 = up_spiinitialize(1);
spi1 = px4_spibus_initialize(1);
if (!spi1) {
message("[boot] FAILED to initialize SPI port 1\n");
@@ -299,7 +329,7 @@ __EXPORT int nsh_archinitialize(void)
/* Get the SPI port for the FRAM */
spi2 = up_spiinitialize(2);
spi2 = px4_spibus_initialize(2);
if (!spi2) {
message("[boot] FAILED to initialize SPI port 2\n");
+3 -3
View File
@@ -73,20 +73,20 @@ __EXPORT void led_init(void)
{
/* Configure LED GPIOs for output */
for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
stm32_configgpio(g_ledmap[l]);
px4_arch_configgpio(g_ledmap[l]);
}
}
static void phy_set_led(int led, bool state)
{
/* Pull Down to switch on */
stm32_gpiowrite(g_ledmap[led], !state);
px4_arch_gpiowrite(g_ledmap[led], !state);
}
static bool phy_get_led(int led)
{
return !stm32_gpioread(g_ledmap[led]);
return !px4_arch_gpioread(g_ledmap[led]);
}
__EXPORT void led_on(int led)
+110 -33
View File
@@ -46,6 +46,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <unistd.h>
#include <nuttx/spi.h>
#include <arch/board/board.h>
@@ -54,6 +55,7 @@
#include <chip.h>
#include <stm32.h>
#include "board_config.h"
#include <systemlib/err.h>
/************************************************************************************
* Public Functions
@@ -70,28 +72,28 @@
__EXPORT void stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_MPU9250);
stm32_configgpio(GPIO_SPI_CS_HMC5983);
stm32_configgpio(GPIO_SPI_CS_MS5611);
stm32_configgpio(GPIO_SPI_CS_ICM_20608_G);
px4_arch_configgpio(GPIO_SPI_CS_MPU9250);
px4_arch_configgpio(GPIO_SPI_CS_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
stm32_configgpio(GPIO_DRDY_MPU9250);
stm32_configgpio(GPIO_DRDY_HMC5983);
stm32_configgpio(GPIO_DRDY_ICM_20608_G);
px4_arch_configgpio(GPIO_DRDY_MPU9250);
px4_arch_configgpio(GPIO_DRDY_HMC5983);
px4_arch_configgpio(GPIO_DRDY_ICM_20608_G);
#endif
#ifdef CONFIG_STM32_SPI2
stm32_configgpio(GPIO_SPI_CS_FRAM);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_configgpio(GPIO_SPI_CS_FRAM);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
#endif
}
@@ -103,10 +105,10 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case PX4_SPIDEV_ICM:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, !selected);
break;
case PX4_SPIDEV_ACCEL_MAG:
@@ -115,26 +117,26 @@ __EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
break;
case PX4_SPIDEV_HMC:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
break;
case PX4_SPIDEV_MPU:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MPU9250, !selected);
stm32_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
break;
default:
@@ -156,14 +158,14 @@ __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
switch (devid) {
case SPIDEV_FLASH:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
break;
case PX4_SPIDEV_BARO:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
stm32_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
break;
default:
@@ -177,3 +179,78 @@ __EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
return SPI_STATUS_PRESENT;
}
#endif
__EXPORT void board_spi_reset(int ms)
{
/* disable SPI bus */
px4_arch_configgpio(GPIO_SPI_CS_OFF_MPU9250);
px4_arch_configgpio(GPIO_SPI_CS_OFF_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_OFF_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_OFF_ICM_20608_G);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MPU9250, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_HMC5983, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_MS5611, 0);
px4_arch_gpiowrite(GPIO_SPI_CS_OFF_ICM_20608_G, 0);
px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
px4_arch_configgpio(GPIO_DRDY_OFF_MPU9250);
px4_arch_configgpio(GPIO_DRDY_OFF_HMC5983);
px4_arch_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
px4_arch_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
px4_arch_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
px4_arch_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
/* set the sensor rail off */
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
/* wait for the sensor rail to reach GND */
usleep(ms * 1000);
warnx("reset done, %d ms", ms);
/* re-enable power */
/* switch the sensor rail back on */
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
/* wait a bit before starting SPI, different times didn't influence results */
usleep(100);
/* reconfigure the SPI pins */
#ifdef CONFIG_STM32_SPI1
px4_arch_configgpio(GPIO_SPI_CS_MPU9250);
px4_arch_configgpio(GPIO_SPI_CS_HMC5983);
px4_arch_configgpio(GPIO_SPI_CS_MS5611);
px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
/* De-activate all peripherals,
* required for some peripheral
* state machines
*/
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
px4_arch_configgpio(GPIO_SPI1_SCK);
px4_arch_configgpio(GPIO_SPI1_MISO);
px4_arch_configgpio(GPIO_SPI1_MOSI);
// // XXX bring up the EXTI pins again
// px4_arch_configgpio(GPIO_GYRO_DRDY);
// px4_arch_configgpio(GPIO_MAG_DRDY);
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
#endif
}
+3 -3
View File
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
px4_arch_configgpio(GPIO_OTGFS_VBUS);
/* XXX We only support device mode
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
px4_arch_configgpio(GPIO_OTGFS_PWRON);
px4_arch_configgpio(GPIO_OTGFS_OVER);
*/
#endif
}
+4 -4
View File
@@ -84,11 +84,11 @@
#define GPIO_RELAY2_EN (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN11)
#define GPIO_SPEKTRUM_PWR_EN GPIO_RELAY1_EN
#define POWER_SPEKTRUM(_s) stm32_gpiowrite(GPIO_RELAY1_EN, (_s))
#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_RELAY1_EN, (_s))
#define SPEKTRUM_RX_HIGH(_s) stm32_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() stm32_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() stm32_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_USART1_RX_SPEKTRUM)
/* Analog inputs ********************************************************************/
+16 -16
View File
@@ -81,26 +81,26 @@
__EXPORT void stm32_boardinitialize(void)
{
/* configure GPIOs */
stm32_configgpio(GPIO_ACC1_PWR_EN);
stm32_configgpio(GPIO_ACC2_PWR_EN);
stm32_configgpio(GPIO_SERVO_PWR_EN);
stm32_configgpio(GPIO_RELAY1_EN);
stm32_configgpio(GPIO_RELAY2_EN);
px4_arch_configgpio(GPIO_ACC1_PWR_EN);
px4_arch_configgpio(GPIO_ACC2_PWR_EN);
px4_arch_configgpio(GPIO_SERVO_PWR_EN);
px4_arch_configgpio(GPIO_RELAY1_EN);
px4_arch_configgpio(GPIO_RELAY2_EN);
/* turn off - all leds are active low */
stm32_gpiowrite(GPIO_LED1, true);
stm32_gpiowrite(GPIO_LED2, true);
stm32_gpiowrite(GPIO_LED3, true);
px4_arch_gpiowrite(GPIO_LED1, true);
px4_arch_gpiowrite(GPIO_LED2, true);
px4_arch_gpiowrite(GPIO_LED3, true);
/* LED config */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
px4_arch_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED2);
px4_arch_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_ACC_OC_DETECT);
stm32_configgpio(GPIO_SERVO_OC_DETECT);
stm32_configgpio(GPIO_BTN_SAFETY);
px4_arch_configgpio(GPIO_ACC_OC_DETECT);
px4_arch_configgpio(GPIO_SERVO_OC_DETECT);
px4_arch_configgpio(GPIO_BTN_SAFETY);
stm32_configgpio(GPIO_ADC_VBATT);
stm32_configgpio(GPIO_ADC_IN5);
px4_arch_configgpio(GPIO_ADC_VBATT);
px4_arch_configgpio(GPIO_ADC_IN5);
}
+4 -4
View File
@@ -88,11 +88,11 @@
/* Power switch controls ******************************************************/
#define GPIO_SPEKTRUM_PWR_EN (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
#define POWER_SPEKTRUM(_s) stm32_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (_s))
#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (_s))
#define SPEKTRUM_RX_HIGH(_s) stm32_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() stm32_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() stm32_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define SPEKTRUM_RX_HIGH(_s) px4_arch_gpiowrite(GPIO_USART1_RX_SPEKTRUM, (_s))
#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
#define SPEKTRUM_RX_AS_GPIO() px4_arch_configgpio(GPIO_USART1_RX_SPEKTRUM)
#define GPIO_SERVO_FAULT_DETECT (GPIO_INPUT|GPIO_CNF_INPULLUP|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)
+31 -31
View File
@@ -105,55 +105,55 @@ __EXPORT void stm32_boardinitialize(void)
/* configure GPIOs */
/* LEDS - default to off */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
px4_arch_configgpio(GPIO_LED1);
px4_arch_configgpio(GPIO_LED2);
px4_arch_configgpio(GPIO_LED3);
px4_arch_configgpio(GPIO_LED4);
stm32_configgpio(GPIO_BTN_SAFETY);
px4_arch_configgpio(GPIO_BTN_SAFETY);
/* spektrum power enable is active high - enable it by default */
stm32_configgpio(GPIO_SPEKTRUM_PWR_EN);
px4_arch_configgpio(GPIO_SPEKTRUM_PWR_EN);
stm32_configgpio(GPIO_SERVO_FAULT_DETECT);
px4_arch_configgpio(GPIO_SERVO_FAULT_DETECT);
/* RSSI inputs */
stm32_configgpio(GPIO_TIM_RSSI); /* xxx alternate function */
stm32_configgpio(GPIO_ADC_RSSI);
px4_arch_configgpio(GPIO_TIM_RSSI); /* xxx alternate function */
px4_arch_configgpio(GPIO_ADC_RSSI);
/* servo rail voltage */
stm32_configgpio(GPIO_ADC_VSERVO);
px4_arch_configgpio(GPIO_ADC_VSERVO);
stm32_configgpio(GPIO_SBUS_INPUT); /* xxx alternate function */
stm32_configgpio(GPIO_SBUS_OUTPUT);
px4_arch_configgpio(GPIO_SBUS_INPUT); /* xxx alternate function */
px4_arch_configgpio(GPIO_SBUS_OUTPUT);
/* sbus output enable is active low - disable it by default */
stm32_gpiowrite(GPIO_SBUS_OENABLE, true);
stm32_configgpio(GPIO_SBUS_OENABLE);
px4_arch_gpiowrite(GPIO_SBUS_OENABLE, true);
px4_arch_configgpio(GPIO_SBUS_OENABLE);
stm32_configgpio(GPIO_PPM); /* xxx alternate function */
px4_arch_configgpio(GPIO_PPM); /* xxx alternate function */
stm32_gpiowrite(GPIO_PWM1, true);
stm32_configgpio(GPIO_PWM1);
px4_arch_gpiowrite(GPIO_PWM1, true);
px4_arch_configgpio(GPIO_PWM1);
stm32_gpiowrite(GPIO_PWM2, true);
stm32_configgpio(GPIO_PWM2);
px4_arch_gpiowrite(GPIO_PWM2, true);
px4_arch_configgpio(GPIO_PWM2);
stm32_gpiowrite(GPIO_PWM3, true);
stm32_configgpio(GPIO_PWM3);
px4_arch_gpiowrite(GPIO_PWM3, true);
px4_arch_configgpio(GPIO_PWM3);
stm32_gpiowrite(GPIO_PWM4, true);
stm32_configgpio(GPIO_PWM4);
px4_arch_gpiowrite(GPIO_PWM4, true);
px4_arch_configgpio(GPIO_PWM4);
stm32_gpiowrite(GPIO_PWM5, true);
stm32_configgpio(GPIO_PWM5);
px4_arch_gpiowrite(GPIO_PWM5, true);
px4_arch_configgpio(GPIO_PWM5);
stm32_gpiowrite(GPIO_PWM6, true);
stm32_configgpio(GPIO_PWM6);
px4_arch_gpiowrite(GPIO_PWM6, true);
px4_arch_configgpio(GPIO_PWM6);
stm32_gpiowrite(GPIO_PWM7, true);
stm32_configgpio(GPIO_PWM7);
px4_arch_gpiowrite(GPIO_PWM7, true);
px4_arch_configgpio(GPIO_PWM7);
stm32_gpiowrite(GPIO_PWM8, true);
stm32_configgpio(GPIO_PWM8);
px4_arch_gpiowrite(GPIO_PWM8, true);
px4_arch_configgpio(GPIO_PWM8);
}
@@ -283,8 +283,8 @@ CameraTrigger::start()
{
for (unsigned i = 0; i < sizeof(_pins) / sizeof(_pins[0]); i++) {
stm32_configgpio(_gpios[_pins[i]]);
stm32_gpiowrite(_gpios[_pins[i]], !_polarity);
px4_arch_configgpio(_gpios[_pins[i]]);
px4_arch_gpiowrite(_gpios[_pins[i]], !_polarity);
}
// enable immediate if configured that way
@@ -448,7 +448,7 @@ CameraTrigger::trigger(CameraTrigger *trig, bool trigger)
for (unsigned i = 0; i < sizeof(trig->_pins) / sizeof(trig->_pins[0]); i++) {
if (trig->_pins[i] >= 0) {
// ACTIVE_LOW == 1
stm32_gpiowrite(trig->_gpios[trig->_pins[i]], trigger);
px4_arch_gpiowrite(trig->_gpios[trig->_pins[i]], trigger);
}
}
}
+2 -2
View File
@@ -339,14 +339,14 @@ void
CDev::poll_notify(pollevent_t events)
{
/* lock against poll() as well as other wakeups */
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
for (unsigned i = 0; i < _max_pollwaiters; i++)
if (nullptr != _pollset[i]) {
poll_notify_one(_pollset[i], events);
}
irqrestore(state);
px4_leave_critical_section(state);
}
void
+4 -4
View File
@@ -75,7 +75,7 @@ I2C::I2C(const char *name,
I2C::~I2C()
{
if (_dev) {
up_i2cuninitialize(_dev);
px4_i2cbus_uninitialize(_dev);
_dev = nullptr;
}
}
@@ -105,7 +105,7 @@ I2C::init()
unsigned bus_index;
// attach to the i2c bus
_dev = up_i2cinitialize(_bus);
_dev = px4_i2cbus_initialize(_bus);
if (_dev == nullptr) {
DEVICE_DEBUG("failed to init I2C");
@@ -120,7 +120,7 @@ I2C::init()
// abort if the max frequency we allow (the frequency we ask)
// is smaller than the bus frequency
if (_bus_clocks[bus_index] > _frequency) {
(void)up_i2cuninitialize(_dev);
(void)px4_i2cbus_uninitialize(_dev);
_dev = nullptr;
DEVICE_LOG("FAIL: too slow for bus #%u: %u KHz, device max: %u KHz)",
_bus, _bus_clocks[bus_index] / 1000, _frequency / 1000);
@@ -168,7 +168,7 @@ I2C::init()
out:
if ((ret != OK) && (_dev != nullptr)) {
up_i2cuninitialize(_dev);
px4_i2cbus_uninitialize(_dev);
_dev = nullptr;
}
+3 -3
View File
@@ -95,7 +95,7 @@ SPI::init()
/* attach to the spi bus */
if (_dev == nullptr) {
_dev = up_spiinitialize(_bus);
_dev = px4_spibus_initialize(_bus);
}
if (_dev == nullptr) {
@@ -152,9 +152,9 @@ SPI::transfer(uint8_t *send, uint8_t *recv, unsigned len)
switch (mode) {
default:
case LOCK_PREEMPTION: {
irqstate_t state = irqsave();
irqstate_t state = px4_enter_critical_section();
result = _transfer(send, recv, len);
irqrestore(state);
px4_leave_critical_section(state);
}
break;
+3 -3
View File
@@ -910,10 +910,10 @@ GPS::cmd_reset()
{
#ifdef GPIO_GPS_NRESET
PX4_WARN("Toggling GPS reset pin");
stm32_configgpio(GPIO_GPS_NRESET);
stm32_gpiowrite(GPIO_GPS_NRESET, 0);
px4_arch_configgpio(GPIO_GPS_NRESET);
px4_arch_gpiowrite(GPIO_GPS_NRESET, 0);
usleep(100);
stm32_gpiowrite(GPIO_GPS_NRESET, 1);
px4_arch_gpiowrite(GPIO_GPS_NRESET, 1);
PX4_WARN("Toggled GPS reset pin");
#endif
}
+8 -8
View File
@@ -297,9 +297,9 @@ HC_SR04::init()
/* init echo port : */
for (unsigned i = 0; i <= _sonars; i++) {
stm32_configgpio(_gpio_tab[i].trig_port);
stm32_gpiowrite(_gpio_tab[i].trig_port, false);
stm32_configgpio(_gpio_tab[i].echo_port);
px4_arch_configgpio(_gpio_tab[i].trig_port);
px4_arch_gpiowrite(_gpio_tab[i].trig_port, false);
px4_arch_configgpio(_gpio_tab[i].echo_port);
_latest_sonar_measurements.push_back(0);
}
@@ -441,14 +441,14 @@ HC_SR04::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -546,9 +546,9 @@ HC_SR04::measure()
/*
* Send a plus begin a measurement.
*/
stm32_gpiowrite(_gpio_tab[_cycle_counter].trig_port, true);
px4_arch_gpiowrite(_gpio_tab[_cycle_counter].trig_port, true);
usleep(10); // 10us
stm32_gpiowrite(_gpio_tab[_cycle_counter].trig_port, false);
px4_arch_gpiowrite(_gpio_tab[_cycle_counter].trig_port, false);
stm32_gpiosetevent(_gpio_tab[_cycle_counter].echo_port, true, true, false, sonar_isr);
_status = 0;
+3 -3
View File
@@ -698,14 +698,14 @@ HMC5883::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+3 -3
View File
@@ -666,14 +666,14 @@ L3GD20::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+3 -3
View File
@@ -706,14 +706,14 @@ LIS3MDL::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+3 -3
View File
@@ -216,14 +216,14 @@ int LidarLiteI2C::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+6 -6
View File
@@ -928,14 +928,14 @@ LSM303D::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -1063,14 +1063,14 @@ LSM303D::mag_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_mag_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+3 -3
View File
@@ -431,14 +431,14 @@ MB12XX::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
+8 -8
View File
@@ -737,7 +737,7 @@ int MPU6000::reset()
while (--tries != 0) {
irqstate_t state;
state = irqsave();
state = px4_enter_critical_section();
write_reg(MPUREG_PWR_MGMT_1, BIT_H_RESET);
up_udelay(10000);
@@ -750,7 +750,7 @@ int MPU6000::reset()
// Disable I2C bus (recommended on datasheet)
write_checked_reg(MPUREG_USER_CTRL, BIT_I2C_IF_DIS);
irqrestore(state);
px4_leave_critical_section(state);
if (read_reg(MPUREG_PWR_MGMT_1) == MPU_CLK_SEL_PLLGYROZ) {
break;
@@ -1364,14 +1364,14 @@ MPU6000::ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_accel_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}
@@ -1449,14 +1449,14 @@ MPU6000::gyro_ioctl(struct file *filp, int cmd, unsigned long arg)
return -EINVAL;
}
irqstate_t flags = irqsave();
irqstate_t flags = px4_enter_critical_section();
if (!_gyro_reports->resize(arg)) {
irqrestore(flags);
px4_leave_critical_section(flags);
return -ENOMEM;
}
irqrestore(flags);
px4_leave_critical_section(flags);
return OK;
}

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