Mirrors_Framework/PX4-Autopilot
1
0
Fork 0
mirror of https://github.com/PX4/PX4-Autopilot.git synced 2026-05-24 07:09:48 +08:00
Code Issues Actions 15 Packages Projects Releases Wiki Activity

Merge branch 'master' of github.com:PX4/Firmware

Browse Source
This commit is contained in:
Lorenz Meier
2012-08-11 21:19:27 +02:00
parent 18c6c620c0 24688ae7f9
commit 22c1a03af7
55 changed files with 1046 additions and 601 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ROMFS/mixers/FMU_AERT.mix
+8 -8
View File
@@ -22,8 +22,8 @@ As there is only one output, if using two servos adjustments to compensate for
differences between the servos must be made mechanically. To obtain the correct
motion using a Y cable, the servos can be positioned reversed from one another.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 0 10000 10000 0 -10000 10000
Elevator mixer
@@ -35,8 +35,8 @@ depending on the actual configuration it may be necessary to reverse the scaling
factors (to reverse the servo movement) and adjust the offset, scaling and
endpoints to suit.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 1 10000 10000 0 -10000 10000
Rudder mixer
@@ -48,8 +48,8 @@ depending on the actual configuration it may be necessary to reverse the scaling
factors (to reverse the servo movement) and adjust the offset, scaling and
endpoints to suit.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 2 10000 10000 0 -10000 10000
Motor speed mixer
@@ -59,6 +59,6 @@ Two scalers total (output, thrust).
This mixer generates a full-range output (-1 to 1) from an input in the (0 - 1)
range. Inputs below zero are treated as zero.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 3 0 20000 -10000 -10000 10000
ROMFS/mixers/FMU_AET.mix
+6 -6
View File
@@ -25,8 +25,8 @@ motion using a Y cable, the servos can be positioned reversed from one another.
Alternatively, output 2 could be used as a second aileron servo output with
separate mixing.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 0 10000 10000 0 -10000 10000
Elevator mixer
@@ -38,8 +38,8 @@ depending on the actual configuration it may be necessary to reverse the scaling
factors (to reverse the servo movement) and adjust the offset, scaling and
endpoints to suit.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 1 10000 10000 0 -10000 10000
Output 2
@@ -55,6 +55,6 @@ Two scalers total (output, thrust).
This mixer generates a full-range output (-1 to 1) from an input in the (0 - 1)
range. Inputs below zero are treated as zero.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 3 0 20000 -10000 -10000 10000
ROMFS/mixers/FMU_RET.mix
+6 -6
View File
@@ -18,8 +18,8 @@ depending on the actual configuration it may be necessary to reverse the scaling
factors (to reverse the servo movement) and adjust the offset, scaling and
endpoints to suit.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 0 10000 10000 0 -10000 10000
Elevator mixer
@@ -31,8 +31,8 @@ depending on the actual configuration it may be necessary to reverse the scaling
factors (to reverse the servo movement) and adjust the offset, scaling and
endpoints to suit.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 1 10000 10000 0 -10000 10000
Output 2
@@ -48,6 +48,6 @@ Two scalers total (output, thrust).
This mixer generates a full-range output (-1 to 1) from an input in the (0 - 1)
range. Inputs below zero are treated as zero.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 3 0 20000 -10000 -10000 10000
ROMFS/mixers/FMU_delta.mix
+6 -6
View File
@@ -21,13 +21,13 @@ input is inverted between the two servos.
The scaling factor for roll inputs is adjusted to implement differential travel
for the elevons.
M: 3
S: 0 0 10000 10000 0 -10000 10000
M: 2
O: 10000 10000 0 -10000 10000
S: 0 0 3000 5000 0 -10000 10000
S: 0 1 5000 5000 0 -10000 10000
M: 3
S: 0 0 10000 10000 0 -10000 10000
M: 2
O: 10000 10000 0 -10000 10000
S: 0 0 5000 3000 0 -10000 10000
S: 0 1 -5000 -5000 0 -10000 10000
@@ -44,7 +44,7 @@ Two scalers total (output, thrust).
This mixer generates a full-range output (-1 to 1) from an input in the (0 - 1)
range. Inputs below zero are treated as zero.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 3 0 20000 -10000 -10000 10000
ROMFS/mixers/FMU_multirotor.mix
+8 -8
View File
@@ -6,19 +6,19 @@ input range.
Channel group 0, channels 0-3 values 0.0 - 1.0 are scaled to the full output range.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 0 0 20000 -10000 -10000 10000
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 1 0 20000 -10000 -10000 10000
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 2 0 20000 -10000 -10000 10000
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 3 0 20000 -10000 -10000 10000
ROMFS/mixers/FMU_pass.mix
+8 -8
View File
@@ -5,19 +5,19 @@ This file defines passthrough mixers suitable for testing.
Channel group 0, channels 0-3 are passed directly through to the outputs.
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 0 10000 10000 0 -10000 10000
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 1 10000 10000 0 -10000 10000
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 2 10000 10000 0 -10000 10000
M: 2
S: 0 0 10000 10000 0 -10000 10000
M: 1
O: 10000 10000 0 -10000 10000
S: 0 3 10000 10000 0 -10000 10000
ROMFS/mixers/README
+52 -14
View File
@@ -62,29 +62,67 @@ followed by a colon are significant. All other lines are ignored, meaning that
explanatory text can be freely mixed with the definitions.
Each file may define more than one mixer; the allocation of mixers to actuators
is specific to the device reading the mixer definition.
is specific to the device reading the mixer definition, and the number of
actuator outputs generated by a mixer is specific to the mixer.
A mixer begins with a line of the form
M: <scaler count>
<tag>: <mixer arguments>
If the scaler count is zero, the mixer is a placeholder and the device will not
allocate a mixer for this position. Otherwise, this line is followed by scaler
definitions matching the given count.
The tag selects the mixer type; 'M' for a simple summing mixer, 'R' for a
multirotor mixer, etc.
A scaler definition is a line of the form:
Null Mixer
..........
S: <group> <index> <-ve scale> <+ve scale> <offset> <lower limit> <upper limit>
A null mixer consumes no controls and generates a single actuator output whose
value is always zero. Typically a null mixer is used as a placeholder in a
collection of mixers in order to achieve a specific pattern of actuator outputs.
The first scaler definition following the M: line configures the output scaler.
The <group> and <index> fields are ignored in this case.
The null mixer definition has the form:
For the remaining scalers, the <group> value identifies the control group from
which the scaler will read. Control group 0 is the vehicle attitude control
group; other group numbers may be assigned for other purposes. The <index> value
selects the control within the group that will be scaled.
Z:
The remaining fields on the line represent the scaler parameters as discussed
Simple Mixer
............
A simple mixer combines zero or more control inputs into a single actuator
output. Inputs are scaled, and the mixing function sums the result before
applying an output scaler.
A simple mixer definition begins with:
M: <control count>
O: <-ve scale> <+ve scale> <offset> <lower limit> <upper limit>
If <control count> is zero, the sum is effectively zero and the mixer will
output a fixed value that is <offset> constrained by <lower limit> and <upper
limit>.
The second line defines the output scaler with scaler parameters as discussed
above. Whilst the calculations are performed as floating-point operations, the
values stored in the definition file are scaled by a factor of 10000; i.e. an
offset of -0.5 is encoded as -5000.
The definition continues with <control count> entries describing the control
inputs and their scaling, in the form:
S: <group> <index> <-ve scale> <+ve scale> <offset> <lower limit> <upper limit>
The <group> value identifies the control group from which the scaler will read,
and the <index> value an offset within that group. These values are specific to
the device reading the mixer definition.
When used to mix vehicle controls, mixer group zero is the vehicle attitude
control group, and index values zero through three are normally roll, pitch,
yaw and thrust respectively.
The remaining fields on the line configure the control scaler with parameters as
discussed above. Whilst the calculations are performed as floating-point
operations, the values stored in the definition file are scaled by a factor of
10000; i.e. an offset of -0.5 is encoded as -5000.
Multirotor Mixer
................
The multirotor mixer is not yet defined.
apps/drivers/drv_mixer.h
+5 -5
View File
@@ -81,7 +81,7 @@ struct mixer_scaler_s
};
/** mixer input */
struct mixer_input_s
struct mixer_control_s
{
uint8_t control_group; /**< group from which the input reads */
uint8_t control_index; /**< index within the control group */
@@ -91,12 +91,12 @@ struct mixer_input_s
/** simple mixer */
struct mixer_simple_s
{
uint8_t input_count; /**< number of inputs */
uint8_t control_count; /**< number of inputs */
struct mixer_scaler_s output_scaler; /**< scaling for the output */
struct mixer_input_s inputs[0]; /**< actual size of the array is set by input_count */
struct mixer_control_s controls[0]; /**< actual size of the array is set by control_count */
};
#define MIXER_SIMPLE_SIZE(_icount) (sizeof(struct mixer_simple_s) + (_icount) * sizeof(struct mixer_input_s))
#define MIXER_SIMPLE_SIZE(_icount) (sizeof(struct mixer_simple_s) + (_icount) * sizeof(struct mixer_control_s))
/**
* add a simple mixer in (struct mixer_simple_s *)arg
@@ -114,7 +114,7 @@ struct mixer_rotor_output_s
struct mixer_multirotor_s
{
uint8_t rotor_count;
struct mixer_input_s inputs[4]; /**< inputs are roll, pitch, yaw, thrust */
struct mixer_control_s controls[4]; /**< controls are roll, pitch, yaw, thrust */
struct mixer_rotor_output_s rotors[0]; /**< actual size of the array is set by rotor_count */
};
apps/nshlib/README.txt
+19 -10
View File
@@ -371,9 +371,15 @@ o get [-b|-n] [-f <local-path>] -h <ip-address> <remote-path>
Selects either binary ("octect") or test ("netascii") transfer
mode. Default: text.
o help
o help [-v] [<cmd>]
Presents summary information about each command to console.
Presents summary information about NSH commands to console. Options:
-v
Show verbose output will full command usage
<cmd>
Show full command usage only for this command
o ifconfig
@@ -499,14 +505,14 @@ o mkfatfs <path>
Format a fat file system on the block device specified by path.
NSH provides this command to access the mkfatfs() NuttX API.
This block device must reside in the NuttX psuedo filesystem and
This block device must reside in the NuttX pseudo filesystem and
must have been created by some call to register_blockdriver() (see
include/nuttx/fs/fs.h).
o mkfifo <path>
Creates a FIFO character device anywhere in the pseudo file system,
creating whatever psuedo directories that may be needed to complete
creating whatever pseudo directories that may be needed to complete
the full path. By convention, however, device drivers are place in
the standard /dev directory. After it is created, the FIFO device
may be used as any other device driver. NSH provides this command
@@ -578,7 +584,7 @@ o mount [-t <fstype> <block-device> <dir-path>]
If the mount parameters are provied on the command after the 'mount'
command, then the 'mount' command will mount a file system in the
NuttX psuedo-file system. 'mount' performs a three way association,
NuttX pseudo-file system. 'mount' performs a three way association,
binding:
File system. The '-t <fstype>' option identifies the type of
@@ -586,19 +592,19 @@ o mount [-t <fstype> <block-device> <dir-path>]
of this writing, vfat is the only supported value for <fstype>
Block Device. The <block-device> argument is the full or relative
path to a block driver inode in the psuedo filesystem. By convention,
path to a block driver inode in the pseudo filesystem. By convention,
this is a name under the /dev sub-directory. This <block-device>
must have been previously formatted with the same file system
type as specified by <fstype>
Mount Point. The mount point is the location in the psuedo file
Mount Point. The mount point is the location in the pseudo file
system where the mounted volume will appear. This mount point
can only reside in the NuttX psuedo filesystem. By convention, this
can only reside in the NuttX pseudo filesystem. By convention, this
mount point is a subdirectory under /mnt. The mount command will
create whatever psuedo directories that may be needed to complete
create whatever pseudo directories that may be needed to complete
the full path but the full path must not already exist.
After the volume has been mounted in the NuttX psuedo file
After the volume has been mounted in the NuttX pseudo file
system, it may be access in the same way as other objects in the
file system.
@@ -889,6 +895,9 @@ also allow it to squeeze into very small memory footprints.
CONFIG_NSH_DISABLE_UNSET, CONFIG_NSH_DISABLE_USLEEP, CONFIG_NSH_DISABLE_WGET,
CONFIG_NSH_DISABLE_XD
Verbose help output can be suppressed by defining CONFIG_NSH_HELP_TERSE. In that
case, the help command is still available but will be slightly smaller.
NSH-Specific Configuration Settings
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
apps/nshlib/nsh_parse.c
+24 -10
View File
@@ -88,12 +88,12 @@
# define MAX_ARGV_ENTRIES (NSH_MAX_ARGUMENTS+4)
#endif
/* Help layout */
/* Help command summary layout */
#define MAX_CMDLEN 12
#define CMDS_PER_LINE 5
#define CMDS_PER_LINE 6
#define NUM_CMDS (sizeof(g_cmdmap)/sizeof(struct cmdmap_s))
#define NUM_CMDS ((sizeof(g_cmdmap)/sizeof(struct cmdmap_s)) - 1)
#define NUM_CMD_ROWS ((NUM_CMDS + (CMDS_PER_LINE-1)) / CMDS_PER_LINE)
/****************************************************************************
@@ -211,7 +211,11 @@ static const struct cmdmap_s g_cmdmap[] =
#endif
#ifndef CONFIG_NSH_DISABLE_HELP
{ "help", cmd_help, 1, 3, "[-v] [cmd]" },
# ifdef CONFIG_NSH_HELP_TERSE
{ "help", cmd_help, 1, 2, "[<cmd>]" },
#else
{ "help", cmd_help, 1, 3, "[-v] [<cmd>]" },
# endif
#endif
#ifdef CONFIG_NET
@@ -439,7 +443,7 @@ static inline void help_cmdlist(FAR struct nsh_vtbl_s *vtbl)
for (i = 0; i < NUM_CMD_ROWS; i++)
{
nsh_output(vtbl, " ");
for (j = 0, k = i; j < CMDS_PER_LINE && k < NUM_CMDS; j++, k += CMDS_PER_LINE)
for (j = 0, k = i; j < CMDS_PER_LINE && k < NUM_CMDS; j++, k += NUM_CMD_ROWS)
{
nsh_output(vtbl, "%-12s", g_cmdmap[k].cmd);
}
@@ -453,7 +457,7 @@ static inline void help_cmdlist(FAR struct nsh_vtbl_s *vtbl)
* Name: help_usage
****************************************************************************/
#ifndef CONFIG_NSH_DISABLE_HELP
#if !defined(CONFIG_NSH_DISABLE_HELP) && !defined(CONFIG_NSH_HELP_TERSE)
static inline void help_usage(FAR struct nsh_vtbl_s *vtbl)
{
nsh_output(vtbl, "NSH command forms:\n");
@@ -512,6 +516,7 @@ static int help_cmd(FAR struct nsh_vtbl_s *vtbl, FAR const char *cmd)
{
/* Yes... show it */
nsh_output(vtbl, "%s usage:", cmd);
help_showcmd(vtbl, cmdmap);
return OK;
}
@@ -526,7 +531,7 @@ static int help_cmd(FAR struct nsh_vtbl_s *vtbl, FAR const char *cmd)
* Name: help_allcmds
****************************************************************************/
#ifndef CONFIG_NSH_DISABLE_HELP
#if !defined(CONFIG_NSH_DISABLE_HELP) && !defined(CONFIG_NSH_HELP_TERSE)
static inline void help_allcmds(FAR struct nsh_vtbl_s *vtbl)
{
FAR const struct cmdmap_s *cmdmap;
@@ -569,12 +574,15 @@ static inline void help_builtins(FAR struct nsh_vtbl_s *vtbl)
#ifndef CONFIG_NSH_DISABLE_HELP
static int cmd_help(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
bool verbose = false;
FAR const char *cmd = NULL;
#ifndef CONFIG_NSH_HELP_TERSE
bool verbose = false;
int i;
#endif
/* The command may be followed by a verbose option */
#ifndef CONFIG_NSH_HELP_TERSE
i = 1;
if (argc > i)
{
@@ -598,6 +606,12 @@ static int cmd_help(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
help_usage(vtbl);
}
#else
if (argc > 1)
{
cmd = argv[1];
}
#endif
/* Are we showing help on a single command? */
@@ -605,13 +619,13 @@ static int cmd_help(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
{
/* Yes.. show the single command */
nsh_output(vtbl, "%s usage:", cmd);
help_cmd(vtbl, cmd);
}
else
{
/* In verbose mode, show detailed help for all commands */
#ifndef CONFIG_NSH_HELP_TERSE
if (verbose)
{
nsh_output(vtbl, "Where <cmd> is one of:\n");
@@ -621,8 +635,8 @@ static int cmd_help(FAR struct nsh_vtbl_s *vtbl, int argc, char **argv)
/* Otherwise, just show the list of command names */
else
#endif
{
nsh_output(vtbl, "help usage:");
help_cmd(vtbl, "help");
nsh_output(vtbl, "\n");
help_cmdlist(vtbl);
apps/px4/fmu/fmu.cpp
+12 -8
View File
@@ -226,7 +226,7 @@ FMUServo::task_main()
while (!_task_should_exit) {
/* sleep waiting for data, but no more than 100ms */
int ret = ::poll(&fds[0], 2, 100);
int ret = ::poll(&fds[0], 2, 1000);
/* this would be bad... */
if (ret < 0) {
@@ -239,17 +239,21 @@ FMUServo::task_main()
if (fds[0].revents & POLLIN) {
float outputs[num_outputs];
/* get controls */
/* get controls - must always do this to avoid spinning */
orb_copy(ORB_ID_VEHICLE_ATTITUDE_CONTROLS, _t_actuators, &_controls);
/* do mixing */
_mixers->mix(&outputs[0], num_outputs);
/* can we mix? */
if (_mixers != nullptr) {
/* iterate actuators */
for (unsigned i = 0; i < num_outputs; i++) {
/* do mixing */
_mixers->mix(&outputs[0], num_outputs);
/* scale for PWM output 900 - 2100us */
up_pwm_servo_set(i, 1500 + (600 * outputs[i]));
/* iterate actuators */
for (unsigned i = 0; i < num_outputs; i++) {
/* scale for PWM output 900 - 2100us */
up_pwm_servo_set(i, 1500 + (600 * outputs[i]));
}
}
}
apps/systemlib/mixer/mixer.cpp
+11 -11
View File
@@ -151,15 +151,15 @@ SimpleMixer::mix(float *outputs, unsigned space)
if (space < 1)
return 0;
for (unsigned i = 0; i < _info->input_count; i++) {
for (unsigned i = 0; i < _info->control_count; i++) {
float input;
_control_cb(_cb_handle,
_info->inputs[i].control_group,
_info->inputs[i].control_index,
_info->controls[i].control_group,
_info->controls[i].control_index,
input);
sum += scale(_info->inputs[i].scaler, input);
sum += scale(_info->controls[i].scaler, input);
}
*outputs = scale(_info->output_scaler, sum);
return 1;
@@ -168,8 +168,8 @@ SimpleMixer::mix(float *outputs, unsigned space)
void
SimpleMixer::groups_required(uint32_t &groups)
{
for (unsigned i = 0; i < _info->input_count; i++)
groups |= 1 << _info->inputs[i].control_group;
for (unsigned i = 0; i < _info->control_count; i++)
groups |= 1 << _info->controls[i].control_group;
}
int
@@ -180,7 +180,7 @@ SimpleMixer::check()
/* sanity that presumes that a mixer includes a control no more than once */
/* max of 32 groups due to groups_required API */
if (_info->input_count > 32)
if (_info->control_count > 32)
return -2;
/* validate the output scaler */
@@ -190,18 +190,18 @@ SimpleMixer::check()
return ret;
/* validate input scalers */
for (unsigned i = 0; i < _info->input_count; i++) {
for (unsigned i = 0; i < _info->control_count; i++) {
/* verify that we can fetch the control */
if (_control_cb(_cb_handle,
_info->inputs[i].control_group,
_info->inputs[i].control_index,
_info->controls[i].control_group,
_info->controls[i].control_index,
junk) != 0) {
return -3;
}
/* validate the scaler */
ret = scale_check(_info->inputs[i].scaler);
ret = scale_check(_info->controls[i].scaler);
if (ret != 0)
return (10 * i + ret);
apps/systemlib/mixer/mixer_group.cpp
+74 -23
View File
@@ -53,6 +53,9 @@
#include "mixer.h"
#define debug(fmt, args...) do { } while(0)
//#define debug(fmt, args...) do { printf("[mixer] " fmt "\n", ##args); } while(0)
namespace
{
@@ -76,8 +79,10 @@ mixer_getline(int fd, char *line, unsigned maxlen)
ret = read(fd, &c, 1);
/* on error or EOF, return same */
if (ret <= 0)
if (ret <= 0) {
debug("read: EOF");
return ret;
}
/* ignore carriage returns */
if (c == '\r')
@@ -94,6 +99,7 @@ mixer_getline(int fd, char *line, unsigned maxlen)
/* terminate line as string and return */
*p = '\0';
debug("read: '%s'", line);
return 1;
}
@@ -105,17 +111,42 @@ mixer_getline(int fd, char *line, unsigned maxlen)
}
/**
* Parse a scaler from the buffer.
* Parse an output scaler from the buffer.
*/
static int
mixer_parse_scaler(const char *buf, mixer_scaler_s &scaler, uint8_t &control_group, uint8_t &control_index)
mixer_parse_output_scaler(const char *buf, mixer_scaler_s &scaler)
{
int s[5];
if (sscanf(buf, "O: %d %d %d %d %d",
&s[0], &s[1], &s[2], &s[3], &s[4]) != 5) {
debug("scaler parse failed on '%s'", buf);
return -1;
}
scaler.negative_scale = s[0] / 10000.0f;
scaler.positive_scale = s[1] / 10000.0f;
scaler.offset = s[2] / 10000.0f;
scaler.min_output = s[3] / 10000.0f;
scaler.max_output = s[4] / 10000.0f;
return 0;
}
/**
* Parse a control scaler from the buffer.
*/
static int
mixer_parse_control_scaler(const char *buf, mixer_scaler_s &scaler, uint8_t &control_group, uint8_t &control_index)
{
unsigned u[2];
int s[5];
if (sscanf(buf, "S: %u %u %d %d %d %d %d",
&u[0], &u[1], &s[0], &s[1], &s[2], &s[3], &s[4]) != 7)
&u[0], &u[1], &s[0], &s[1], &s[2], &s[3], &s[4]) != 7) {
debug("scaler parse failed on '%s'", buf);
return -1;
}
control_group = u[0];
control_index = u[1];
@@ -133,7 +164,6 @@ mixer_load_simple(Mixer::ControlCallback control_cb, uintptr_t cb_handle, int fd
{
mixer_simple_s *mixinfo = nullptr;
char buf[60];
uint8_t control_group, control_index;
int ret;
/* let's assume we're going to read a simple mixer */
@@ -141,22 +171,30 @@ mixer_load_simple(Mixer::ControlCallback control_cb, uintptr_t cb_handle, int fd
/* first, get the output scaler */
ret = mixer_getline(fd, buf, sizeof(buf));
if (ret < 1)
if (ret < 1) {
debug("failed reading for output scaler");
goto fail;
if (mixer_parse_scaler(buf, mixinfo->output_scaler, control_group, control_index))
}
if (mixer_parse_output_scaler(buf, mixinfo->output_scaler)) {
debug("failed parsing output scaler");
goto fail;
}
/* now get any inputs */
for (unsigned i = 0; i < inputs; i++) {
ret = mixer_getline(fd, buf, sizeof(buf));
if (ret < 1)
goto fail;
if (mixer_parse_scaler(buf,
mixinfo->inputs[i].scaler,
mixinfo->inputs[i].control_group,
mixinfo->inputs[i].control_index)) {
if (ret < 1) {
debug("failed reading for control scaler");
goto fail;
}
if (mixer_parse_control_scaler(buf,
mixinfo->controls[i].scaler,
mixinfo->controls[i].control_group,
mixinfo->controls[i].control_index)) {
debug("failed parsing control scaler");
goto fail;
}
debug("got control %d", i);
}
/* XXX should be a factory that validates the mixinfo ... */
@@ -172,27 +210,32 @@ mixer_load(Mixer::ControlCallback control_cb, uintptr_t cb_handle, int fd, Mixer
{
int ret;
char buf[60];
unsigned scalers;
unsigned inputs;
ret = mixer_getline(fd, buf, sizeof(buf));
/* end of file or error ?*/
if (ret < 1)
if (ret < 1) {
debug("getline %d", ret);
return ret;
}
/* slot is empty - allocate a null mixer */
if (buf[0] == 'Z') {
debug("got null mixer");
mixer = new NullMixer();
return 0;
return 1;
}
/* is it a simple mixer? */
if (sscanf(buf, "M: %u", &scalers) == 1) {
mixer = mixer_load_simple(control_cb, cb_handle, fd, scalers);
return (mixer == nullptr) ? -1 : 0;
if (sscanf(buf, "M: %u", &inputs) == 1) {
debug("got simple mixer with %d inputs", inputs);
mixer = mixer_load_simple(control_cb, cb_handle, fd, inputs);
return (mixer == nullptr) ? -1 : 1;
}
/* we don't recognise the mixer type */
debug("unrecognized mixer type '%c'", buf[0]);
return -1;
}
@@ -260,10 +303,12 @@ MixerGroup::load_from_file(const char *path)
return -1;
int fd = open(path, O_RDONLY);
if (fd < 0)
if (fd < 0) {
debug("failed to open %s", path);
return -1;
}
for (;;) {
for (unsigned count = 0;; count++) {
int result;
Mixer *mixer;
@@ -273,13 +318,19 @@ MixerGroup::load_from_file(const char *path)
mixer);
/* error? */
if (result < 0)
if (result < 0) {
debug("error");
return -1;
}
/* EOF or error */
if (result < 1)
if (result < 1) {
printf("[mixer] loaded %u mixers\n", count);
debug("EOF");
break;
}
debug("loaded mixer %p", mixer);
add_mixer(mixer);
}
nuttx/ChangeLog
+35 -6
View File
@@ -816,7 +816,7 @@
and (2) it requires symbol table arguments.
* lib/: Add fileno()
* examples/ostest: Several of the tests used a big, hard-coded stack size
when creating test threads (16Kb stacksize). The stack size should
when creating test threads (16K stacksize). The stack size should
be controlled by the .config file or the OSTest won't work on platforms
with memory constraints.
* netutils/thttpd: An initial port of Jeff Poskanzer's THTTPD HTTP server.
@@ -1369,10 +1369,10 @@
out instead. This improves behavior, for example, on the first GET request
from a browser.
* arch/arm/src/lpc17xx/lpc17_emacram.h and lpc17_allocateheap.c: The Ethernet
logic was using all of AHB SRAM Bank0 for Ethernet packet buffers (16Kb). An
logic was using all of AHB SRAM Bank0 for Ethernet packet buffers (16K). An
option was added to limit the amount of SRAM used for packet buffering and to
re-use any extra Bank0 memory for heap. configs/olimex-lpc1766stk/nettest
now uses only 8Kb at the beginning of Bank0; the 8Kb at the end of Bank0 is
now uses only 8K at the beginning of Bank0; the 8K at the end of Bank0 is
included in the heap
* arch/arm/src/lpc17xx/lpc17_ssp.c: Fix compilation errors when SSP1 is
selected.
@@ -1785,7 +1785,7 @@
that support 16-bit addressability have smaller overhead than devices
that support 32-bit addressability. However, there are many MCUs
that support 32-bit addressability *but* have internal SRAM of size
less than or equal to 64Kb. In this case, CONFIG_MM_SMALL can be
less than or equal to 64K. In this case, CONFIG_MM_SMALL can be
defined so that those MCUs will also benefit from the smaller, 16-
bit-based allocation overhead.
* lib/string/lib_strndup.c: Add standard strndup() library function.
@@ -1846,7 +1846,7 @@
* arch/sim/src/up_romgetc.c: Used to test the basic logic to access strings
without directly de-referencing a string pointer.
* arch/avr/src/avr/up_romget.c: Used to access strings that lie in the first
64Kb of FLASH (But I still haven't figured out how to get strings to reside in
64K of FLASH (But I still haven't figured out how to get strings to reside in
FLASH without using the PROGMEM attribute).
* configs/teensy/src/up_spi.c: Correct reading of SD CD and WP pins (was reading
the wrong register. AVR SPI now appears to be functional.
@@ -3119,9 +3119,38 @@
function called stm32_clockenable() that can be used by PM logic to re-start
the PLL after re-awakening from deep sleep modes.
* fs/fs_foreachinode.c and fs/fs_foreachmountpoint.c: All logic to traverse
inodes and mountpoints in the NuttX psuedo-file system.
inodes and mountpoints in the NuttX pseudo-file system.
* fs/fat/fs_fat32.c: Max. filename length reported by statfs() was wrong
if FAT long file names were enabled.
* lib/stdio/lib_libvsprintf.c: Fieldwidth and justification were not
supported for the %s format. As a result, %s, %12s, and %-12s all
produced the same output.
* lib/stdio/lib_libdtoa.c: Fix several issues with presenting floating
point numbers (conversions are fine, but presentation was bad). This
is a critical bug fix if you use printf or sprintf to deal with floating
point numbers.
* lib/stdio/lib_libdtoa.c and lib_libvsprintf.c: Correct some floating
point options.
* arch/arm/lpc43xx/lpc32_usb0dev.c: Add framework for development of
an USB0, device-side driver for the LPC43XX. The initial check-in,
however, is simply for the LPC31xx driver with name changes. The
LPC31xx has the same USB IP, but will require some additional initialization
(and lots of testing) before it can be used with the LPC43xx.
* nuttx/Documentation/NuttShell.html: Added a section covering ways to
customize the behavior or NSH.
* arch/arm/src/stm32/chip/stm32f1*_pinmap.h: STM32 CAN TX/RX pins reversed;
inconsistent conditional compilation. Reported by Max Holtzberg.
* arch/arm/*/stm32: Add support for STM32 F107 "Connectivity Line"
Ethernet (contributed by Max Holtzberg).
* configs/olimex-stm32-p107: Add board support for the Olimiex STM32-P107
board (contributed by Max Holtzberg).
* arch/arm/src/stm32/stm32f2xx_dma.c, stm32f4xx_dma.c, stm32_serial.c, and
stm32_spic.c: DMA priority was getting zeroed by STM32 F2/F4 DMA drivers
so that all DMAs ran at the lowest priority.
* configs/stm3240g-eval/include/board.h and configs/stm3220: Drop SD card
frequency from 24 to 16 MHz. Apparently 24 MHz is too fast for the board.
This (plus the change to the STM32 DMA (above) fixes SDIO DMA on the
STM3240G-EVAL (and probably STM3220G-EVAL -- untested).
* arch/arm/src/stm32/stm32f2xx_dma.c and stm32f4xx_dma.c: Backed out the
DMA priority change just above. The reduced SD card frequency was
necessary and sufficient to resolve the problem.
nuttx/ReleaseNotes
+7 -7
View File
@@ -1668,7 +1668,7 @@ Important bugfixes included:
And feature enhancements:
* The LPC176x Ethernet driver was using all of AHB SRAM Bank0 for
Ethernet packet buffers (16Kb). An option was added to limit
Ethernet packet buffers (16K). An option was added to limit
the amount of SRAM used for packet buffering and to re-use any
extra Bank0 memory for heap.
@@ -2022,7 +2022,7 @@ and is available for download from the SourceForge website. The
* A PCI-based E1000 Ethernet driver (contributed by Yu Qiang)
* New C library functions: inet_addr() (contributed by Yu Qiang),
strndup(), asprintf()
* Reduced memory allocation overhead for MCUs with small heaps (<64Kb).
* Reduced memory allocation overhead for MCUs with small heaps (<64K).
* fdopen() now works with socket descriptors allowing standard
buffered C functions to be used for network communications.
* The NSH ifconfig command can now be used to set or change the
@@ -2062,7 +2062,7 @@ they are, ordered from the least to the most complete:
This port of NuttX to the Amber Web Server from SoC Robotics
(http://www.soc-robotics.com/index.htm). Is only partially in
place. The Amber Web Server is based on an Atmel ATMega128
(128Kb FLASH but only 4Kb of SRAM).
(128K FLASH but only 4K of SRAM).
STATUS: Work on this port has stalled due to toolchain issues. It
is complete, but untested.
@@ -2073,7 +2073,7 @@ they are, ordered from the least to the most complete:
Micropendous3 may be populated with an AT90USB646, 647, 1286,
or 1287. See http://code.google.com/p/opendous/. I have only
the AT90USB647 version for testing. This version has very
limited memory resources: 64Kb of FLASH and 4Kb of SRAM.
limited memory resources: 64K of FLASH and 4K of SRAM.
STATUS: The basic port was released in NuttX-6.5. This basic
port consists only of a "Hello, World!!" example that demonstrates
@@ -2085,8 +2085,8 @@ they are, ordered from the least to the most complete:
This is a port of NuttX to the PJRC Teensy++ 2.0 board. This
board was developed by PJRC (http://pjrc.com/teensy/). The
Teensy++ 2.0 is based on an Atmel AT90USB1286 MCU with 128Kb
of FLASH and 8Kb of SRAM; a little more room to move than the
Teensy++ 2.0 is based on an Atmel AT90USB1286 MCU with 128K
of FLASH and 8K of SRAM; a little more room to move than the
AT90USB647.
STATUS: The basic port was released in NuttX-6.5. This basic
@@ -2109,7 +2109,7 @@ integrated into the normal, general purpose OS.
Most NuttX test applications are console-oriented with lots of
strings used for printf and debug output. These strings are all
stored in SRAM now due to these data accessing issues and even the
smallest console-oriented applications can quickly fill a 4-8Kb
smallest console-oriented applications can quickly fill a 4-8K
memory. So, in order for the AVR port to be useful, one of two
things would need to be done:
nuttx/TODO
+38 -8
View File
@@ -1,4 +1,4 @@
NuttX TODO List (Last updated August 3, 2012)
NuttX TODO List (Last updated August 7, 2012)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This file summarizes known NuttX bugs, limitations, inconsistencies with
@@ -15,14 +15,14 @@ nuttx/
(5) Binary loaders (binfmt/)
(17) Network (net/, drivers/net)
(3) USB (drivers/usbdev, drivers/usbhost)
(9) Libraries (lib/)
(11) Libraries (lib/)
(10) File system/Generic drivers (fs/, drivers/)
(5) Graphics subystem (graphics/)
(1) Pascal add-on (pcode/)
(1) Documentation (Documentation/)
(6) Build system / Toolchains
(5) Linux/Cywgin simulation (arch/sim)
(5) ARM (arch/arm/)
(6) ARM (arch/arm/)
(1) ARM/C5471 (arch/arm/src/c5471/)
(3) ARM/DM320 (arch/arm/src/dm320/)
(2) ARM/i.MX (arch/arm/src/imx/)
@@ -685,6 +685,19 @@ o Libraries (lib/)
Status: Open
Priority: Low -- more of a roadmap
Title: FLOATING POINT FORMATS
Description: Only the %f floating point format is supported. Others are accepted
but treated like %f.
Status: Open
Priority: Medium (this might important to someone).
Title: FLOATING POINT PRECISION
Description: A fieldwidth and precision is required with the %f format. If %f
is used with no format, than floating numbers will be printed with
a precision of 0 (effectively presented as integers).
Status: Open
Priority: Medium (this might important to someone).
o File system / Generic drivers (fs/, drivers/)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -703,9 +716,9 @@ o File system / Generic drivers (fs/, drivers/)
Title: REMOVING PIPES AND FIFOS
Description: There is no way to remove a FIFO or PIPE created in the
psuedo filesystem. Once created, they persist indefinitely
pseudo filesystem. Once created, they persist indefinitely
and cannot be unlinked. This is actually a more generic
issue: unlink does not work for anything in the psuedo-
issue: unlink does not work for anything in the pseudo-
filesystem.
Status: Open, but partially resolved: pipe buffer is at least freed
when there are not open references to the pipe/FIFO.
@@ -906,7 +919,7 @@ o Build system
Status: Open
Priority: Low.
Title: KERNEL BUILD MODE ISSUES
Title: KERNEL BUILD MODE ISSUES - GRAPHICS/NSH PARTITIONING.
Description: In the kernel build mode (where NuttX is built as a monlithic
kernel and user code must trap into the protected kernel via
syscalls), the single user mode cannot be supported. In this
@@ -915,6 +928,9 @@ o Build system
this case, most of the user end functions in graphics/nxmu
must be moved to lib/nx and those functions must be built into
libuser.a to be linked with the user-space code.
A similar issue exists in NSH that uses some internal OS
interfaces that would not be available in a kernel build
(such as foreach_task, foreach_mountpoint, etc.).
Status: Open
Priority: Low -- the kernel build configuration is not fully fielded
yet.
@@ -1064,7 +1080,21 @@ o ARM (arch/arm/)
Priority: Low. The conditions of continous interrupts is really the problem.
If your design needs continous interrupts like this, please try
the above change and, please, submit a patch with the working fix.
Title: KERNEL MODE ISSUES - HANDLERS
Description: The is a design flaw in the ARM/Cortex trap handlers. Currently,
they try to process the SYSCALL within the trap handler. That
cannot work. There are two possibilities to fix this.
1) Just enable interrupts in the trap handler and make sure that
that sufficient protection is in place to handler the nested
interrupts, or
3) Return from the exception via a trampoline (such as is
currently done for signal handlers). In the trampoline,
the trap would processed in supervisor mode with interrupts
enabled.
Status: Open
Priority: medium-high.
o ARM/C5471 (arch/arm/src/c5471/)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -1789,7 +1819,7 @@ o mc68hc1x (arch/hc)
Description: There is no script for building in banked mode (more correctly, there
is a script, but logic inside the script has not yet been implemented).
It would be necessary to implement banked mode to able to access more
the 48Kb of FLASH.
the 48K of FLASH.
Status: Open.
Priority: Medium/Low
nuttx/arch/arm/include/stm32/stm32f10xxx_irq.h
+7 -1
View File
@@ -167,7 +167,13 @@
# define STM32_IRQ_EXTI1510 (56) /* 40: EXTI Line[15:10] interrupts */
# define STM32_IRQ_RTCALRM (57) /* 41: RTC alarm through EXTI line interrupt */
# define STM32_IRQ_OTGFSWKUP (58) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */
/* 43-49: Reserved */
# define STM32_IRQ_RESERVED0 (59) /* 43: Reserved 0 */
# define STM32_IRQ_RESERVED1 (60) /* 44: Reserved 1 */
# define STM32_IRQ_RESERVED2 (61) /* 45: Reserved 2 */
# define STM32_IRQ_RESERVED3 (62) /* 46: Reserved 3 */
# define STM32_IRQ_RESERVED4 (63) /* 47: Reserved 4 */
# define STM32_IRQ_RESERVED5 (64) /* 48: Reserved 5 */
# define STM32_IRQ_RESERVED6 (65) /* 49: Reserved 6 */
# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */
# define STM32_IRQ_UART4 (68) /* 52: UART4 global interrupt */
nuttx/arch/arm/src/stm32/chip/stm32f103re_pinmap.h
+6 -6
View File
@@ -301,14 +301,14 @@
/* CAN */
#if defined(CONFIG_STM32_CAN1_REMAP1)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#elif defined(CONFIG_STM32_CAN1_REMAP2)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN1)
#else
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#endif
nuttx/arch/arm/src/stm32/chip/stm32f103vc_pinmap.h
+8 -8
View File
@@ -66,15 +66,15 @@
#define GPIO_ADC12_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC12_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#if defined(CONFIG_STM32_CAN1_FULL_REMAP)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1)
#elif defined(CONFIG_STM32_CAN1_PARTIAL_REMAP)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
#if defined(CONFIG_STM32_CAN1_REMAP1)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#elif defined(CONFIG_STM32_CAN1_REMAP2)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN1)
#else
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#endif
/* SDIO */
nuttx/arch/arm/src/stm32/chip/stm32f103ze_pinmap.h
+3 -3
View File
@@ -356,14 +356,14 @@
/* CAN */
#if defined(CONFIG_STM32_CAN1_REMAP1)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#elif defined(CONFIG_STM32_CAN1_REMAP2)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN1)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN1)
#else
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#endif
/* FSMC: CF */
nuttx/arch/arm/src/stm32/chip/stm32f105vb_pinmap.h
+12 -12
View File
@@ -65,23 +65,23 @@
#define GPIO_ADC12_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC12_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#if defined(CONFIG_STM32_CAN1_FULL_REMAP)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1)
#elif defined(CONFIG_STM32_CAN1_PARTIAL_REMAP)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
#if defined(CONFIG_STM32_CAN1_REMAP1)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#elif defined(CONFIG_STM32_CAN1_REMAP2)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN1)
#else
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#endif
#if defined(CONFIG_STM32_CAN2_REMAP)
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN6)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
#else
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#endif
#if 0 /* Needs further investigation */
nuttx/arch/arm/src/stm32/chip/stm32f107vc_pinmap.h
+43 -39
View File
@@ -65,23 +65,23 @@
#define GPIO_ADC12_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0)
#define GPIO_ADC12_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1)
#if defined(CONFIG_STM32_CAN1_FULL_REMAP)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN1)
#elif defined(CONFIG_STM32_CAN1_PARTIAL_REMAP)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9)
#if defined(CONFIG_STM32_CAN1_REMAP1)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9)
#elif defined(CONFIG_STM32_CAN1_REMAP2)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN0)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN1)
#else
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12)
# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11)
# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#endif
#if defined(CONFIG_STM32_CAN2_REMAP)
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN6)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5)
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6)
#else
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13)
# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12)
# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#endif
#if 0 /* Needs further investigation */
@@ -89,43 +89,49 @@
#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5)
#endif
#if 0 /* Needs further investigation */
/* Section 29.3 in the stm32 datasheet (Doc ID 13902 Rev 14) */
#define GPIO_ETH_MDC (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN1)
#define GPIO_ETH_MDIO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2)
#define GPIO_ETH_MIICOL (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ETH_MIICRSWKUP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ETH_MIIRXCLK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ETH_MIICOL (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3)
#define GPIO_ETH_MIICRSWKUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0)
#define GPIO_ETH_MIIRXCLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#if defined(CONFIG_STM32_ETH_REMAP)
# define GPIO_ETH_MIIRXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_MIIRXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
# define GPIO_ETH_MIIRXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11)
# define GPIO_ETH_MIIRXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
# define GPIO_ETH_MIIRXDV (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
# define GPIO_ETH_MIIRXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_MIIRXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
# define GPIO_ETH_MIIRXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11)
# define GPIO_ETH_MIIRXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12)
# define GPIO_ETH_MIIRXDV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
#else
# define GPIO_ETH_MIIRXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_MIIRXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
# define GPIO_ETH_MIIRXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
# define GPIO_ETH_MIIRXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
# define GPIO_ETH_MIIRXDV (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
# define GPIO_ETH_MIIRXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_MIIRXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
# define GPIO_ETH_MIIRXD2 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0)
# define GPIO_ETH_MIIRXD3 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1)
# define GPIO_ETH_MIIRXDV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
#endif
#define GPIO_ETH_MIIRXER (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#define GPIO_ETH_MIITXCLK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ETH_MIIRXER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10)
#define GPIO_ETH_MIITXCLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3)
#define GPIO_ETH_MIITXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_ETH_MIITXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_ETH_MIITXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2)
#define GPIO_ETH_MIITXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
#define GPIO_ETH_MIITXEN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#define GPIO_ETH_PPSOUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_ETH_RMIICRSDV (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
#define GPIO_ETH_RMIIREFCLK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#define GPIO_ETH_RMIIRXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
#define GPIO_ETH_RMIIRXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
#define GPIO_ETH_RMIITXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_ETH_RMIITXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_ETH_RMIITXEN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#define GPIO_ETH_PPS_OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_ETH_RMII_REF_CLK (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1)
#if defined(CONFIG_STM32_ETH_REMAP)
# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8)
# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9)
# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10)
#else
# define GPIO_ETH_RMII_CRS_DV (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7)
# define GPIO_ETH_RMII_RXD0 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4)
# define GPIO_ETH_RMII_RXD1 (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5)
#endif
#define GPIO_ETH_RMII_TXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12)
#define GPIO_ETH_RMII_TXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13)
#define GPIO_ETH_RMII_TX_EN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11)
#if defined(CONFIG_STM32_I2C1_REMAP)
# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8)
@@ -148,9 +154,7 @@
#define GPIO_I2S3_SD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_I2S3_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
#if 0 /* Needs further investigation */
#define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#endif
#if 0 /* Needs further investigation */
#define GPIO_OTG_FSDM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_gpio.h
+4 -1
View File
@@ -271,6 +271,9 @@
# define AFIO_MAPR_SWJ (1 << AFIO_MAPR_SWJ_CFG_SHIFT) /* 001: Full SWJ (JTAG-DP + SW-DP) but without JNTRST */
# define AFIO_MAPR_SWDP (2 << AFIO_MAPR_SWJ_CFG_SHIFT) /* 010: JTAG-DP Disabled and SW-DP Enabled */
# define AFIO_MAPR_DISAB (4 << AFIO_MAPR_SWJ_CFG_SHIFT) /* 100: JTAG-DP Disabled and SW-DP Disabled */
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define AFIO_MAPR_MII_RMII_SEL (1 << 23) /* MII or RMII selection */
#endif
#define AFIO_MAPR_PD01_REMAP (1 << 15) /* Bit 15 : Port D0/Port D1 mapping on OSC_IN/OSC_OUT */
#define AFIO_MAPR_CAN_REMAP_SHIFT (13) /* Bits 14-13: CAN Alternate function remapping */
#define AFIO_MAPR_CAN_REMAP_MASK (3 << AFIO_MAPR_CAN_REMAP_SHIFT)
@@ -278,7 +281,7 @@
# define AFIO_MAPR_PB89 (2 << AFIO_MAPR_CAN_REMAP_SHIFT) /* 10: CANRX mapped to PB8, CANTX mapped to PB9 */
# define AFIO_MAPR_PD01 (3 << AFIO_MAPR_CAN_REMAP_SHIFT) /* 11: CANRX mapped to PD0, CANTX mapped to PD1 */
#define AFIO_MAPR_TIM4_REMAP (1 << 12) /* Bit 12: TIM4 remapping */
#define AFIO_MAPR_TIM3_REMAP_SHIFT (10) /* Bits 11-10: TIM3 remapping */
#define AFIO_MAPR_TIM3_REMAP_SHIFT (10) /* Bits 11-10: TIM3 remapping */
#define AFIO_MAPR_TIM3_REMAP_MASK (3 << AFIO_MAPR_TIM3_REMAP_SHIFT)
# define AFIO_MAPR_TIM3_NOREMAP (0 << AFIO_MAPR_TIM3_REMAP_SHIFT) /* 00: No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1) */
# define AFIO_MAPR_TIM3_PARTREMAP (2 << AFIO_MAPR_TIM3_REMAP_SHIFT) /* 10: Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1) */
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_rcc.h
+114 -26
View File
@@ -52,7 +52,10 @@
#define STM32_RCC_APB1ENR_OFFSET 0x001c /* APB1 Peripheral Clock enable register */
#define STM32_RCC_BDCR_OFFSET 0x0020 /* Backup domain control register */
#define STM32_RCC_CSR_OFFSET 0x0024 /* Control/status register */
#ifdef CONFIG_STM32_VALUELINE
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define STM32_RCC_AHBRSTR_OFFSET 0x0028 /* AHB Reset register */
#endif
#if defined(CONFIG_STM32_VALUELINE) || defined(CONFIG_STM32_CONNECTIVITYLINE)
# define STM32_RCC_CFGR2_OFFSET 0x002c /* Clock configuration register 2 */
#endif
@@ -68,7 +71,10 @@
#define STM32_RCC_APB1ENR (STM32_RCC_BASE+STM32_RCC_APB1ENR_OFFSET)
#define STM32_RCC_BDCR (STM32_RCC_BASE+STM32_RCC_BDCR_OFFSET)
#define STM32_RCC_CSR (STM32_RCC_BASE+STM32_RCC_CSR_OFFSET)
#ifdef CONFIG_STM32_VALUELINE
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define STM32_RCC_AHBRSTR (STM32_RCC_BASE+STM32_RCC_AHBRSTR_OFFSET)
#endif
#if defined(CONFIG_STM32_VALUELINE) || defined(CONFIG_STM32_CONNECTIVITYLINE)
# define STM32_RCC_CFGR2 (STM32_RCC_BASE+STM32_RCC_CFGR2_OFFSET)
#endif
@@ -88,6 +94,12 @@
#define RCC_CR_CSSON (1 << 19) /* Bit 19: Clock Security System enable */
#define RCC_CR_PLLON (1 << 24) /* Bit 24: PLL enable */
#define RCC_CR_PLLRDY (1 << 25) /* Bit 25: PLL clock ready flag */
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define RCC_CR_PLL2ON (1 << 26) /* Bit 26: PLL2 enable */
# define RCC_CR_PLL2RDY (1 << 27) /* Bit 27: PLL2 clock ready flag */
# define RCC_CR_PLL3ON (1 << 28) /* Bit 28: PLL3 enable */
# define RCC_CR_PLL3RDY (1 << 29) /* Bit 29: PLL3 ready flag */
#endif
/* Clock configuration register */
@@ -153,12 +165,16 @@
# define RCC_CFGR_PLLMUL_CLKx16 (14 << RCC_CFGR_PLLMUL_SHIFT) /* 111x: PLL input clock x 16 */
#define RCC_CFGR_USBPRE (1 << 22) /* Bit 22: USB prescaler */
#define RCC_CFGR_MCO_SHIFT (24) /* Bits 26-24: Microcontroller Clock Output */
#define RCC_CFGR_MCO_MASK (7 << RCC_CFGR_MCO_SHIFT)
# define RCC_CFGR_NOCLK (0 << RCC_CFGR_MCO_SHIFT) /* 0xx: No clock */
# define RCC_CFGR_SYSCLK (4 << RCC_CFGR_MCO_SHIFT) /* 100: System clock selected */
# define RCC_CFGR_INTCLK (5 << RCC_CFGR_MCO_SHIFT) /* 101: Internal 8 MHz RC oscillator clock selected */
# define RCC_CFGR_EXTCLK (6 << RCC_CFGR_MCO_SHIFT) /* 110: External 1-25 MHz oscillator clock selected */
# define RCC_CFGR_PLLCLKd2 (7 << RCC_CFGR_MCO_SHIFT) /* 111: PLL clock divided by 2 selected */
#define RCC_CFGR_MCO_MASK (0x0f << RCC_CFGR_MCO_SHIFT)
# define RCC_CFGR_NOCLK (0 << RCC_CFGR_MCO_SHIFT) /* 0xx: No clock */
# define RCC_CFGR_SYSCLK (4 << RCC_CFGR_MCO_SHIFT) /* 100: System clock selected */
# define RCC_CFGR_INTCLK (5 << RCC_CFGR_MCO_SHIFT) /* 101: Internal 8 MHz RC oscillator clock selected */
# define RCC_CFGR_EXTCLK (6 << RCC_CFGR_MCO_SHIFT) /* 110: External 1-25 MHz oscillator clock selected */
# define RCC_CFGR_PLLCLKd2 (7 << RCC_CFGR_MCO_SHIFT) /* 111: PLL clock divided by 2 selected */
# define RCC_CFGR_PLL2CLK (8 << RCC_CFGR_MCO_SHIFT) /* 1000: PLL2 clock selected */
# define RCC_CFGR_PLL3CLKd2 (9 << RCC_CFGR_MCO_SHIFT) /* 1001: PLL3 clock devided by 2 selected */
# define RCC_CFGR_XT1 (10 << RCC_CFGR_MCO_SHIFT) /* 1010: external 3-25 MHz oscillator clock selected (for Ethernet) */
# define RCC_CFGR_PLL3CLK (11 << RCC_CFGR_MCO_SHIFT) /* 1011: PLL3 clock selected (for Ethernet) */
/* Clock interrupt register */
@@ -231,6 +247,18 @@
#define RCC_AHBENR_CRCEN (1 << 6) /* Bit 6: CRC clock enable */
#define RCC_AHBENR_FSMCEN (1 << 8) /* Bit 8: FSMC clock enable */
#define RCC_AHBENR_SDIOEN (1 << 10) /* Bit 10: SDIO clock enable */
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define RCC_AHBENR_ETHMACEN (1 << 14) /* Bit 14: Ethernet MAC clock enable */
# define RCC_AHBENR_ETHMACTXEN (1 << 15) /* Bit 15: Ethernet MAC TX clock enable */
# define RCC_AHBENR_ETHMACRXEN (1 << 16) /* Bit 16: Ethernet MAC RX clock enable */
#endif
/* AHB peripheral clock reset register (RCC_AHBRSTR) */
#ifdef CONFIG_STM32_CONNECTIVITYLINE
# define RCC_AHBRSTR_OTGFSRST (1 << 12) /* USB OTG FS reset */
# define RCC_AHBRSTR_ETHMACRST (1 << 14) /* Ethernet MAC reset */
#endif
/* APB2 Peripheral Clock enable register */
@@ -301,26 +329,86 @@
#define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: Window watchdog reset flag */
#define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-Power reset flag */
#ifdef CONFIG_STM32_VALUELINE
#if defined(CONFIG_STM32_VALUELINE) || defined(CONFIG_STM32_CONNECTIVITYLINE)
/* Clock configuration register 2 */
/* Clock configuration register 2 (For connectivity line only) */
# define RCC_CFGR2_PREDIV1d1 0 /* HSE input not divided */
# define RCC_CFGR2_PREDIV1d2 1 /* HSE input divided by 2 */
# define RCC_CFGR2_PREDIV1d3 2 /* HSE input divided by 3 */
# define RCC_CFGR2_PREDIV1d4 3 /* HSE input divided by 4 */
# define RCC_CFGR2_PREDIV1d5 4 /* HSE input divided by 5 */
# define RCC_CFGR2_PREDIV1d6 5 /* HSE input divided by 6 */
# define RCC_CFGR2_PREDIV1d7 6 /* HSE input divided by 7 */
# define RCC_CFGR2_PREDIV1d8 7 /* HSE input divided by 8 */
# define RCC_CFGR2_PREDIV1d9 8 /* HSE input divided by 9 */
# define RCC_CFGR2_PREDIV1d10 9 /* HSE input divided by 10 */
# define RCC_CFGR2_PREDIV1d11 10 /* HSE input divided by 11 */
# define RCC_CFGR2_PREDIV1d12 11 /* HSE input divided by 12 */
# define RCC_CFGR2_PREDIV1d13 12 /* HSE input divided by 13 */
# define RCC_CFGR2_PREDIV1d14 13 /* HSE input divided by 14 */
# define RCC_CFGR2_PREDIV1d15 14 /* HSE input divided by 15 */
# define RCC_CFGR2_PREDIV1d16 15 /* HSE input divided by 16 */
#define RCC_CFGR2_PREDIV1_SHIFT (0)
#define RCC_CFGR2_PREDIV1_MASK (0x0f << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d1 (0 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d2 (1 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d3 (2 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d4 (3 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d5 (4 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d6 (5 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d7 (6 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d8 (7 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d9 (8 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d10 (9 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d11 (10 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d12 (11 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d13 (12 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d14 (13 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d15 (14 << RCC_CFGR2_PREDIV1_SHIFT)
# define RCC_CFGR2_PREDIV1d16 (15 << RCC_CFGR2_PREDIV1_SHIFT)
#define RCC_CFGR2_PREDIV2_SHIFT (4)
#define RCC_CFGR2_PREDIV2_MASK (0x0f << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d1 (0 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d2 (1 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d3 (2 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d4 (3 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d5 (4 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d6 (5 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d7 (6 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d8 (7 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d9 (8 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d10 (9 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d11 (10 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d12 (11 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d13 (12 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d14 (13 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d15 (14 << RCC_CFGR2_PREDIV2_SHIFT)
# define RCC_CFGR2_PREDIV2d16 (15 << RCC_CFGR2_PREDIV2_SHIFT)
#define RCC_CFGR2_PLL2MUL_SHIFT (8)
#define RCC_CFGR2_PLL2MUL_MASK (0x0f << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx8 (6 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx9 (7 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx10 (8 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx11 (9 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx12 (10 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx13 (11 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx14 (12 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx16 (14 << RCC_CFGR2_PLL2MUL_SHIFT)
# define RCC_CFGR2_PLL2MULx20 (15 << RCC_CFGR2_PLL2MUL_SHIFT)
#define RCC_CFGR2_PLL3MUL_SHIFT (12)
#define RCC_CFGR2_PLL3MUL_MASK (0x0f << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx8 (6 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx9 (7 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx10 (8 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx11 (9 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx12 (10 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx13 (11 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx14 (12 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx16 (14 << RCC_CFGR2_PLL3MUL_SHIFT)
# define RCC_CFGR2_PLL3MULx20 (15 << RCC_CFGR2_PLL3MUL_SHIFT)
#define RCC_CFGR2_PREDIV1SRC_SHIFT (16)
#define RCC_CFGR2_PREDIV1SRC_MASK (0x01 << RCC_CFGR2_PREDIV1SRC_SHIFT)
# define RCC_CFGR2_PREDIV1SRC_HSE (0 << RCC_CFGR2_PREDIV1SRC_SHIFT)
# define RCC_CFGR2_PREDIV1SRC_PLL2 (1 << RCC_CFGR2_PREDIV1SRC_SHIFT)
#define RCC_CFGR2_I2S2SRC_SHIFT (17)
#define RCC_CFGR2_I2S2SRC_MASK (0x01 << RCC_CFGR2_I2S2SRC_SHIFT)
# define RCC_CFGR2_I2S2SRC_SYSCLK (0 << RCC_CFGR2_I2S2SRC_SHIFT)
# define RCC_CFGR2_I2S2SRC_PLL3 (1 << RCC_CFGR2_I2S2SRC_SHIFT)
#define RCC_CFGR2_I2S3SRC_SHIFT (17)
#define RCC_CFGR2_I2S3SRC_MASK (0x01 << RCC_CFGR2_I2S3SRC_SHIFT)
# define RCC_CFGR2_I2S3SRC_SYSCLK (0 << RCC_CFGR2_I2S3SRC_SHIFT)
# define RCC_CFGR2_I2S3SRC_PLL3 (1 << RCC_CFGR2_I2S3SRC_SHIFT)
#endif
nuttx/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h
+9 -1
View File
@@ -89,7 +89,8 @@ VECTOR(stm32_dma1ch2, STM32_IRQ_DMA1CH2) /* Vector 16+12: DMA1 Channel 2
VECTOR(stm32_dma1ch3, STM32_IRQ_DMA1CH3) /* Vector 16+13: DMA1 Channel 3 global interrupt */
VECTOR(stm32_dma1ch4, STM32_IRQ_DMA1CH4) /* Vector 16+14: DMA1 Channel 4 global interrupt */
VECTOR(stm32_dma1ch5, STM32_IRQ_DMA1CH5) /* Vector 16+15: DMA1 Channel 5 global interrupt */
VECTOR(stm32_dma1ch6, STM32_IRQ_DMA1CH6) /* Vector 16+16: DMA1 Channel 7 global interrupt */
VECTOR(stm32_dma1ch6, STM32_IRQ_DMA1CH6) /* Vector 16+16: DMA1 Channel 6 global interrupt */
VECTOR(stm32_dma1ch7, STM32_IRQ_DMA1CH7) /* Vector 16+17: DMA1 Channel 7 global interrupt */
VECTOR(stm32_adc12, STM32_IRQ_ADC12) /* Vector 16+18: ADC1 and ADC2 global interrupt */
VECTOR(stm32_can1tx, STM32_IRQ_CAN1TX) /* Vector 16+19: CAN1 TX interrupts */
VECTOR(stm32_can1rx0, STM32_IRQ_CAN1RX0) /* Vector 16+20: CAN1 RX0 interrupts */
@@ -115,6 +116,13 @@ VECTOR(stm32_usart3, STM32_IRQ_USART3) /* Vector 16+39: USART3 global
VECTOR(stm32_exti1510, STM32_IRQ_EXTI1510) /* Vector 16+40: EXTI Line[15:10] interrupts */
VECTOR(stm32_rtcalr, STM32_IRQ_RTCALRM) /* Vector 16+41: RTC alarm through EXTI line interrupt */
VECTOR(stm32_otgfswkup, STM32_IRQ_OTGFSWKUP) /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */
UNUSED(STM32_IRQ_RESERVED0) /* Vector 16+43: Reserved 0 */
UNUSED(STM32_IRQ_RESERVED1) /* Vector 16+44: Reserved 1 */
UNUSED(STM32_IRQ_RESERVED2) /* Vector 16+55: Reserved 2 */
UNUSED(STM32_IRQ_RESERVED3) /* Vector 16+46: Reserved 3 */
UNUSED(STM32_IRQ_RESERVED4) /* Vector 16+47: Reserved 4 */
UNUSED(STM32_IRQ_RESERVED5) /* Vector 16+48: Reserved 5 */
UNUSED(STM32_IRQ_RESERVED6) /* Vector 16+49: Reserved 6 */
VECTOR(stm32_tim5, STM32_IRQ_TIM5) /* Vector 16+50: TIM5 global interrupt */
VECTOR(stm32_spi3, STM32_IRQ_SPI3 ) /* Vector 16+51: SPI3 global interrupt */
VECTOR(stm32_uart4 , STM32_IRQ_UART4) /* Vector 16+52: UART4 global interrupt */
nuttx/arch/arm/src/stm32/stm32_eth.c
+21 -3
View File
@@ -85,7 +85,7 @@
# error "Logic to support multiple Ethernet interfaces is incomplete"
#endif
#ifndef CONFIG_STM32_SYSCFG
#if !defined(CONFIG_STM32_SYSCFG) && !defined(CONFIG_STM32_CONNECTIVITYLINE)
# error "CONFIG_STM32_SYSCFG must be defined in the NuttX configuration"
#endif
@@ -2657,6 +2657,13 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
#elif defined(CONFIG_STM32_RMII)
/* Setup MCO pin for alternative usage */
#if defined(CONFIG_STM32_RMII_MCO)
stm32_configgpio(GPIO_MCO);
stm32_mcoconfig(BOARD_CFGR_MCO_SOURCE);
#endif
/* Select the RMII interface */
stm32_selectrmii();
@@ -2673,7 +2680,7 @@ static inline void stm32_ethgpioconfig(FAR struct stm32_ethmac_s *priv)
stm32_configgpio(GPIO_ETH_RMII_RXD1);
stm32_configgpio(GPIO_ETH_RMII_TXD0);
stm32_configgpio(GPIO_ETH_RMII_TXD1);
stm32_configgpio(GPIO_ETH_RMII_TX_CLK);
/* stm32_configgpio(GPIO_ETH_RMII_TX_CLK); not needed? */
stm32_configgpio(GPIO_ETH_RMII_TX_EN);
#endif
@@ -2704,14 +2711,25 @@ static void stm32_ethreset(FAR struct stm32_ethmac_s *priv)
{
uint32_t regval;
/* Reset the Ethernet on the AHB1 bus */
/* Reset the Ethernet on the AHB bus (F1 Connectivity Line) or AHB1 bus (F2
* and F4)
*/
#if defined(CONFIG_STM32_CONNECTIVITYLINE)
regval = stm32_getreg(STM32_RCC_AHBRSTR);
regval |= RCC_AHBRSTR_ETHMACRST;
stm32_putreg(regval, STM32_RCC_AHBRSTR);
regval &= ~RCC_AHBRSTR_ETHMACRST;
stm32_putreg(regval, STM32_RCC_AHBRSTR);
#else
regval = stm32_getreg(STM32_RCC_AHB1RSTR);
regval |= RCC_AHB1RSTR_ETHMACRST;
stm32_putreg(regval, STM32_RCC_AHB1RSTR);
regval &= ~RCC_AHB1RSTR_ETHMACRST;
stm32_putreg(regval, STM32_RCC_AHB1RSTR);
#endif
/* Perform a software reset by setting the SR bit in the DMABMR register.
* This Resets all MAC subsystem internal registers and logic. After this
nuttx/arch/arm/src/stm32/stm32_rcc.h
+33
View File
@@ -116,6 +116,39 @@ static inline void stm32_mco1config(uint32_t source, uint32_t div)
}
#endif
/************************************************************************************
* Name: stm32_mcoconfig
*
* Description:
* Selects the clock source to output on MC pin (PA8) for stm32f10xxx.
* PA8 should be configured in alternate function mode.
*
* Input Parameters:
* source - One of the definitions for the RCC_CFGR_MCO definitions from
* chip/stm32f10xxx_rcc.h {RCC_CFGR_SYSCLK, RCC_CFGR_INTCLK, RCC_CFGR_EXTCLK,
* RCC_CFGR_PLLCLKd2, RCC_CFGR_PLL2CLK, RCC_CFGR_PLL3CLKd2, RCC_CFGR_XT1,
* RCC_CFGR_PLL3CLK}
*
* Returned Value:
* None
*
************************************************************************************/
#if defined(CONFIG_STM32_CONNECTIVITYLINE)
static inline void stm32_mcoconfig(uint32_t source)
{
uint32_t regval;
/* Set MCO source */
regval = getreg32(STM32_RCC_CFGR);
regval &= ~(RCC_CFGR_MCO_MASK);
regval |= (source & RCC_CFGR_MCO_MASK);
putreg32(regval, STM32_RCC_CFGR);
}
#endif
/************************************************************************************
* Name: stm32_mco2config
*
nuttx/arch/arm/src/stm32/stm32_sdio.c
+1 -1
View File
@@ -1615,7 +1615,7 @@ static void stm32_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
/* SD normal operation clocking (narrow 1-bit mode) */
case CLOCK_SD_TRANSFER_1BIT:
clckr = (SDIO_CLCKR_SDXFR | SDIO_CLKCR_CLKEN)
clckr = (SDIO_CLCKR_SDXFR | SDIO_CLKCR_CLKEN);
break;
}
nuttx/arch/arm/src/stm32/stm32_serial.c
+25
View File
@@ -132,6 +132,30 @@
*/
# define RXDMA_BUFFER_SIZE 32
/* DMA priority */
# ifndef CONFIG_USART_DMAPRIO
# if defined(CONFIG_STM32_STM32F10XX)
# define CONFIG_USART_DMAPRIO DMA_CCR_PRIMED
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define CONFIG_USART_DMAPRIO DMA_SCR_PRIMED
# else
# error "Unknown STM32 DMA"
# endif
# endif
# if defined(CONFIG_STM32_STM32F10XX)
# if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
# error "Illegal value for CONFIG_USART_DMAPRIO"
# endif
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# if (CONFIG_USART_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_USART_DMAPRIO"
# endif
# else
# error "Unknown STM32 DMA"
# endif
#endif
/* Power management definitions */
@@ -975,6 +999,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
DMA_SCR_MINC |
DMA_SCR_PSIZE_8BITS |
DMA_SCR_MSIZE_8BITS |
CONFIG_USART_DMAPRIO |
DMA_SCR_PBURST_SINGLE |
DMA_SCR_MBURST_SINGLE);
nuttx/arch/arm/src/stm32/stm32_spi.c
+31 -2
View File
@@ -88,18 +88,47 @@
* Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* SPI interrupts */
#ifdef CONFIG_STM32_SPI_INTERRUPTS
# error "Interrupt driven SPI not yet supported"
#endif
/* Can't have both interrupt driven SPI and SPI DMA */
#if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA)
# error "Cannot enable both interrupt mode and DMA mode for SPI"
#endif
/* DMA channel configuration */
/* SPI DMA priority */
#define SPI_DMA_PRIO DMA_CCR_PRIMED /* Check this to alter priority */
#ifdef CONFIG_STM32_SPI_DMA
# if defined(CONFIG_SPI_DMAPRIO)
# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO
# elif defined(CONFIG_STM32_STM32F10XX)
# define SPI_DMA_PRIO DMA_CCR_PRIMED
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define SPI_DMA_PRIO DMA_SCR_PRIMED
# else
# error "Unknown STM32 DMA"
# endif
# if defined(CONFIG_STM32_STM32F10XX)
# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SPI_DMAPRIO"
# endif
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SPI_DMAPRIO"
# endif
# else
# error "Unknown STM32 DMA"
# endif
#endif
/* DMA channel configuration */
#define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
#define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
nuttx/arch/arm/src/stm32/stm32_vectors.S
+6
View File
@@ -143,6 +143,9 @@ stm32_vectors:
#undef VECTOR
#define VECTOR(l,i) .word l
#undef UNUSED
#define UNUSED(i) .word stm32_reserved
#if defined(CONFIG_STM32_STM32F10XX)
# include "chip/chip/stm32f10xxx_vectors.h"
#elif defined(CONFIG_STM32_STM32F20XX)
@@ -176,6 +179,9 @@ handlers:
#undef VECTOR
#define VECTOR(l,i) HANDLER l, i
#undef UNUSED
#define UNUSED(i)
#if defined(CONFIG_STM32_STM32F10XX)
# include "chip/chip/stm32f10xxx_vectors.h"
#elif defined(CONFIG_STM32_STM32F20XX)
nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c
+6
View File
@@ -144,6 +144,12 @@ static inline void rcc_enableahb(void)
regval |= RCC_AHBENR_SDIOEN;
#endif
#if defined(CONFIG_STM32_ETHMAC) && defined(CONFIG_STM32_CONNECTIVITYLINE)
/* Ethernet clock enable */
regval |= (RCC_AHBENR_ETHMACEN | RCC_AHBENR_ETHMACTXEN | RCC_AHBENR_ETHMACRXEN);
#endif
putreg32(regval, STM32_RCC_AHBENR); /* Enable peripherals */
}
nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c
+1
View File
@@ -783,6 +783,7 @@ void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg, bool
* mode to determine when the buffer is half-full, or in double-buffered
* mode to determine when one of the two buffers is full.
*/
scr |= (half ? DMA_SCR_HTIE : 0) | DMA_SCR_TCIE | DMA_SCR_TEIE;
}
nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
+1
View File
@@ -783,6 +783,7 @@ void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg, bool
* mode to determine when the buffer is half-full, or in double-buffered
* mode to determine when one of the two buffers is full.
*/
scr |= (half ? DMA_SCR_HTIE : 0) | DMA_SCR_TCIE | DMA_SCR_TEIE;
}
nuttx/configs/README.txt
+6
View File
@@ -1603,6 +1603,12 @@ configs/olimex-lpc2378
Linux or Cygwin. STATUS: ostest and NSH configurations available.
This port for the NXP LPC2378 was contributed by Rommel Marcelo.
configs/olimex-stm32-p107
This port uses the Olimex STM32-P107 board (STM32F107VC) and a GNU arm-elf
toolchain* under Linux or Cygwin. See the https://www.olimex.com/dev/stm32-p107.html
for further information. Contributed by Max Holtzberg. STATUS: Configurations
for the basic OS test and NSH are available and verified.
configs/olimex-strp711
This port uses the Olimex STR-P711 board and a GNU arm-elf toolchain* under
Linux or Cygwin. See the http://www.olimex.com/dev/str-p711.html" for
nuttx/configs/px4fmu/common/Make.defs
+1 -1
View File
@@ -55,7 +55,7 @@ NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
MAXOPTIMIZATION = -O3
MAXOPTIMIZATION = -Os
ARCHCPUFLAGS = -mcpu=cortex-m4 \
-mthumb \
-march=armv7e-m \
nuttx/fs/fs_closedir.c
+4 -4
View File
@@ -96,7 +96,7 @@ int closedir(FAR DIR *dirp)
*/
#ifndef CONFIG_DISABLE_MOUNTPOINT
if (INODE_IS_MOUNTPT(inode) && !DIRENT_ISPSUEDONODE(idir->fd_flags))
if (INODE_IS_MOUNTPT(inode) && !DIRENT_ISPSEUDONODE(idir->fd_flags))
{
/* The node is a file system mointpoint. Verify that the mountpoint
* supports the closedir() method (not an error if it does not)
@@ -117,13 +117,13 @@ int closedir(FAR DIR *dirp)
else
#endif
{
/* The node is part of the root psuedo file system, release
/* The node is part of the root pseudo file system, release
* our contained reference to the 'next' inode.
*/
if (idir->u.psuedo.fd_next)
if (idir->u.pseudo.fd_next)
{
inode_release(idir->u.psuedo.fd_next);
inode_release(idir->u.pseudo.fd_next);
}
}
nuttx/fs/fs_files.c
+1 -1
View File
@@ -342,7 +342,7 @@ int files_dup(FAR struct file *filep1, FAR struct file *filep2)
#endif
#endif
{
/* Open the psuedo file or device driver */
/* Open the pseudo file or device driver */
ret = inode->u.i_ops->open(filep2);
}
nuttx/fs/fs_foreachinode.c
+1 -1
View File
@@ -171,7 +171,7 @@ int foreach_inodelevel(FAR struct inode *node, struct inode_path_s *info)
* when the callback 'handler' returns a non-zero value, or when all of
* the inodes have been visited.
*
* NOTE 1: Use with caution... The psuedo-file system is locked throughout
* NOTE 1: Use with caution... The pseudo-file system is locked throughout
* the traversal.
* NOTE 2: The search algorithm is recursive and could, in principle, use
* an indeterminant amount of stack space. This will not usually be a
nuttx/fs/fs_foreachmountpoint.c
+1 -1
View File
@@ -154,7 +154,7 @@ static int mountpoint_filter(FAR struct inode *node,
* mountpoint inodes. It is intended to support the mount() command to
* when the mount command is used to enumerate mounts.
*
* NOTE 1: Use with caution... The psuedo-file system is locked throughout
* NOTE 1: Use with caution... The pseudo-file system is locked throughout
* the traversal.
* NOTE 2: The search algorithm is recursive and could, in principle, use
* an indeterminant amount of stack space. This will not usually be a
nuttx/fs/fs_internal.h
+4 -4
View File
@@ -75,10 +75,10 @@
/* Mountpoint fd_flags values */
#define DIRENTFLAGS_PSUEDONODE 1
#define DIRENTFLAGS_PSEUDONODE 1
#define DIRENT_SETPSUEDONODE(f) do (f) |= DIRENTFLAGS_PSUEDONODE; while (0)
#define DIRENT_ISPSUEDONODE(f) (((f) & DIRENTFLAGS_PSUEDONODE) != 0)
#define DIRENT_SETPSEUDONODE(f) do (f) |= DIRENTFLAGS_PSEUDONODE; while (0)
#define DIRENT_ISPSEUDONODE(f) (((f) & DIRENTFLAGS_PSEUDONODE) != 0)
/****************************************************************************
* Public Types
@@ -236,7 +236,7 @@ EXTERN void inode_release(FAR struct inode *inode);
* when the callback 'handler' returns a non-zero value, or when all of
* the inodes have been visited.
*
* NOTE 1: Use with caution... The psuedo-file system is locked throughout
* NOTE 1: Use with caution... The pseudo-file system is locked throughout
* the traversal.
* NOTE 2: The search algorithm is recursive and could, in principle, use
* an indeterminant amount of stack space. This will not usually be a
nuttx/fs/fs_opendir.c
+8 -8
View File
@@ -138,19 +138,19 @@ static inline int open_mountpoint(FAR struct inode *inode,
static void open_pseudodir(FAR struct inode *inode, FAR struct fs_dirent_s *dir)
{
/* We have a valid psuedo-filesystem node. Take two references on the
/* We have a valid pseudo-filesystem node. Take two references on the
* inode -- one for the parent (fd_root) and one for the child (fd_next).
* Note that we do not call inode_addref because we are holding the tree
* semaphore and that would result in deadlock.
*/
inode->i_crefs += 2;
dir->u.psuedo.fd_next = inode; /* This is the next node to use for readdir() */
dir->u.pseudo.fd_next = inode; /* This is the next node to use for readdir() */
/* Flag the inode as belonging to the psuedo-filesystem */
/* Flag the inode as belonging to the pseudo-filesystem */
#ifndef CONFIG_DISABLE_MOUNTPOINT
DIRENT_SETPSUEDONODE(dir->fd_flags);
DIRENT_SETPSEUDONODE(dir->fd_flags);
#endif
}
@@ -242,7 +242,7 @@ FAR DIR *opendir(FAR const char *path)
}
/* Populate the DIR structure and return it to the caller. The way that
* we do this depends on whenever this is a "normal" psuedo-file-system
* we do this depends on whenever this is a "normal" pseudo-file-system
* inode or a file system mountpoint.
*/
@@ -262,7 +262,7 @@ FAR DIR *opendir(FAR const char *path)
open_pseudodir(inode, dir);
}
/* Is this a node in the psuedo filesystem? Or a mountpoint? If the node
/* Is this a node in the pseudo filesystem? Or a mountpoint? If the node
* is the root (bisroot == TRUE), then this is a special case.
*/
@@ -280,7 +280,7 @@ FAR DIR *opendir(FAR const char *path)
#endif
else
{
/* The node is part of the root psuedo file system. Does the inode have a child?
/* The node is part of the root pseudo file system. Does the inode have a child?
* If so that the child would be the 'root' of a list of nodes under
* the directory.
*/
@@ -292,7 +292,7 @@ FAR DIR *opendir(FAR const char *path)
goto errout_with_direntry;
}
/* It looks we have a valid psuedo-filesystem directory node. */
/* It looks we have a valid pseudo-filesystem directory node. */
open_pseudodir(inode, dir);
}
nuttx/fs/fs_readdir.c
+15 -15
View File
@@ -53,16 +53,16 @@
****************************************************************************/
/****************************************************************************
* Name: readpsuedodir
* Name: readpseudodir
****************************************************************************/
static inline int readpsuedodir(struct fs_dirent_s *idir)
static inline int readpseudodir(struct fs_dirent_s *idir)
{
FAR struct inode *prev;
/* Check if we are at the end of the list */
if (!idir->u.psuedo.fd_next)
if (!idir->u.pseudo.fd_next)
{
/* End of file and error conditions are not distinguishable
* with readdir. Here we return -ENOENT to signal the end
@@ -74,21 +74,21 @@ static inline int readpsuedodir(struct fs_dirent_s *idir)
/* Copy the inode name into the dirent structure */
strncpy(idir->fd_dir.d_name, idir->u.psuedo.fd_next->i_name, NAME_MAX+1);
strncpy(idir->fd_dir.d_name, idir->u.pseudo.fd_next->i_name, NAME_MAX+1);
/* If the node has file operations, we will say that it is
* a file.
*/
idir->fd_dir.d_type = 0;
if (idir->u.psuedo.fd_next->u.i_ops)
if (idir->u.pseudo.fd_next->u.i_ops)
{
#ifndef CONFIG_DISABLE_MOUNTPOINT
if (INODE_IS_BLOCK(idir->u.psuedo.fd_next))
if (INODE_IS_BLOCK(idir->u.pseudo.fd_next))
{
idir->fd_dir.d_type |= DTYPE_BLK;
}
if (INODE_IS_MOUNTPT(idir->u.psuedo.fd_next))
if (INODE_IS_MOUNTPT(idir->u.pseudo.fd_next))
{
idir->fd_dir.d_type |= DTYPE_DIRECTORY;
}
@@ -103,7 +103,7 @@ static inline int readpsuedodir(struct fs_dirent_s *idir)
* is a directory. NOTE: that the node can be both!
*/
if (idir->u.psuedo.fd_next->i_child || !idir->u.psuedo.fd_next->u.i_ops)
if (idir->u.pseudo.fd_next->i_child || !idir->u.pseudo.fd_next->u.i_ops)
{
idir->fd_dir.d_type |= DTYPE_DIRECTORY;
}
@@ -112,14 +112,14 @@ static inline int readpsuedodir(struct fs_dirent_s *idir)
inode_semtake();
prev = idir->u.psuedo.fd_next;
idir->u.psuedo.fd_next = prev->i_peer; /* The next node to visit */
prev = idir->u.pseudo.fd_next;
idir->u.pseudo.fd_next = prev->i_peer; /* The next node to visit */
if (idir->u.psuedo.fd_next)
if (idir->u.pseudo.fd_next)
{
/* Increment the reference count on this next node */
idir->u.psuedo.fd_next->i_crefs++;
idir->u.pseudo.fd_next->i_crefs++;
}
inode_semgive();
@@ -179,7 +179,7 @@ FAR struct dirent *readdir(DIR *dirp)
#ifndef CONFIG_DISABLE_MOUNTPOINT
inode = idir->fd_root;
if (INODE_IS_MOUNTPT(inode) && !DIRENT_ISPSUEDONODE(idir->fd_flags))
if (INODE_IS_MOUNTPT(inode) && !DIRENT_ISPSEUDONODE(idir->fd_flags))
{
/* The node is a file system mointpoint. Verify that the mountpoint
* supports the readdir() method
@@ -198,9 +198,9 @@ FAR struct dirent *readdir(DIR *dirp)
else
#endif
{
/* The node is part of the root psuedo file system */
/* The node is part of the root pseudo file system */
ret = readpsuedodir(idir);
ret = readpseudodir(idir);
}
/* ret < 0 is an error. Special case: ret = -ENOENT is end of file */
nuttx/fs/fs_rewinddir.c
+6 -6
View File
@@ -52,10 +52,10 @@
****************************************************************************/
/****************************************************************************
* Name: rewindpsuedodir
* Name: rewindpseudodir
****************************************************************************/
static inline void rewindpsuedodir(struct fs_dirent_s *idir)
static inline void rewindpseudodir(struct fs_dirent_s *idir)
{
struct inode *prev;
@@ -63,8 +63,8 @@ static inline void rewindpsuedodir(struct fs_dirent_s *idir)
/* Reset the position to the beginning */
prev = idir->u.psuedo.fd_next; /* (Save to delete later) */
idir->u.psuedo.fd_next = idir->fd_root; /* The next node to visit */
prev = idir->u.pseudo.fd_next; /* (Save to delete later) */
idir->u.pseudo.fd_next = idir->fd_root; /* The next node to visit */
idir->fd_position = 0; /* Reset position */
/* Increment the reference count on the root=next node. We
@@ -138,8 +138,8 @@ void rewinddir(FAR DIR *dirp)
else
#endif
{
/* The node is part of the root psuedo file system */
/* The node is part of the root pseudo file system */
rewindpsuedodir(idir);
rewindpseudodir(idir);
}
}
nuttx/fs/fs_seekdir.c
+7 -7
View File
@@ -53,10 +53,10 @@
****************************************************************************/
/****************************************************************************
* Name: seekpsuedodir
* Name: seekpseudodir
****************************************************************************/
static inline void seekpsuedodir(struct fs_dirent_s *idir, off_t offset)
static inline void seekpseudodir(struct fs_dirent_s *idir, off_t offset)
{
struct inode *curr;
struct inode *prev;
@@ -76,7 +76,7 @@ static inline void seekpsuedodir(struct fs_dirent_s *idir, off_t offset)
else
{
pos = idir->fd_position;
curr = idir->u.psuedo.fd_next;
curr = idir->u.pseudo.fd_next;
}
/* Traverse the peer list starting at the 'root' of the
@@ -90,8 +90,8 @@ static inline void seekpsuedodir(struct fs_dirent_s *idir, off_t offset)
/* Now get the inode to vist next time that readdir() is called */
prev = idir->u.psuedo.fd_next;
idir->u.psuedo.fd_next = curr; /* The next node to visit (might be null) */
prev = idir->u.pseudo.fd_next;
idir->u.pseudo.fd_next = curr; /* The next node to visit (might be null) */
idir->fd_position = pos; /* Might be beyond the last dirent */
if (curr)
@@ -223,8 +223,8 @@ void seekdir(FAR DIR *dirp, off_t offset)
else
#endif
{
/* The node is part of the root psuedo file system */
/* The node is part of the root pseudo file system */
seekpsuedodir(idir, offset);
seekpseudodir(idir, offset);
}
}
nuttx/fs/fs_stat.c
+5 -5
View File
@@ -51,10 +51,10 @@
****************************************************************************/
/****************************************************************************
* Name: statpsuedo
* Name: statpseudo
****************************************************************************/
static inline int statpsuedo(FAR struct inode *inode, FAR struct stat *buf)
static inline int statpseudo(FAR struct inode *inode, FAR struct stat *buf)
{
/* Most of the stat entries just do not apply */
@@ -92,7 +92,7 @@ static inline int statpsuedo(FAR struct inode *inode, FAR struct stat *buf)
{
/* If it has no operations, then it must just be a intermediate
* node in the inode tree. It is something like a directory.
* We'll say that all psuedo-directories are read-able but not
* We'll say that all pseudo-directories are read-able but not
* write-able.
*/
@@ -195,9 +195,9 @@ int stat(const char *path, FAR struct stat *buf)
else
#endif
{
/* The node is part of the root psuedo file system */
/* The node is part of the root pseudo file system */
ret = statpsuedo(inode, buf);
ret = statpseudo(inode, buf);
}
/* Check if the stat operation was successful */
nuttx/fs/fs_statfs.c
+4 -4
View File
@@ -52,10 +52,10 @@
****************************************************************************/
/****************************************************************************
* Name: statpsuedo
* Name: statpseudo
****************************************************************************/
static inline int statpsuedofs(FAR struct inode *inode, FAR struct statfs *buf)
static inline int statpseudofs(FAR struct inode *inode, FAR struct statfs *buf)
{
memset(buf, 0, sizeof(struct statfs));
buf->f_type = PROC_SUPER_MAGIC;
@@ -137,9 +137,9 @@ int statfs(FAR const char *path, FAR struct statfs *buf)
else
#endif
{
/* The node is part of the root psuedo file system */
/* The node is part of the root pseudo file system */
ret = statpsuedofs(inode, buf);
ret = statpseudofs(inode, buf);
}
/* Check if the statfs operation was successful */
nuttx/fs/fs_syslog.c
+1 -1
View File
@@ -319,7 +319,7 @@ int syslog_initialize(void)
SYSLOG_OFLAGS, 0666);
}
/* No... then it must be a character driver in the NuttX psuedo-
/* No... then it must be a character driver in the NuttX pseudo-
* file system.
*/
nuttx/fs/fs_unregisterblockdriver.c
+1 -1
View File
@@ -71,7 +71,7 @@
* Name: unregister_blockdriver
*
* Description:
* Remove the block driver inode at 'path' from the psuedo-file system
* Remove the block driver inode at 'path' from the pseudo-file system
*
****************************************************************************/
nuttx/fs/fs_unregisterdriver.c
+1 -1
View File
@@ -71,7 +71,7 @@
* Name: unregister_driver
*
* Description:
* Remove the character driver inode at 'path' from the psuedo-file system
* Remove the character driver inode at 'path' from the pseudo-file system
*
****************************************************************************/

Some files were not shown because too many files have changed in this diff Show More