Changes to px4fmu-v4 for upstream Nuttx and hardfault logging

cmake/configs/nuttx_px4fmu-v4_default.cmake

@@ -1,5 +1,7 @@
 include(nuttx/px4_impl_nuttx)
 
+px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common)
+
 set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
 
 set(config_uavcan_num_ifaces 1)
@@ -61,6 +63,7 @@ set(config_module_list
 	systemcmds/perf
 	systemcmds/pwm
 	systemcmds/esc_calib
+	systemcmds/hardfault_log
 	systemcmds/reboot
 	systemcmds/topic_listener
 	systemcmds/top

nuttx-configs/px4fmu-v4/include/board.h

@@ -147,11 +147,23 @@
 
 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
  * otherwise frequency is 2xAPBx.
- * Note: TIM1,8 are on APB2, others on APB1
+ * Note: TIM1,8-11 are on APB2, others on APB1
  */
 
-#define STM32_TIM18_FREQUENCY   (2*STM32_PCLK2_FREQUENCY)
+#define BOARD_TIM1_FREQUENCY    STM32_APB2_TIM1_CLKIN
-#define STM32_TIM27_FREQUENCY   (2*STM32_PCLK1_FREQUENCY)
+#define BOARD_TIM2_FREQUENCY    STM32_APB1_TIM2_CLKIN
+#define BOARD_TIM3_FREQUENCY    STM32_APB1_TIM3_CLKIN
+#define BOARD_TIM4_FREQUENCY    STM32_APB1_TIM4_CLKIN
+#define BOARD_TIM5_FREQUENCY    STM32_APB1_TIM5_CLKIN
+#define BOARD_TIM6_FREQUENCY    STM32_APB1_TIM6_CLKIN
+#define BOARD_TIM7_FREQUENCY    STM32_APB1_TIM7_CLKIN
+#define BOARD_TIM8_FREQUENCY    STM32_APB2_TIM8_CLKIN
+#define BOARD_TIM9_FREQUENCY    STM32_APB2_TIM9_CLKIN
+#define BOARD_TIM10_FREQUENCY   STM32_APB2_TIM10_CLKIN
+#define BOARD_TIM11_FREQUENCY   STM32_APB2_TIM11_CLKIN
+#define BOARD_TIM12_FREQUENCY   STM32_APB1_TIM12_CLKIN
+#define BOARD_TIM13_FREQUENCY   STM32_APB1_TIM13_CLKIN
+#define BOARD_TIM14_FREQUENCY   STM32_APB1_TIM14_CLKIN
 
 /* SDIO dividers.  Note that slower clocking is required when DMA is disabled
  * in order to avoid RX overrun/TX underrun errors due to delayed responses

nuttx-configs/px4fmu-v4/nsh/Make.defs

@@ -35,14 +35,14 @@
 
 include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
-
 include $(TOPDIR)/PX4_Warnings.mk
+include $(TOPDIR)/PX4_Config.mk
 
 #
 # We only support building with the ARM bare-metal toolchain from
 # https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
 #
-CONFIG_ARMV7M_TOOLCHAIN	:= GNU_EABI
+CONFIG_ARMV7M_TOOLCHAIN	:= GNU_EABI${HOST_OS_FIRST_LETTER}
 
 include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
 
@@ -62,17 +62,19 @@ ARCHCPUFLAGS		 = -mcpu=cortex-m4 \
 			   -mfpu=fpv4-sp-d16 \
 			   -mfloat-abi=hard
 
+# Enable precise stack overflow tracking
 
-# enable precise stack overflow tracking
 ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
 INSTRUMENTATIONDEFINES	 = -finstrument-functions -ffixed-r10
 endif
 
-# pull in *just* libm from the toolchain ... this is grody
+# Pull in *just* libm from the toolchain ... this is grody
+
 LIBM			 = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
 EXTRA_LIBS		+= $(LIBM)
 
-# use our linker script
+# Use our linker script
+
 LDSCRIPT		 = ld.script
 
 ifeq ($(WINTOOL),y)
@@ -94,18 +96,20 @@ else
     ARCHSCRIPT		 = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
   else
     # Linux/Cygwin-native toolchain
-    MKDEP		 = $(TOPDIR)/tools/mkdeps.sh
+    MKDEP		 = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
     ARCHINCLUDES	 = -I. -isystem $(TOPDIR)/include
     ARCHXXINCLUDES	 = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
     ARCHSCRIPT		 = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
   endif
 endif
 
-# tool versions
+# Tool versions
+
 ARCHCCVERSION		 = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
 ARCHCCMAJOR		 = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
 
-# optimisation flags
+# Optimization flags
+
 ARCHOPTIMIZATION	 = $(MAXOPTIMIZATION) \
 			   -fno-strict-aliasing \
 			   -fno-strength-reduce \
@@ -127,7 +131,8 @@ ARCHWARNINGSXX		 = $(ARCHWARNINGS) $(PX4_ARCHWARNINGSXX)
 ARCHDEFINES		 =
 ARCHPICFLAGS		 = -fpic -msingle-pic-base -mpic-register=r10
 
-# this seems to be the only way to add linker flags
+# This seems to be the only way to add linker flags
+
 EXTRA_LIBS		+= --warn-common \
 			   --gc-sections
 
@@ -146,8 +151,8 @@ OBJEXT			 = .o
 LIBEXT			 = .a
 EXEEXT			 =
 
+# Produce partially-linked $1 from files in $2
 
-# produce partially-linked $1 from files in $2
 define PRELINK
 	@echo "PRELINK: $1"
 	$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1

nuttx-configs/px4fmu-v4/nsh/appconfig

@@ -1,52 +0,0 @@
-############################################################################
-# configs/px4fmu/nsh/appconfig
-#
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
-#   Author: Gregory Nutt <gnutt@nuttx.org>
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-#
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in
-#    the documentation and/or other materials provided with the
-#    distribution.
-# 3. Neither the name NuttX nor the names of its contributors may be
-#    used to endorse or promote products derived from this software
-#    without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-# POSSIBILITY OF SUCH DAMAGE.
-#
-############################################################################
-
-# Path to example in apps/examples containing the user_start entry point
-
-CONFIGURED_APPS	+= examples/nsh
-
-# The NSH application library
-CONFIGURED_APPS += nshlib
-CONFIGURED_APPS += system/readline
-
-ifeq ($(CONFIG_CAN),y)
-CONFIGURED_APPS += examples/can
-endif
-
-#ifeq ($(CONFIG_USBDEV),y)
-#ifeq ($(CONFIG_CDCACM),y)
-CONFIGURED_APPS += examples/cdcacm
-#endif
-#endif

nuttx-configs/px4fmu-v4/src/Makefile

@@ -80,5 +80,9 @@ distclean: clean
 	$(call DELFILE, Make.dep)
 	$(call DELFILE, .depend)
 
+ifneq ($(BOARD_CONTEXT),y)
+context:
+endif
+
 -include Make.dep
 

src/drivers/boards/px4fmu-v4/board_config.h

@@ -47,11 +47,6 @@
 #include <nuttx/compiler.h>
 #include <stdint.h>
 
-#include <stm32.h>
-#include <arch/board/board.h>
-
-#define UDID_START		0x1FFF7A10
-
 /****************************************************************************************************
  * Definitions
  ****************************************************************************************************/
@@ -168,7 +163,7 @@
 #define ADC_BATTERY_VOLTAGE_CHANNEL		2
 #define ADC_BATTERY_CURRENT_CHANNEL		3
 #define ADC_5V_RAIL_SENSE				4
-#define ADC_RC_RSSI_CHANNEL			11
+#define ADC_RC_RSSI_CHANNEL				11
 
 /* User GPIOs
  *
@@ -251,9 +246,6 @@
 #define GPIO_LED_SAFETY			(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN3)
 #define GPIO_BTN_SAFETY			(GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN4)
 #define GPIO_PERIPH_3V3_EN		(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN5)
-/* for R07, this signal is active low */
-//#define GPIO_SBUS_INV			(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
-//#define INVERT_RC_INPUT(_s)		px4_arch_gpiowrite(GPIO_SBUS_INV, 1-_s);
 /* for R12, this signal is active high */
 #define GPIO_SBUS_INV			(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
 #define INVERT_RC_INPUT(_s)		px4_arch_gpiowrite(GPIO_SBUS_INV, _s)
@@ -266,7 +258,6 @@
 /* Power switch controls ******************************************************/
 
 #define POWER_SPEKTRUM(_s)			px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (1-_s))
-//#define GPIO_USART1_RX_SPEKTRUM		(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7)
 #define SPEKTRUM_RX_AS_UART()		px4_arch_configgpio(GPIO_USART1_RX)
 
 // FMUv4 has a separate GPIO for serial RC output
@@ -277,9 +268,9 @@
 
 #define	BOARD_NAME "PX4FMU_V4"
 
-/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
+/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction)
- * system_power interface, and herefore provides the true logic
+ * this board support the ADC system_power interface, and therefore
- * GPIO BOARD_ADC_xxxx macros.
+ * provides the true logic GPIO BOARD_ADC_xxxx macros.
  */
 #define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
 #define BOARD_ADC_BRICK_VALID   (px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
@@ -333,26 +324,6 @@ extern void stm32_usbinitialize(void);
 
 extern void board_peripheral_reset(int ms);
 
-
-/****************************************************************************
- * Name: nsh_archinitialize
- *
- * Description:
- *   Perform architecture specific initialization for NSH.
- *
- *   CONFIG_NSH_ARCHINIT=y :
- *     Called from the NSH library
- *
- *   CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
- *   CONFIG_NSH_ARCHINIT=n :
- *     Called from board_initialize().
- *
- ****************************************************************************/
-
-#ifdef CONFIG_NSH_LIBRARY
-int nsh_archinitialize(void);
-#endif
-
 #include "../common/board_common.h"
 
 #endif /* __ASSEMBLY__ */

src/drivers/boards/px4fmu-v4/px4fmu_can.c

@@ -46,7 +46,7 @@
 #include <errno.h>
 #include <debug.h>
 
-#include <nuttx/can.h>
+#include <nuttx/drivers/can.h>
 #include <arch/board/board.h>
 
 #include "chip.h"
@@ -74,21 +74,6 @@
 #  define CAN_PORT 2
 #endif
 
-/* Debug ***************************************************************************/
-/* Non-standard debug that may be enabled just for testing CAN */
-
-#ifdef CONFIG_DEBUG_CAN
-#  define candbg    dbg
-#  define canvdbg   vdbg
-#  define canlldbg  lldbg
-#  define canllvdbg llvdbg
-#else
-#  define candbg(x...)
-#  define canvdbg(x...)
-#  define canlldbg(x...)
-#  define canllvdbg(x...)
-#endif
-
 /************************************************************************************
  * Private Functions
  ************************************************************************************/
@@ -121,7 +106,7 @@ int can_devinit(void)
 		can = stm32_caninitialize(CAN_PORT);
 
 		if (can == NULL) {
-			candbg("ERROR:  Failed to get CAN interface\n");
+			canerr("ERROR:  Failed to get CAN interface\n");
 			return -ENODEV;
 		}
 
@@ -130,7 +115,7 @@ int can_devinit(void)
 		ret = can_register("/dev/can0", can);
 
 		if (ret < 0) {
-			candbg("ERROR: can_register failed: %d\n", ret);
+			canerr("ERROR: can_register failed: %d\n", ret);
 			return ret;
 		}
 

src/drivers/boards/px4fmu-v4/px4fmu_led.c

@@ -73,20 +73,20 @@ __EXPORT void led_init(void)
 {
 	/* Configure LED GPIOs for output */
 	for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
-		px4_arch_configgpio(g_ledmap[l]);
+		stm32_configgpio(g_ledmap[l]);
 	}
 }
 
 static void phy_set_led(int led, bool state)
 {
 	/* Pull Down to switch on */
-	px4_arch_gpiowrite(g_ledmap[led], !state);
+	stm32_gpiowrite(g_ledmap[led], !state);
 }
 
 static bool phy_get_led(int led)
 {
 
-	return !px4_arch_gpioread(g_ledmap[led]);
+	return !stm32_gpioread(g_ledmap[led]);
 }
 
 __EXPORT void led_on(int led)

src/drivers/boards/px4fmu-v4/px4fmu_spi.c

@@ -48,7 +48,7 @@
 #include <debug.h>
 #include <unistd.h>
 
-#include <nuttx/spi.h>
+#include <nuttx/spi/spi.h>
 #include <arch/board/board.h>
 
 #include <up_arch.h>
@@ -78,24 +78,13 @@ __EXPORT void stm32_spiinitialize(void)
 	px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
 	px4_arch_configgpio(GPIO_SPI_CS_BMI160);
 
-	/* De-activate all peripherals,
-	 * required for some peripheral
-	 * state machines
-	 */
-	px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
-
 	px4_arch_configgpio(GPIO_DRDY_MPU9250);
 	px4_arch_configgpio(GPIO_DRDY_HMC5983);
 	px4_arch_configgpio(GPIO_DRDY_ICM_20608_G);
 #endif
 
 #ifdef CONFIG_STM32_SPI2
-	px4_arch_configgpio(GPIO_SPI_CS_FRAM);
+	stm32_configgpio(GPIO_SPI_CS_FRAM);
-	px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
 #endif
 
 }
@@ -173,14 +162,14 @@ __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
 	switch (devid) {
 	case SPIDEV_FLASH:
 		/* Making sure the other peripherals are not selected */
-		px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
+		stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
-		px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
+		stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
 		break;
 
 	case PX4_SPIDEV_BARO:
 		/* Making sure the other peripherals are not selected */
-		px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
+		stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
-		px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
+		stm32_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
 		break;
 
 	default:
@@ -210,25 +199,25 @@ __EXPORT void board_spi_reset(int ms)
 	px4_arch_gpiowrite(GPIO_SPI_CS_OFF_ICM_20608_G, 0);
 	px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI160, 0);
 
-	px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
+	stm32_configgpio(GPIO_SPI1_SCK_OFF);
-	px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
+	stm32_configgpio(GPIO_SPI1_MISO_OFF);
-	px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
+	stm32_configgpio(GPIO_SPI1_MOSI_OFF);
 
-	px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
+	stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
-	px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
+	stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
-	px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
+	stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
 
-	px4_arch_configgpio(GPIO_DRDY_OFF_MPU9250);
+	stm32_configgpio(GPIO_DRDY_OFF_MPU9250);
-	px4_arch_configgpio(GPIO_DRDY_OFF_HMC5983);
+	stm32_configgpio(GPIO_DRDY_OFF_HMC5983);
-	px4_arch_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
+	stm32_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
 
-	px4_arch_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
+	stm32_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
-	px4_arch_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
+	stm32_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
-	px4_arch_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
+	stm32_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
 
 	/* set the sensor rail off */
-	px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
+	stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
-	px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
+	stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
 
 	/* wait for the sensor rail to reach GND */
 	usleep(ms * 1000);
@@ -237,7 +226,7 @@ __EXPORT void board_spi_reset(int ms)
 	/* re-enable power */
 
 	/* switch the sensor rail back on */
-	px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
+	stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
 
 	/* wait a bit before starting SPI, different times didn't influence results */
 	usleep(100);
@@ -250,25 +239,15 @@ __EXPORT void board_spi_reset(int ms)
 	px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
 	px4_arch_configgpio(GPIO_SPI_CS_BMI160);
 
-	/* De-activate all peripherals,
+	stm32_configgpio(GPIO_SPI1_SCK);
-	 * required for some peripheral
+	stm32_configgpio(GPIO_SPI1_MISO);
-	 * state machines
+	stm32_configgpio(GPIO_SPI1_MOSI);
-	 */
-	px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
-	px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
-
-	px4_arch_configgpio(GPIO_SPI1_SCK);
-	px4_arch_configgpio(GPIO_SPI1_MISO);
-	px4_arch_configgpio(GPIO_SPI1_MOSI);
 
 	// // XXX bring up the EXTI pins again
-	// px4_arch_configgpio(GPIO_GYRO_DRDY);
+	// stm32_configgpio(GPIO_GYRO_DRDY);
-	// px4_arch_configgpio(GPIO_MAG_DRDY);
+	// stm32_configgpio(GPIO_MAG_DRDY);
-	// px4_arch_configgpio(GPIO_ACCEL_DRDY);
+	// stm32_configgpio(GPIO_ACCEL_DRDY);
-	// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
+	// stm32_configgpio(GPIO_EXTI_MPU_DRDY);
 
 #endif
 

src/drivers/boards/px4fmu-v4/px4fmu_usb.c

@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
 	/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
 
 #ifdef CONFIG_STM32_OTGFS
-	px4_arch_configgpio(GPIO_OTGFS_VBUS);
+	stm32_configgpio(GPIO_OTGFS_VBUS);
 	/* XXX We only support device mode
-	px4_arch_configgpio(GPIO_OTGFS_PWRON);
+	stm32_configgpio(GPIO_OTGFS_PWRON);
-	px4_arch_configgpio(GPIO_OTGFS_OVER);
+	stm32_configgpio(GPIO_OTGFS_OVER);
 	*/
 #endif
 }
@@ -103,6 +103,6 @@ __EXPORT void stm32_usbinitialize(void)
 
 __EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
 {
-	//ulldbg("resume: %d\n", resume);
+	uinfo("resume: %d\n", resume);
 }