mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-05-28 19:32:36 +08:00
Changes to px4fmu-v4 for upstream Nuttx and hardfault logging
This commit is contained in:
David Sidrane
committed by
Lorenz Meier
Lorenz Meier
parent
c89c47e57e
commit
17633c0714
@@ -1,5 +1,7 @@
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include(nuttx/px4_impl_nuttx)
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px4_nuttx_configure(HWCLASS m4 CONFIG nsh ROMFS y ROMFSROOT px4fmu_common)
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set(CMAKE_TOOLCHAIN_FILE ${PX4_SOURCE_DIR}/cmake/toolchains/Toolchain-arm-none-eabi.cmake)
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set(config_uavcan_num_ifaces 1)
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@@ -61,6 +63,7 @@ set(config_module_list
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systemcmds/perf
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systemcmds/pwm
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systemcmds/esc_calib
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systemcmds/hardfault_log
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systemcmds/reboot
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systemcmds/topic_listener
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systemcmds/top
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@@ -147,11 +147,23 @@
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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* Note: TIM1,8-11 are on APB2, others on APB1
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*/
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#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
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#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
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#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
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#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
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#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
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#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
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#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
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#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
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#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
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#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
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#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
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#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
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#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
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#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
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#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
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/* SDIO dividers. Note that slower clocking is required when DMA is disabled
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* in order to avoid RX overrun/TX underrun errors due to delayed responses
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@@ -35,14 +35,14 @@
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include ${TOPDIR}/.config
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include ${TOPDIR}/tools/Config.mk
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include $(TOPDIR)/PX4_Warnings.mk
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include $(TOPDIR)/PX4_Config.mk
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#
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# We only support building with the ARM bare-metal toolchain from
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# https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
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#
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CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI
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CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI${HOST_OS_FIRST_LETTER}
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include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
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@@ -62,17 +62,19 @@ ARCHCPUFLAGS = -mcpu=cortex-m4 \
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-mfpu=fpv4-sp-d16 \
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-mfloat-abi=hard
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# Enable precise stack overflow tracking
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# enable precise stack overflow tracking
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
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endif
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# pull in *just* libm from the toolchain ... this is grody
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# Pull in *just* libm from the toolchain ... this is grody
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LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
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EXTRA_LIBS += $(LIBM)
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# use our linker script
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# Use our linker script
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LDSCRIPT = ld.script
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ifeq ($(WINTOOL),y)
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@@ -94,18 +96,20 @@ else
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
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else
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# Linux/Cygwin-native toolchain
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MKDEP = $(TOPDIR)/tools/mkdeps.sh
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MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
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ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
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ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
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endif
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endif
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# tool versions
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# Tool versions
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ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
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ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
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# optimisation flags
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# Optimization flags
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ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \
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-fno-strict-aliasing \
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-fno-strength-reduce \
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@@ -127,7 +131,8 @@ ARCHWARNINGSXX = $(ARCHWARNINGS) $(PX4_ARCHWARNINGSXX)
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ARCHDEFINES =
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ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
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# this seems to be the only way to add linker flags
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# This seems to be the only way to add linker flags
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EXTRA_LIBS += --warn-common \
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--gc-sections
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@@ -146,8 +151,8 @@ OBJEXT = .o
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LIBEXT = .a
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EXEEXT =
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# Produce partially-linked $1 from files in $2
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# produce partially-linked $1 from files in $2
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define PRELINK
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@echo "PRELINK: $1"
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$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1
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@@ -1,52 +0,0 @@
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############################################################################
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# configs/px4fmu/nsh/appconfig
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# Path to example in apps/examples containing the user_start entry point
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CONFIGURED_APPS += examples/nsh
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# The NSH application library
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CONFIGURED_APPS += nshlib
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CONFIGURED_APPS += system/readline
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ifeq ($(CONFIG_CAN),y)
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CONFIGURED_APPS += examples/can
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endif
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#ifeq ($(CONFIG_USBDEV),y)
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#ifeq ($(CONFIG_CDCACM),y)
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CONFIGURED_APPS += examples/cdcacm
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#endif
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -80,5 +80,9 @@ distclean: clean
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$(call DELFILE, Make.dep)
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$(call DELFILE, .depend)
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ifneq ($(BOARD_CONTEXT),y)
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context:
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endif
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-include Make.dep
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@@ -47,11 +47,6 @@
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#include <nuttx/compiler.h>
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#include <stdint.h>
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#include <stm32.h>
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#include <arch/board/board.h>
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#define UDID_START 0x1FFF7A10
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/****************************************************************************************************
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* Definitions
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****************************************************************************************************/
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@@ -168,7 +163,7 @@
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#define ADC_BATTERY_VOLTAGE_CHANNEL 2
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#define ADC_BATTERY_CURRENT_CHANNEL 3
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#define ADC_5V_RAIL_SENSE 4
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#define ADC_RC_RSSI_CHANNEL 11
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#define ADC_RC_RSSI_CHANNEL 11
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/* User GPIOs
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*
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@@ -251,9 +246,6 @@
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#define GPIO_LED_SAFETY (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN3)
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#define GPIO_BTN_SAFETY (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTC|GPIO_PIN4)
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#define GPIO_PERIPH_3V3_EN (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN5)
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/* for R07, this signal is active low */
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//#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN13)
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//#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, 1-_s);
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/* for R12, this signal is active high */
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#define GPIO_SBUS_INV (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
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#define INVERT_RC_INPUT(_s) px4_arch_gpiowrite(GPIO_SBUS_INV, _s)
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@@ -266,7 +258,6 @@
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/* Power switch controls ******************************************************/
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#define POWER_SPEKTRUM(_s) px4_arch_gpiowrite(GPIO_SPEKTRUM_PWR_EN, (1-_s))
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//#define GPIO_USART1_RX_SPEKTRUM (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN7)
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#define SPEKTRUM_RX_AS_UART() px4_arch_configgpio(GPIO_USART1_RX)
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// FMUv4 has a separate GPIO for serial RC output
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@@ -277,9 +268,9 @@
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#define BOARD_NAME "PX4FMU_V4"
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/* By Providing BOARD_ADC_USB_CONNECTED this board support the ADC
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* system_power interface, and herefore provides the true logic
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* GPIO BOARD_ADC_xxxx macros.
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/* By Providing BOARD_ADC_USB_CONNECTED (using the px4_arch abstraction)
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* this board support the ADC system_power interface, and therefore
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* provides the true logic GPIO BOARD_ADC_xxxx macros.
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*/
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#define BOARD_ADC_USB_CONNECTED (px4_arch_gpioread(GPIO_OTGFS_VBUS))
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#define BOARD_ADC_BRICK_VALID (px4_arch_gpioread(GPIO_VDD_BRICK_VALID))
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@@ -333,26 +324,6 @@ extern void stm32_usbinitialize(void);
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extern void board_peripheral_reset(int ms);
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/****************************************************************************
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* Name: nsh_archinitialize
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*
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* Description:
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* Perform architecture specific initialization for NSH.
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*
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* CONFIG_NSH_ARCHINIT=y :
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* Called from the NSH library
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*
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* CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
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* CONFIG_NSH_ARCHINIT=n :
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* Called from board_initialize().
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*
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****************************************************************************/
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#ifdef CONFIG_NSH_LIBRARY
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int nsh_archinitialize(void);
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#endif
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#include "../common/board_common.h"
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#endif /* __ASSEMBLY__ */
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@@ -46,7 +46,7 @@
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/can.h>
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#include <nuttx/drivers/can.h>
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#include <arch/board/board.h>
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#include "chip.h"
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@@ -74,21 +74,6 @@
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# define CAN_PORT 2
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#endif
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/* Debug ***************************************************************************/
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/* Non-standard debug that may be enabled just for testing CAN */
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#ifdef CONFIG_DEBUG_CAN
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# define candbg dbg
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# define canvdbg vdbg
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# define canlldbg lldbg
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# define canllvdbg llvdbg
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#else
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# define candbg(x...)
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# define canvdbg(x...)
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# define canlldbg(x...)
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# define canllvdbg(x...)
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#endif
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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@@ -121,7 +106,7 @@ int can_devinit(void)
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can = stm32_caninitialize(CAN_PORT);
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if (can == NULL) {
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candbg("ERROR: Failed to get CAN interface\n");
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canerr("ERROR: Failed to get CAN interface\n");
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return -ENODEV;
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}
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@@ -130,7 +115,7 @@ int can_devinit(void)
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ret = can_register("/dev/can0", can);
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if (ret < 0) {
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candbg("ERROR: can_register failed: %d\n", ret);
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canerr("ERROR: can_register failed: %d\n", ret);
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return ret;
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}
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File diff suppressed because it is too large
Load Diff
@@ -73,20 +73,20 @@ __EXPORT void led_init(void)
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{
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/* Configure LED GPIOs for output */
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for (size_t l = 0; l < (sizeof(g_ledmap) / sizeof(g_ledmap[0])); l++) {
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px4_arch_configgpio(g_ledmap[l]);
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stm32_configgpio(g_ledmap[l]);
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}
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}
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static void phy_set_led(int led, bool state)
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{
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/* Pull Down to switch on */
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px4_arch_gpiowrite(g_ledmap[led], !state);
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stm32_gpiowrite(g_ledmap[led], !state);
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}
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static bool phy_get_led(int led)
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{
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return !px4_arch_gpioread(g_ledmap[led]);
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return !stm32_gpioread(g_ledmap[led]);
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}
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__EXPORT void led_on(int led)
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@@ -48,7 +48,7 @@
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#include <debug.h>
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#include <unistd.h>
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#include <nuttx/spi.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include <up_arch.h>
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@@ -78,24 +78,13 @@ __EXPORT void stm32_spiinitialize(void)
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px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
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px4_arch_configgpio(GPIO_SPI_CS_BMI160);
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/* De-activate all peripherals,
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* required for some peripheral
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* state machines
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*/
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px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
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px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
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px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
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px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
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px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
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px4_arch_configgpio(GPIO_DRDY_MPU9250);
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px4_arch_configgpio(GPIO_DRDY_HMC5983);
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px4_arch_configgpio(GPIO_DRDY_ICM_20608_G);
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#endif
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#ifdef CONFIG_STM32_SPI2
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px4_arch_configgpio(GPIO_SPI_CS_FRAM);
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px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
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stm32_configgpio(GPIO_SPI_CS_FRAM);
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#endif
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}
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@@ -173,14 +162,14 @@ __EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
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switch (devid) {
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case SPIDEV_FLASH:
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/* Making sure the other peripherals are not selected */
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px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
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px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
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stm32_gpiowrite(GPIO_SPI_CS_MS5611, 1);
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stm32_gpiowrite(GPIO_SPI_CS_FRAM, !selected);
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break;
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case PX4_SPIDEV_BARO:
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/* Making sure the other peripherals are not selected */
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px4_arch_gpiowrite(GPIO_SPI_CS_FRAM, 1);
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px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
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stm32_gpiowrite(GPIO_SPI_CS_FRAM, 1);
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stm32_gpiowrite(GPIO_SPI_CS_MS5611, !selected);
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break;
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default:
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@@ -210,25 +199,25 @@ __EXPORT void board_spi_reset(int ms)
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px4_arch_gpiowrite(GPIO_SPI_CS_OFF_ICM_20608_G, 0);
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px4_arch_gpiowrite(GPIO_SPI_CS_OFF_BMI160, 0);
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px4_arch_configgpio(GPIO_SPI1_SCK_OFF);
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px4_arch_configgpio(GPIO_SPI1_MISO_OFF);
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px4_arch_configgpio(GPIO_SPI1_MOSI_OFF);
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stm32_configgpio(GPIO_SPI1_SCK_OFF);
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stm32_configgpio(GPIO_SPI1_MISO_OFF);
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stm32_configgpio(GPIO_SPI1_MOSI_OFF);
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px4_arch_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
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px4_arch_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
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px4_arch_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI1_SCK_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI1_MISO_OFF, 0);
|
||||
stm32_gpiowrite(GPIO_SPI1_MOSI_OFF, 0);
|
||||
|
||||
px4_arch_configgpio(GPIO_DRDY_OFF_MPU9250);
|
||||
px4_arch_configgpio(GPIO_DRDY_OFF_HMC5983);
|
||||
px4_arch_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
|
||||
stm32_configgpio(GPIO_DRDY_OFF_MPU9250);
|
||||
stm32_configgpio(GPIO_DRDY_OFF_HMC5983);
|
||||
stm32_configgpio(GPIO_DRDY_OFF_ICM_20608_G);
|
||||
|
||||
px4_arch_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
|
||||
px4_arch_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
|
||||
px4_arch_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
|
||||
stm32_gpiowrite(GPIO_DRDY_OFF_MPU9250, 0);
|
||||
stm32_gpiowrite(GPIO_DRDY_OFF_HMC5983, 0);
|
||||
stm32_gpiowrite(GPIO_DRDY_OFF_ICM_20608_G, 0);
|
||||
|
||||
/* set the sensor rail off */
|
||||
px4_arch_configgpio(GPIO_VDD_3V3_SENSORS_EN);
|
||||
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
|
||||
stm32_configgpio(GPIO_VDD_3V3_SENSORS_EN);
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 0);
|
||||
|
||||
/* wait for the sensor rail to reach GND */
|
||||
usleep(ms * 1000);
|
||||
@@ -237,7 +226,7 @@ __EXPORT void board_spi_reset(int ms)
|
||||
/* re-enable power */
|
||||
|
||||
/* switch the sensor rail back on */
|
||||
px4_arch_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
|
||||
stm32_gpiowrite(GPIO_VDD_3V3_SENSORS_EN, 1);
|
||||
|
||||
/* wait a bit before starting SPI, different times didn't influence results */
|
||||
usleep(100);
|
||||
@@ -250,25 +239,15 @@ __EXPORT void board_spi_reset(int ms)
|
||||
px4_arch_configgpio(GPIO_SPI_CS_ICM_20608_G);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_BMI160);
|
||||
|
||||
/* De-activate all peripherals,
|
||||
* required for some peripheral
|
||||
* state machines
|
||||
*/
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MPU9250, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_HMC5983, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_MS5611, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ICM_20608_G, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BMI160, 1);
|
||||
|
||||
px4_arch_configgpio(GPIO_SPI1_SCK);
|
||||
px4_arch_configgpio(GPIO_SPI1_MISO);
|
||||
px4_arch_configgpio(GPIO_SPI1_MOSI);
|
||||
stm32_configgpio(GPIO_SPI1_SCK);
|
||||
stm32_configgpio(GPIO_SPI1_MISO);
|
||||
stm32_configgpio(GPIO_SPI1_MOSI);
|
||||
|
||||
// // XXX bring up the EXTI pins again
|
||||
// px4_arch_configgpio(GPIO_GYRO_DRDY);
|
||||
// px4_arch_configgpio(GPIO_MAG_DRDY);
|
||||
// px4_arch_configgpio(GPIO_ACCEL_DRDY);
|
||||
// px4_arch_configgpio(GPIO_EXTI_MPU_DRDY);
|
||||
// stm32_configgpio(GPIO_GYRO_DRDY);
|
||||
// stm32_configgpio(GPIO_MAG_DRDY);
|
||||
// stm32_configgpio(GPIO_ACCEL_DRDY);
|
||||
// stm32_configgpio(GPIO_EXTI_MPU_DRDY);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -82,10 +82,10 @@ __EXPORT void stm32_usbinitialize(void)
|
||||
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */
|
||||
|
||||
#ifdef CONFIG_STM32_OTGFS
|
||||
px4_arch_configgpio(GPIO_OTGFS_VBUS);
|
||||
stm32_configgpio(GPIO_OTGFS_VBUS);
|
||||
/* XXX We only support device mode
|
||||
px4_arch_configgpio(GPIO_OTGFS_PWRON);
|
||||
px4_arch_configgpio(GPIO_OTGFS_OVER);
|
||||
stm32_configgpio(GPIO_OTGFS_PWRON);
|
||||
stm32_configgpio(GPIO_OTGFS_OVER);
|
||||
*/
|
||||
#endif
|
||||
}
|
||||
@@ -103,6 +103,6 @@ __EXPORT void stm32_usbinitialize(void)
|
||||
|
||||
__EXPORT void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
|
||||
{
|
||||
//ulldbg("resume: %d\n", resume);
|
||||
uinfo("resume: %d\n", resume);
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user