mirror of
https://github.com/PX4/PX4-Autopilot.git
synced 2026-05-26 01:17:51 +08:00
Implement STM32 IWDG driver
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4612 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
@@ -63,7 +63,7 @@ endif
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CHIP_ASRCS =
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CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c \
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stm32_gpio.c stm32_exti.c stm32_flash.c stm32_irq.c \
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stm32_lsi.c stm32_gpio.c stm32_exti.c stm32_flash.c stm32_irq.c \
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stm32_timerisr.c stm32_dma.c stm32_lowputc.c stm32_serial.c \
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stm32_spi.c stm32_sdio.c stm32_tim.c stm32_i2c.c stm32_waste.c
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@@ -121,8 +121,12 @@ ifeq ($(CONFIG_CAN),y)
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CHIP_CSRCS += stm32_can.c
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endif
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ifeq ($(CONFIT_STM32_WWDG),y)
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CHIP_CSRCS += stm32_wdg.c
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ifeq ($(CONFIG_STM32_IWDG),y)
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CHIP_CSRCS += stm32_iwdg.c
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endif
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ifeq ($(CONFIG_STM32_WWDG),y)
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CHIP_CSRCS += stm32_wwdg.c
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endif
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ifeq ($(CONFIG_DEBUG),y)
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@@ -1,8 +1,8 @@
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/************************************************************************************
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* arch/arm/src/stm32/chip/stm32_wdg.h
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*
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* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@@ -61,14 +61,14 @@
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/* Register Addresses ***************************************************************/
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#define STM32_IWDG_KR (STM32_IWDG_OFFSET+STM32_IWDG_KR_OFFSET)
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#define STM32_IWDG_PR (STM32_IWDG_OFFSET+STM32_IWDG_PR_OFFSET)
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#define STM32_IWDG_RLR (STM32_IWDG_OFFSET+STM32_IWDG_RLR_OFFSET)
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#define STM32_IWDG_SR (STM32_IWDG_OFFSET+STM32_IWDG_SR_OFFSET)
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#define STM32_IWDG_KR (STM32_IWDG_BASE+STM32_IWDG_KR_OFFSET)
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#define STM32_IWDG_PR (STM32_IWDG_BASE+STM32_IWDG_PR_OFFSET)
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#define STM32_IWDG_RLR (STM32_IWDG_BASE+STM32_IWDG_RLR_OFFSET)
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#define STM32_IWDG_SR (STM32_IWDG_BASE+STM32_IWDG_SR_OFFSET)
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#define STM32_WWDG_CR (STM32_WWDG_OFFSET+STM32_WWDG_CR_OFFSET)
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#define STM32_WWDG_CFR (STM32_WWDG_OFFSET+STM32_WWDG_CFR_OFFSET)
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#define STM32_WWDG_SR (STM32_WWDG_OFFSET+STM32_WWDG_SR_OFFSET)
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#define STM32_WWDG_CR (STM32_WWDG_BASE+STM32_WWDG_CR_OFFSET)
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#define STM32_WWDG_CFR (STM32_WWDG_BASE+STM32_WWDG_CFR_OFFSET)
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#define STM32_WWDG_SR (STM32_WWDG_BASE+STM32_WWDG_SR_OFFSET)
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/* Register Bitfield Definitions ****************************************************/
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@@ -77,6 +77,11 @@
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#define IWDG_KR_KEY_SHIFT (0) /* Bits 15-0: Key value (write only, read 0000h) */
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#define IWDG_KR_KEY_MASK (0xffff << IWDG_KR_KEY_SHIFT)
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#define IWDG_KR_KEY_ENABLE (0x5555) /* Enable register access */
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#define IWDG_KR_KEY_DISABLE (0x0000) /* Disable register access */
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#define IWDG_KR_KEY_RELOAD (0xaaaa) /* Reload the counter */
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#define IWDG_KR_KEY_START (0xcccc) /* Start the watchdog */
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/* Prescaler register (32-bit) */
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#define IWDG_PR_SHIFT (0) /* Bits 2-0: Prescaler divider */
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@@ -94,6 +99,8 @@
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#define IWDG_RLR_RL_SHIFT (0) /* Bits11:0 RL[11:0]: Watchdog counter reload value */
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#define IWDG_RLR_RL_MASK (0x0fff << IWDG_RLR_RL_SHIFT)
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#define IWDG_RLR_MAX (0xfff)
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/* Status register (32-bit) */
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#define IWDG_SR_PVU (1 << 0) /* Bit 0: Watchdog prescaler value update */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,94 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_lsi.c
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.orgr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "up_arch.h"
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#include "stm32_rcc.h"
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_rcc_enablelsi
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*
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* Description:
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* Enable the Internal Low-Speed (LSI) RC Oscillator.
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*
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****************************************************************************/
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void stm32_rcc_enablelsi(void)
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{
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/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION bit
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* the RCC CSR register.
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*/
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modifyreg16(STM32_RCC_CSR, 0, RCC_CSR_LSION);
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}
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/****************************************************************************
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* Name: stm32_rcc_disablelsi
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*
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* Description:
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* Disable the Internal Low-Speed (LSI) RC Oscillator.
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*
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****************************************************************************/
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void stm32_rcc_disablelsi(void)
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{
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/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION bit
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* the RCC CSR register.
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*/
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modifyreg16(STM32_RCC_CSR, RCC_CSR_LSION, 0);
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}
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@@ -185,6 +185,16 @@ EXTERN void stm32_clockconfig(void);
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EXTERN void stm32_rcc_enablelse(void);
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/****************************************************************************
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* Name: stm32_rcc_enablelsi
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*
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* Description:
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* Enable the Internal Low-Speed (LSI) RC Oscillator.
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*
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****************************************************************************/
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EXTERN void stm32_rcc_enablelsi(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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@@ -62,24 +62,45 @@ extern "C" {
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_wdginitialize
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* Name: stm32_iwdginitialize
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*
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* Description:
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* Initialize the watchdog time. The watchdog timer is intialized and
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* registers as /dev/watchdog0. The initial state of the watchdog time
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* is disabled.
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* Initialize the IWDG watchdog time. The watchdog timer is intialized and
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* registers as 'devpath. The initial state of the watchdog time is
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* disabled.
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*
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* Input Parameters:
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* None
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* devpath - The full path to the watchdog. This should be of the form
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* /dev/watchdog0
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* lsifreq - The calibrated LSI clock frequency
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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EXTERN void stm32_wdginitialize(void);
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EXTERN void stm32_iwdginitialize(FAR const char *devpath, uint32_t lsifreq);
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/****************************************************************************
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* Name: stm32_wwdginitialize
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*
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* Description:
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* Initialize the WWDG watchdog time. The watchdog timer is intialized and
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* registers as 'devpath. The initial state of the watchdog time is
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* disabled.
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*
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* Input Parameters:
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* devpath - The full path to the watchdog. This should be of the form
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* /dev/watchdog0
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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EXTERN void stm32_wwdginitialize(FAR const char *devpath);
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#undef EXTERN
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#if defined(__cplusplus)
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@@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_pwm.c
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* arch/arm/src/stm32/stm32_wwdg.c
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*
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* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -48,7 +48,7 @@
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#include "up_arch.h"
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#include "stm32_wdg.h"
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#if defined(CONFIT_STM32_WWDG)
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#if defined(CONFIG_WATCHDOG) && defined(CONFIG_STM32_WWDG)
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/****************************************************************************
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* Pre-Processor Definitions
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@@ -90,7 +90,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
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static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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uint32_t timeout);
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static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower,
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static xcpt_t handler);
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xcpt_t handler);
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static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
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unsigned long arg);
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@@ -218,7 +218,7 @@ static void stm32_putreg(uint32_t val, uint32_t addr)
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static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -242,7 +242,7 @@ static int stm32_start(FAR struct watchdog_lowerhalf_s *lower)
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static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -250,7 +250,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
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}
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/****************************************************************************
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* Name:
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* Name: stm32_keepalive
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*
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* Description:
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* Reset the watchdog timer to the current timeout value, prevent any
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@@ -268,7 +268,7 @@ static int stm32_stop(FAR struct watchdog_lowerhalf_s *lower)
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static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -294,7 +294,7 @@ static int stm32_keepalive(FAR struct watchdog_lowerhalf_s *lower)
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static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
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FAR struct watchdog_status_s *status)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -320,7 +320,7 @@ static int stm32_getstatus(FAR struct watchdog_lowerhalf_s *lower,
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static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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uint32_t timeout)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -350,9 +350,9 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower,
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****************************************************************************/
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static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower,
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static xcpt_t handler)
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xcpt_t handler)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -380,9 +380,9 @@ static xcpt_t stm32_capture(FAR struct watchdog_lowerhalf_s *lower,
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****************************************************************************/
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static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
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unsigned long arg);
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unsigned long arg)
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{
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FAR struct stm32_lowerhalf_s *priv = ( FAR struct stm32_lowerhalf_s)lower;
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FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
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DEBUGASSERT(priv);
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#warning "Missing logic"
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@@ -394,22 +394,23 @@ static int stm32_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd,
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_wdginitialize
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* Name: stm32_wwdginitialize
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*
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* Description:
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* Initialize the watchdog time. The watchdog timer is intialized and
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* registers as /dev/watchdog0. The initial state of the watchdog time
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* is disabled.
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* Initialize the WWDG watchdog time. The watchdog timer is intialized and
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* registers as 'devpath. The initial state of the watchdog time is
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* disabled.
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*
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* Input Parameters:
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* None
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* devpath - The full path to the watchdog. This should be of the form
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* /dev/watchdog0
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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void stm32_wdginitialize(void)
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void stm32_wwdginitialize(FAR const char *devpath)
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{
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FAR struct stm32_lowerhalf_s *priv = &g_wdgdev;
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@@ -418,11 +419,11 @@ void stm32_wdginitialize(void)
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* only called once so it is never necessary to re-zero the structure.
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*/
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priv->ops = &g_wdgops;
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priv->ops = &g_wdgops;
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/* Register the watchdog driver as /dev/watchdog0 */
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(void)watchdog_register("/dev/watchdog0", (FAR struct watchdog_lowerhalf_s *)priv);
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(void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
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}
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#endif /* CONFIT_STM32_WWDG */
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#endif /* CONFIG_WATCHDOG && CONFIG_STM32_WWDG */
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