mirror of
https://github.com/FreeRTOS/FreeRTOS.git
synced 2026-09-28 16:16:47 +08:00
Update the GCC RL78 demo to include four separate build configurations, each of which targets different hardware.
This commit is contained in:
Richard Barry
@@ -0,0 +1,100 @@
|
||||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<com.renesas.linkersection.model:SectionContainer xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:com.renesas.linkersection.model="http:///LinkerSection.ecore" targets="GNU_RL78">
|
||||
<sections name=".vec" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".vec"/>
|
||||
</sections>
|
||||
<sections name=".vects" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="4"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".vects"/>
|
||||
</sections>
|
||||
<sections name=".option_bytes" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="192"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".option_bytes"/>
|
||||
</sections>
|
||||
<sections name=".security_id" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="196"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".security_id"/>
|
||||
</sections>
|
||||
<sections name=".text">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="216"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".text"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".text.*"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="etext"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
</sections>
|
||||
<sections name=".init">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.4"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".init"/>
|
||||
</sections>
|
||||
<sections name=".fini">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.5"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".fini"/>
|
||||
</sections>
|
||||
<sections name=".got">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.6"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".got"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".got.plt"/>
|
||||
</sections>
|
||||
<sections name=".rodata MAX(., 0x2000)">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.7"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".rodata"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".rodata.*"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_erodata"/>
|
||||
</sections>
|
||||
<sections name=".eh_frame_hdr">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.8"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".eh_frame_hdr"/>
|
||||
</sections>
|
||||
<sections name=".eh_frame">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.9"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".eh_frame"/>
|
||||
</sections>
|
||||
<sections name=".jcr">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.10"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".jcr"/>
|
||||
</sections>
|
||||
<sections name=".tors">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.11"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__CTOR_LIST__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___ctors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".ctors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___ctors_end"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__CTOR_END__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__DTOR_LIST__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___dtors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".dtors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___dtors_end"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__DTOR_END__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_mdata"/>
|
||||
</sections>
|
||||
<sections name=".data">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="1044224"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_data"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".data"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".data.*"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_edata"/>
|
||||
<reservedMemAddress xsi:type="com.renesas.linkersection.model:ReferencedLabelAddress" label="//@sections.12/@contents.12"/>
|
||||
</sections>
|
||||
<sections name=".bss">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.13"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_bss"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".bss"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".bss.**"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name="COMMON"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_ebss"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_end"/>
|
||||
</sections>
|
||||
<sections name=".stack" isNoLoad="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="1048064"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_stack"/>
|
||||
</sections>
|
||||
</com.renesas.linkersection.model:SectionContainer>
|
||||
@@ -0,0 +1,100 @@
|
||||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<com.renesas.linkersection.model:SectionContainer xmi:version="2.0" xmlns:xmi="http://www.omg.org/XMI" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:com.renesas.linkersection.model="http:///LinkerSection.ecore" targets="GNU_RL78">
|
||||
<sections name=".vec" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".vec"/>
|
||||
</sections>
|
||||
<sections name=".vects" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="4"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".vects"/>
|
||||
</sections>
|
||||
<sections name=".option_bytes" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="192"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".option_bytes"/>
|
||||
</sections>
|
||||
<sections name=".security_id" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="196"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".security_id"/>
|
||||
</sections>
|
||||
<sections name=".text">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="216"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".text"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".text.*"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="etext"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
</sections>
|
||||
<sections name=".init">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.4"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".init"/>
|
||||
</sections>
|
||||
<sections name=".fini">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.5"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".fini"/>
|
||||
</sections>
|
||||
<sections name=".got">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.6"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".got"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".got.plt"/>
|
||||
</sections>
|
||||
<sections name=".rodata MAX(., 0x3000)">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.7"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".rodata"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".rodata.*"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_erodata"/>
|
||||
</sections>
|
||||
<sections name=".eh_frame_hdr">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.8"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".eh_frame_hdr"/>
|
||||
</sections>
|
||||
<sections name=".eh_frame">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.9"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".eh_frame"/>
|
||||
</sections>
|
||||
<sections name=".jcr">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.10"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".jcr"/>
|
||||
</sections>
|
||||
<sections name=".tors">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.11"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__CTOR_LIST__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___ctors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".ctors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___ctors_end"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__CTOR_END__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__DTOR_LIST__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___dtors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".dtors"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="___dtors_end"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="__DTOR_END__"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_mdata"/>
|
||||
</sections>
|
||||
<sections name=".data" isKeep="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="1040128"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_data"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".data"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".data.*"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_edata"/>
|
||||
<reservedMemAddress xsi:type="com.renesas.linkersection.model:ReferencedLabelAddress" label="//@sections.12/@contents.12"/>
|
||||
</sections>
|
||||
<sections name=".bss">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:ReferencedSectionAddress" referencedSection="//@sections.13"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_bss"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".bss"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name=".bss.**"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:WildCardExpression" specificSection="true" name="COMMON"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Keyword" text=". = ALIGN(2)"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_ebss"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_end"/>
|
||||
</sections>
|
||||
<sections name=".stack" isNoLoad="true">
|
||||
<sectionAddress xsi:type="com.renesas.linkersection.model:FixedAddress" fixedAddress="1048064"/>
|
||||
<contents xsi:type="com.renesas.linkersection.model:Label" rhs="= .;" lhs="_stack"/>
|
||||
</sections>
|
||||
</com.renesas.linkersection.model:SectionContainer>
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,4 +1,4 @@
|
||||
#Wed Mar 06 15:45:34 GMT 2013
|
||||
#Tue Mar 19 10:26:50 GMT 2013
|
||||
Library\ Generator\ Command=rl78-elf-libgen
|
||||
com.renesas.cdt.core.Assembler.option.includeFileDirectories="${workspace_loc\:/${ProjName}}\\src";
|
||||
com.renesas.cdt.core.Compiler.option.includeFileDir.1067754383="${TCINSTALL}\\rl78-elf\\optlibinc";
|
||||
@@ -15,6 +15,7 @@ com.renesas.cdt.rl78.HardwareDebug.Compiler.option.cpuType.1364542281=RL78 - G1C
|
||||
com.renesas.cdt.rl78.HardwareDebug.Compiler.option.mmul=None
|
||||
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveLibraryFiles=${ProjName};gcc;
|
||||
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.1960648199="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
|
||||
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.8586332="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
|
||||
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.970009502="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
|
||||
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.984802356="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
|
||||
eclipse.preferences.version=1
|
||||
|
||||
@@ -87,16 +87,19 @@
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
/* Include hardware dependent header files to allow this demo to run on
|
||||
multiple evaluation boards. */
|
||||
#include "demo_specific_io.h"
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configTICK_RATE_HZ ( ( unsigned short ) 1000 )
|
||||
#define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* Using the internal high speed clock */
|
||||
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 90 )
|
||||
#define configMAX_TASK_NAME_LEN ( 10 )
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
#define configUSE_16_BIT_TICKS 1
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configTOTAL_HEAP_SIZE ( (size_t ) ( 5000 ) )
|
||||
#define configTOTAL_HEAP_SIZE ( (size_t ) ( 3420 ) )
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configUSE_MUTEXES 1
|
||||
|
||||
|
||||
@@ -76,10 +76,6 @@
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Hardware includes. */
|
||||
#include "port_iodefine.h"
|
||||
#include "port_iodefine_ext.h"
|
||||
|
||||
/* The critical nesting value is initialised to a non zero value to ensure
|
||||
interrupts don't accidentally become enabled before the scheduler is started. */
|
||||
#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )
|
||||
@@ -95,8 +91,7 @@ interrupts don't accidentally become enabled before the scheduler is started. */
|
||||
* |--------------------- Zero Flag set
|
||||
* ---------------------- Global Interrupt Flag set (enabled)
|
||||
*/
|
||||
//#define portPSW ( 0xc6UL )
|
||||
#define portPSW ( 0x86UL )
|
||||
#define portPSW ( 0xc6UL )
|
||||
|
||||
/* The address of the pxCurrentTCB variable, but don't know or need to know its
|
||||
type. */
|
||||
@@ -118,7 +113,7 @@ volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
|
||||
/*
|
||||
* Sets up the periodic ISR used for the RTOS tick.
|
||||
*/
|
||||
static void prvSetupTimerInterrupt( void );
|
||||
__attribute__((weak)) void vApplicationSetupTimerInterrupt( void );
|
||||
|
||||
/*
|
||||
* Starts the scheduler by loading the context of the first task to run.
|
||||
@@ -193,7 +188,7 @@ portBASE_TYPE xPortStartScheduler( void )
|
||||
{
|
||||
/* Setup the hardware to generate the tick. Interrupts are disabled when
|
||||
this function is called. */
|
||||
prvSetupTimerInterrupt();
|
||||
vApplicationSetupTimerInterrupt();
|
||||
|
||||
/* Restore the context of the first task that is going to run. */
|
||||
vPortStartFirstTask();
|
||||
@@ -209,7 +204,7 @@ void vPortEndScheduler( void )
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvSetupTimerInterrupt( void )
|
||||
__attribute__((weak)) void vApplicationSetupTimerInterrupt( void )
|
||||
{
|
||||
const unsigned short usClockHz = 15000UL; /* Internal clock. */
|
||||
const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;
|
||||
@@ -217,28 +212,49 @@ const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;
|
||||
/* Use the internal 15K clock. */
|
||||
OSMC = ( unsigned char ) 0x16;
|
||||
|
||||
/* Supply the RTC clock. */
|
||||
RTCEN = ( unsigned char ) 1U;
|
||||
#ifdef RTCEN
|
||||
{
|
||||
/* Supply the interval timer clock. */
|
||||
RTCEN = ( unsigned char ) 1U;
|
||||
|
||||
/* Disable ITMC operation. */
|
||||
ITMC = ( unsigned char ) 0x0000;
|
||||
/* Disable INTIT interrupt. */
|
||||
ITMK = ( unsigned char ) 1;
|
||||
|
||||
/* Disable INTIT interrupt. */
|
||||
ITMK = ( unsigned char ) 1;
|
||||
/* Disable ITMC operation. */
|
||||
ITMC = ( unsigned char ) 0x0000;
|
||||
|
||||
/* Set INTIT high priority */
|
||||
ITPR1 = ( unsigned char ) 1;
|
||||
ITPR0 = ( unsigned char ) 1;
|
||||
/* Clear INIT interrupt. */
|
||||
ITIF = ( unsigned char ) 0;
|
||||
|
||||
/* Clear INIT interrupt. */
|
||||
ITIF = ( unsigned char ) 0;
|
||||
/* Set interval and enable interrupt operation. */
|
||||
ITMC = usCompareMatch | 0x8000U;
|
||||
|
||||
/* Set interval and enable interrupt operation. */
|
||||
ITMC = usCompareMatch | 0x8000U;
|
||||
/* Enable INTIT interrupt. */
|
||||
ITMK = ( unsigned char ) 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Enable INTIT interrupt. */
|
||||
ITMK = ( unsigned char ) 0;
|
||||
#ifdef TMKAEN
|
||||
{
|
||||
/* Supply the interval timer clock. */
|
||||
TMKAEN = ( unsigned char ) 1U;
|
||||
|
||||
/* Disable INTIT interrupt. */
|
||||
TMKAMK = ( unsigned char ) 1;
|
||||
|
||||
/* Disable ITMC operation. */
|
||||
ITMC = ( unsigned char ) 0x0000;
|
||||
|
||||
/* Clear INIT interrupt. */
|
||||
TMKAIF = ( unsigned char ) 0;
|
||||
|
||||
/* Set interval and enable interrupt operation. */
|
||||
ITMC = usCompareMatch | 0x8000U;
|
||||
|
||||
/* Enable INTIT interrupt. */
|
||||
TMKAMK = ( unsigned char ) 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
|
||||
@@ -72,6 +72,9 @@
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
/* INCLUDED_FROM_FREERTOS_ASM_FILE is defined before FreeRTOSConfig.h so non
|
||||
assembly compatible definitions within the header file can be omitted. */
|
||||
#define INCLUDED_FROM_FREERTOS_ASM_FILE
|
||||
#include "FreeRTOSConfig.h"
|
||||
#include "ISR_Support.h"
|
||||
|
||||
|
||||
+39
-19
@@ -72,31 +72,51 @@
|
||||
mission critical applications that require provable dependability.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Board specific macros to initialise and toggle an LED.
|
||||
*/
|
||||
|
||||
#ifndef LED_IO_H
|
||||
#define LED_IO_H
|
||||
|
||||
#ifdef YRPBRL78G13
|
||||
#define LED_BIT ( P7_bit.no7 )
|
||||
#define LED_INIT() P7 &= 0x7F; PM7 &= 0x7F
|
||||
#endif /* YRPBRL78G13 */
|
||||
/* Include the register definition file that is correct for the hardware being
|
||||
used. The C and assembler pre-processor must have one of the following board
|
||||
definitions defined to have the correct register definition header file
|
||||
included. Alternatively, just manually include the correct files here. */
|
||||
|
||||
#ifdef YRDKRL78G14
|
||||
#define LED_BIT ( P4_bit.no1 )
|
||||
#define LED_INIT() PM4_bit.no1 = 0
|
||||
#endif /* YRDKRL78G14 */
|
||||
/* Prevent the files being included from the FreeRTOS port layer assembly
|
||||
source files. */
|
||||
#ifndef INCLUDED_FROM_FREERTOS_ASM_FILE
|
||||
|
||||
#ifdef RSKRL78G1C
|
||||
#define LED_BIT ( P0_bit.no1 )
|
||||
#define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD
|
||||
#endif /* RSKRL78G1C */
|
||||
#ifdef YRDKRL78G14
|
||||
#include "iodefine_RL78G14.h"
|
||||
#include "iodefine_RL78G14_ext.h"
|
||||
#define LED_BIT ( P4_bit.no1 )
|
||||
#define LED_INIT() LED_BIT = 0
|
||||
#endif /* YRDKRL78G14 */
|
||||
|
||||
#ifndef LED_BIT
|
||||
#error The hardware platform is not defined
|
||||
#endif
|
||||
#ifdef RSKRL78G1C
|
||||
#include "iodefine_RL78G1C.h"
|
||||
#include "iodefine_RL78G1C_ext.h"
|
||||
#define LED_BIT ( P0_bit.no1 )
|
||||
#define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD
|
||||
#endif /* RSKRL78G1C */
|
||||
|
||||
#ifdef RSKRL78L13
|
||||
#include "iodefine_RL78L13.h"
|
||||
#include "iodefine_RL78L13_ext.h"
|
||||
#define LED_BIT ( P4_bit.no1 )
|
||||
#define LED_INIT() P4 &= 0xFD; PM4 &= 0xFD
|
||||
#endif /* RSKRL78L13 */
|
||||
|
||||
#ifdef RL78_G1A_TB
|
||||
#include "iodefine_RL78G1A.h"
|
||||
#include "iodefine_RL78G1A_ext.h"
|
||||
#define LED_BIT ( P6_bit.no2 )
|
||||
#define LED_INIT() P6 &= 0xFB; PM6 &= 0xFB
|
||||
#endif /* RL78_G1A_TB */
|
||||
|
||||
#ifndef LED_BIT
|
||||
#error The hardware platform is not defined
|
||||
#endif
|
||||
|
||||
#endif /* INCLUDED_FROM_FREERTOS_ASM_FILE */
|
||||
|
||||
#endif /* LED_IO_H */
|
||||
|
||||
@@ -13,10 +13,6 @@
|
||||
/* Scheduler include files. */
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
/* Hardware includes. */
|
||||
#include "port_iodefine.h"
|
||||
#include "LED.h"
|
||||
|
||||
void HardwareSetup( void )
|
||||
{
|
||||
portDISABLE_INTERRUPTS();
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+1
-1
@@ -1,6 +1,6 @@
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* PROJECT NAME : RL78G14 */
|
||||
/* FILE : iodefine.h */
|
||||
/* DESCRIPTION : Definition of I/O Registers */
|
||||
/* CPU SERIES : RL78 - G14 */
|
||||
+1
-1
@@ -1,6 +1,6 @@
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* PROJECT NAME : RL78G14 */
|
||||
/* FILE : iodefine_ext.h */
|
||||
/* DESCRIPTION : Definition of Extended SFRs */
|
||||
/* CPU SERIES : RL78 - G14 */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+44
-15
@@ -1,26 +1,24 @@
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* FILE : iodefine.h */
|
||||
/* DESCRIPTION : Definition of I/O Registers */
|
||||
/* CPU SERIES : RL78 - G1C */
|
||||
/* CPU TYPE : R5F10JBC */
|
||||
/* */
|
||||
/* This file is generated by e2studio. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RL78G1C */
|
||||
/* FILE : iodefine.h */
|
||||
/* DESCRIPTION : Definition of I/O Registers */
|
||||
/* CPU SERIES : RL78 - G1C */
|
||||
/* CPU TYPE : R5F10JGC */
|
||||
/* */
|
||||
/* This file is generated by e2studio. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F10JBC.DVF */
|
||||
/* DR5F10JGC.DVF */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* File Version V1.00 */
|
||||
/* Tool Version 1.9.7121 */
|
||||
/* Date Generated 13/11/2012 */
|
||||
/************************************************************************/
|
||||
|
||||
#include "port_iodefine_ext.h"
|
||||
|
||||
#ifndef __IOREG_BIT_STRUCTURES
|
||||
#define __IOREG_BIT_STRUCTURES
|
||||
typedef struct {
|
||||
@@ -101,6 +99,10 @@ union un_p13 {
|
||||
unsigned char p13;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_p14 {
|
||||
unsigned char p14;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm0 {
|
||||
unsigned char pm0;
|
||||
__BITS8 BIT;
|
||||
@@ -137,6 +139,10 @@ union un_pm12 {
|
||||
unsigned char pm12;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pm14 {
|
||||
unsigned char pm14;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_adm0 {
|
||||
unsigned char adm0;
|
||||
__BITS8 BIT;
|
||||
@@ -149,6 +155,10 @@ union un_adm1 {
|
||||
unsigned char adm1;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_krm {
|
||||
unsigned char krm;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_egp0 {
|
||||
unsigned char egp0;
|
||||
__BITS8 BIT;
|
||||
@@ -422,6 +432,8 @@ union un_pmc {
|
||||
#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
|
||||
#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
|
||||
#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
|
||||
#define P14 (*(volatile union un_p14 *)0xFFF0E).p14
|
||||
#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT
|
||||
#define SDR00 (*(volatile unsigned short *)0xFFF10)
|
||||
#define SIO00 (*(volatile unsigned char *)0xFFF10)
|
||||
#define TXD0 (*(volatile unsigned char *)0xFFF10)
|
||||
@@ -452,12 +464,16 @@ union un_pmc {
|
||||
#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
|
||||
#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
|
||||
#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
|
||||
#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14
|
||||
#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT
|
||||
#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
|
||||
#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
|
||||
#define ADS (*(volatile union un_ads *)0xFFF31).ads
|
||||
#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
|
||||
#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
|
||||
#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
|
||||
#define KRM (*(volatile union un_krm *)0xFFF37).krm
|
||||
#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT
|
||||
#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
|
||||
#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
|
||||
#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
|
||||
@@ -665,6 +681,7 @@ union un_pmc {
|
||||
#define SQST FSSQ_bit.no7
|
||||
#define SQEND FSASTH_bit.no6
|
||||
#define ESQEND FSASTH_bit.no7
|
||||
#define RCLOE1 RTCC0_bit.no5
|
||||
#define RTCE RTCC0_bit.no7
|
||||
#define RWAIT RTCC1_bit.no0
|
||||
#define RWST RTCC1_bit.no1
|
||||
@@ -675,9 +692,11 @@ union un_pmc {
|
||||
#define HIOSTOP CSC_bit.no0
|
||||
#define XTSTOP CSC_bit.no6
|
||||
#define MSTOP CSC_bit.no7
|
||||
#define SDIV CKC_bit.no3
|
||||
#define MCM0 CKC_bit.no4
|
||||
#define MCS CKC_bit.no5
|
||||
#define CSS CKC_bit.no6
|
||||
#define CLS CKC_bit.no7
|
||||
#define PCLOE0 CKS0_bit.no7
|
||||
#define PCLOE1 CKS1_bit.no7
|
||||
#define LVIF LVIM_bit.no0
|
||||
@@ -697,18 +716,22 @@ union un_pmc {
|
||||
#define DEN0 DRC0_bit.no7
|
||||
#define DST1 DRC1_bit.no0
|
||||
#define DEN1 DRC1_bit.no7
|
||||
#define PIF6 IF2_bit.no3
|
||||
#define PIF8 IF2_bit.no5
|
||||
#define PIF9 IF2_bit.no6
|
||||
#define MDIF IF2H_bit.no5
|
||||
#define FLIF IF2H_bit.no7
|
||||
#define PMK6 MK2_bit.no3
|
||||
#define PMK8 MK2_bit.no5
|
||||
#define PMK9 MK2_bit.no6
|
||||
#define MDMK MK2H_bit.no5
|
||||
#define FLMK MK2H_bit.no7
|
||||
#define PPR06 PR02_bit.no3
|
||||
#define PPR08 PR02_bit.no5
|
||||
#define PPR09 PR02_bit.no6
|
||||
#define MDPR0 PR02H_bit.no5
|
||||
#define FLPR0 PR02H_bit.no7
|
||||
#define PPR16 PR12_bit.no3
|
||||
#define PPR18 PR12_bit.no5
|
||||
#define PPR19 PR12_bit.no6
|
||||
#define MDPR1 PR12H_bit.no5
|
||||
@@ -740,6 +763,7 @@ union un_pmc {
|
||||
#define ADIF IF1H_bit.no0
|
||||
#define RTCIF IF1H_bit.no1
|
||||
#define ITIF IF1H_bit.no2
|
||||
#define KRIF IF1H_bit.no3
|
||||
#define USBIF IF1H_bit.no4
|
||||
#define RSUIF IF1H_bit.no5
|
||||
#define WDTIMK MK0_bit.no0
|
||||
@@ -769,6 +793,7 @@ union un_pmc {
|
||||
#define ADMK MK1H_bit.no0
|
||||
#define RTCMK MK1H_bit.no1
|
||||
#define ITMK MK1H_bit.no2
|
||||
#define KRMK MK1H_bit.no3
|
||||
#define USBMK MK1H_bit.no4
|
||||
#define RSUMK MK1H_bit.no5
|
||||
#define WDTIPR0 PR00_bit.no0
|
||||
@@ -798,6 +823,7 @@ union un_pmc {
|
||||
#define ADPR0 PR01H_bit.no0
|
||||
#define RTCPR0 PR01H_bit.no1
|
||||
#define ITPR0 PR01H_bit.no2
|
||||
#define KRPR0 PR01H_bit.no3
|
||||
#define USBPR0 PR01H_bit.no4
|
||||
#define RSUPR0 PR01H_bit.no5
|
||||
#define WDTIPR1 PR10_bit.no0
|
||||
@@ -827,6 +853,7 @@ union un_pmc {
|
||||
#define ADPR1 PR11H_bit.no0
|
||||
#define RTCPR1 PR11H_bit.no1
|
||||
#define ITPR1 PR11H_bit.no2
|
||||
#define KRPR1 PR11H_bit.no3
|
||||
#define USBPR1 PR11H_bit.no4
|
||||
#define RSUPR1 PR11H_bit.no5
|
||||
#define MAA PMC_bit.no0
|
||||
@@ -864,8 +891,10 @@ union un_pmc {
|
||||
#define INTAD_vect (0x34)
|
||||
#define INTRTC_vect (0x36)
|
||||
#define INTIT_vect (0x38)
|
||||
#define INTKR_vect (0x3A)
|
||||
#define INTUSB_vect (0x3C)
|
||||
#define INTRSUM_vect (0x3E)
|
||||
#define INTP6_vect (0x4A)
|
||||
#define INTP8_vect (0x4E)
|
||||
#define INTP9_vect (0x50)
|
||||
#define INTMD_vect (0x5E)
|
||||
+23
-17
@@ -1,18 +1,18 @@
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RTOSDemo */
|
||||
/* FILE : iodefine_ext.h */
|
||||
/* DESCRIPTION : Definition of Extended SFRs */
|
||||
/* CPU SERIES : RL78 - G1C */
|
||||
/* CPU TYPE : R5F10JBC */
|
||||
/* */
|
||||
/* This file is generated by e2studio. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* PROJECT NAME : RL78G1C */
|
||||
/* FILE : iodefine_ext.h */
|
||||
/* DESCRIPTION : Definition of Extended SFRs */
|
||||
/* CPU SERIES : RL78 - G1C */
|
||||
/* CPU TYPE : R5F10JGC */
|
||||
/* */
|
||||
/* This file is generated by e2studio. */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Header file generated from device file: */
|
||||
/* DR5F10JBC.DVF */
|
||||
/* DR5F10JGC.DVF */
|
||||
/* Copyright(C) 2012 Renesas */
|
||||
/* File Version V1.00 */
|
||||
/* Tool Version 1.9.7121 */
|
||||
@@ -95,6 +95,10 @@ union un_pu12 {
|
||||
unsigned char pu12;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pu14 {
|
||||
unsigned char pu14;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pim0 {
|
||||
unsigned char pim0;
|
||||
__BITS8 BIT;
|
||||
@@ -119,8 +123,8 @@ union un_pom5 {
|
||||
unsigned char pom5;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc0 {
|
||||
unsigned char pmc0;
|
||||
union un_pom7 {
|
||||
unsigned char pom7;
|
||||
__BITS8 BIT;
|
||||
};
|
||||
union un_pmc12 {
|
||||
@@ -246,6 +250,8 @@ union un_crc0ctl {
|
||||
#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT
|
||||
#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12
|
||||
#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT
|
||||
#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14
|
||||
#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT
|
||||
#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0
|
||||
#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT
|
||||
#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3
|
||||
@@ -258,8 +264,8 @@ union un_crc0ctl {
|
||||
#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT
|
||||
#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5
|
||||
#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT
|
||||
#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0
|
||||
#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT
|
||||
#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7
|
||||
#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT
|
||||
#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12
|
||||
#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT
|
||||
#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -103,7 +103,7 @@
|
||||
|
||||
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
|
||||
or 0 to run the more comprehensive test and demo application. */
|
||||
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
|
||||
#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
@@ -119,9 +119,7 @@
|
||||
#include "semphr.h"
|
||||
|
||||
/* Eval board specific definitions. */
|
||||
#include "port_iodefine.h"
|
||||
#include "port_iodefine_ext.h"
|
||||
#include "LED.h"
|
||||
#include "demo_specific_io.h"
|
||||
|
||||
/* Priorities at which the tasks are created. */
|
||||
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
|
||||
@@ -137,9 +137,7 @@
|
||||
#include "blocktim.h"
|
||||
|
||||
/* Hardware includes. */
|
||||
#include "port_iodefine.h"
|
||||
#include "port_iodefine_ext.h"
|
||||
#include "LED.h"
|
||||
#include "demo_specific_io.h"
|
||||
|
||||
/* The period at which the check timer will expire, in ms, provided no errors
|
||||
have been reported by any of the standard demo tasks. ms are converted to the
|
||||
|
||||
@@ -10,8 +10,6 @@
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
|
||||
|
||||
/*reset_program.asm*/
|
||||
|
||||
.list
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user