diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/.RL78_G1A_TBlinker b/FreeRTOS/Demo/RL78_E2Studio_GCC/.RL78_G1A_TBlinker
new file mode 100644
index 0000000000..9d33098d76
--- /dev/null
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/.RL78_G1A_TBlinker
@@ -0,0 +1,100 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/.RSKRL78L13linker b/FreeRTOS/Demo/RL78_E2Studio_GCC/.RSKRL78L13linker
new file mode 100644
index 0000000000..851e32c887
--- /dev/null
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/.RSKRL78L13linker
@@ -0,0 +1,100 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/.cproject b/FreeRTOS/Demo/RL78_E2Studio_GCC/.cproject
index cfbb8dc454..6b2ab84d40 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/.cproject
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/.cproject
@@ -274,6 +274,7 @@
+
@@ -415,6 +416,419 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/.settings/Project_Generation_Prefrences.prefs b/FreeRTOS/Demo/RL78_E2Studio_GCC/.settings/Project_Generation_Prefrences.prefs
index d51f1b1409..2bfa4497be 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/.settings/Project_Generation_Prefrences.prefs
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/.settings/Project_Generation_Prefrences.prefs
@@ -1,4 +1,4 @@
-#Wed Mar 06 15:45:34 GMT 2013
+#Tue Mar 19 10:26:50 GMT 2013
Library\ Generator\ Command=rl78-elf-libgen
com.renesas.cdt.core.Assembler.option.includeFileDirectories="${workspace_loc\:/${ProjName}}\\src";
com.renesas.cdt.core.Compiler.option.includeFileDir.1067754383="${TCINSTALL}\\rl78-elf\\optlibinc";
@@ -15,6 +15,7 @@ com.renesas.cdt.rl78.HardwareDebug.Compiler.option.cpuType.1364542281=RL78 - G1C
com.renesas.cdt.rl78.HardwareDebug.Compiler.option.mmul=None
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveLibraryFiles=${ProjName};gcc;
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.1960648199="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
+com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.8586332="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.970009502="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
com.renesas.cdt.rl78.HardwareDebug.Linker.option.archiveSearchDirectories.984802356="${CONFIGDIR}";"${TCINSTALL}\\lib\\gcc\\rl78-elf\\\\${GCC_VERSION}";
eclipse.preferences.version=1
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOSConfig.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOSConfig.h
index 79752de04b..f6dd0b0b4f 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOSConfig.h
@@ -87,16 +87,19 @@
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
+/* Include hardware dependent header files to allow this demo to run on
+multiple evaluation boards. */
+#include "demo_specific_io.h"
+
#define configUSE_PREEMPTION 1
#define configTICK_RATE_HZ ( ( unsigned short ) 1000 )
-#define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* Using the internal high speed clock */
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 90 )
#define configMAX_TASK_NAME_LEN ( 10 )
#define configUSE_TRACE_FACILITY 0
#define configUSE_16_BIT_TICKS 1
#define configIDLE_SHOULD_YIELD 1
-#define configTOTAL_HEAP_SIZE ( (size_t ) ( 5000 ) )
+#define configTOTAL_HEAP_SIZE ( (size_t ) ( 3420 ) )
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_MUTEXES 1
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port.c
index 2d87b9aaf9..fcfccd9e67 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port.c
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port.c
@@ -76,10 +76,6 @@
#include "FreeRTOS.h"
#include "task.h"
-/* Hardware includes. */
-#include "port_iodefine.h"
-#include "port_iodefine_ext.h"
-
/* The critical nesting value is initialised to a non zero value to ensure
interrupts don't accidentally become enabled before the scheduler is started. */
#define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 )
@@ -95,8 +91,7 @@ interrupts don't accidentally become enabled before the scheduler is started. */
* |--------------------- Zero Flag set
* ---------------------- Global Interrupt Flag set (enabled)
*/
-//#define portPSW ( 0xc6UL )
-#define portPSW ( 0x86UL )
+#define portPSW ( 0xc6UL )
/* The address of the pxCurrentTCB variable, but don't know or need to know its
type. */
@@ -118,7 +113,7 @@ volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;
/*
* Sets up the periodic ISR used for the RTOS tick.
*/
-static void prvSetupTimerInterrupt( void );
+__attribute__((weak)) void vApplicationSetupTimerInterrupt( void );
/*
* Starts the scheduler by loading the context of the first task to run.
@@ -193,7 +188,7 @@ portBASE_TYPE xPortStartScheduler( void )
{
/* Setup the hardware to generate the tick. Interrupts are disabled when
this function is called. */
- prvSetupTimerInterrupt();
+ vApplicationSetupTimerInterrupt();
/* Restore the context of the first task that is going to run. */
vPortStartFirstTask();
@@ -209,7 +204,7 @@ void vPortEndScheduler( void )
}
/*-----------------------------------------------------------*/
-static void prvSetupTimerInterrupt( void )
+__attribute__((weak)) void vApplicationSetupTimerInterrupt( void )
{
const unsigned short usClockHz = 15000UL; /* Internal clock. */
const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;
@@ -217,28 +212,49 @@ const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL;
/* Use the internal 15K clock. */
OSMC = ( unsigned char ) 0x16;
- /* Supply the RTC clock. */
- RTCEN = ( unsigned char ) 1U;
+ #ifdef RTCEN
+ {
+ /* Supply the interval timer clock. */
+ RTCEN = ( unsigned char ) 1U;
- /* Disable ITMC operation. */
- ITMC = ( unsigned char ) 0x0000;
+ /* Disable INTIT interrupt. */
+ ITMK = ( unsigned char ) 1;
- /* Disable INTIT interrupt. */
- ITMK = ( unsigned char ) 1;
+ /* Disable ITMC operation. */
+ ITMC = ( unsigned char ) 0x0000;
- /* Set INTIT high priority */
- ITPR1 = ( unsigned char ) 1;
- ITPR0 = ( unsigned char ) 1;
+ /* Clear INIT interrupt. */
+ ITIF = ( unsigned char ) 0;
- /* Clear INIT interrupt. */
- ITIF = ( unsigned char ) 0;
+ /* Set interval and enable interrupt operation. */
+ ITMC = usCompareMatch | 0x8000U;
- /* Set interval and enable interrupt operation. */
- ITMC = usCompareMatch | 0x8000U;
+ /* Enable INTIT interrupt. */
+ ITMK = ( unsigned char ) 0;
+ }
+ #endif
- /* Enable INTIT interrupt. */
- ITMK = ( unsigned char ) 0;
+ #ifdef TMKAEN
+ {
+ /* Supply the interval timer clock. */
+ TMKAEN = ( unsigned char ) 1U;
+
+ /* Disable INTIT interrupt. */
+ TMKAMK = ( unsigned char ) 1;
+
+ /* Disable ITMC operation. */
+ ITMC = ( unsigned char ) 0x0000;
+
+ /* Clear INIT interrupt. */
+ TMKAIF = ( unsigned char ) 0;
+
+ /* Set interval and enable interrupt operation. */
+ ITMC = usCompareMatch | 0x8000U;
+
+ /* Enable INTIT interrupt. */
+ TMKAMK = ( unsigned char ) 0;
+ }
+ #endif
}
/*-----------------------------------------------------------*/
-
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/portasm.S b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/portasm.S
index 4e3ab0cc1a..6edfebad11 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/portasm.S
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/portasm.S
@@ -72,6 +72,9 @@
mission critical applications that require provable dependability.
*/
+/* INCLUDED_FROM_FREERTOS_ASM_FILE is defined before FreeRTOSConfig.h so non
+assembly compatible definitions within the header file can be omitted. */
+#define INCLUDED_FROM_FREERTOS_ASM_FILE
#include "FreeRTOSConfig.h"
#include "ISR_Support.h"
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/LED.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/demo_specific_io.h
similarity index 74%
rename from FreeRTOS/Demo/RL78_E2Studio_GCC/src/LED.h
rename to FreeRTOS/Demo/RL78_E2Studio_GCC/src/demo_specific_io.h
index 57f8664221..12c6dff9cb 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/LED.h
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/demo_specific_io.h
@@ -72,31 +72,51 @@
mission critical applications that require provable dependability.
*/
-/*
- * Board specific macros to initialise and toggle an LED.
- */
-
#ifndef LED_IO_H
#define LED_IO_H
- #ifdef YRPBRL78G13
- #define LED_BIT ( P7_bit.no7 )
- #define LED_INIT() P7 &= 0x7F; PM7 &= 0x7F
- #endif /* YRPBRL78G13 */
+/* Include the register definition file that is correct for the hardware being
+used. The C and assembler pre-processor must have one of the following board
+definitions defined to have the correct register definition header file
+included. Alternatively, just manually include the correct files here. */
- #ifdef YRDKRL78G14
- #define LED_BIT ( P4_bit.no1 )
- #define LED_INIT() PM4_bit.no1 = 0
- #endif /* YRDKRL78G14 */
+ /* Prevent the files being included from the FreeRTOS port layer assembly
+ source files. */
+ #ifndef INCLUDED_FROM_FREERTOS_ASM_FILE
- #ifdef RSKRL78G1C
- #define LED_BIT ( P0_bit.no1 )
- #define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD
- #endif /* RSKRL78G1C */
+ #ifdef YRDKRL78G14
+ #include "iodefine_RL78G14.h"
+ #include "iodefine_RL78G14_ext.h"
+ #define LED_BIT ( P4_bit.no1 )
+ #define LED_INIT() LED_BIT = 0
+ #endif /* YRDKRL78G14 */
- #ifndef LED_BIT
- #error The hardware platform is not defined
- #endif
+ #ifdef RSKRL78G1C
+ #include "iodefine_RL78G1C.h"
+ #include "iodefine_RL78G1C_ext.h"
+ #define LED_BIT ( P0_bit.no1 )
+ #define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD
+ #endif /* RSKRL78G1C */
+
+ #ifdef RSKRL78L13
+ #include "iodefine_RL78L13.h"
+ #include "iodefine_RL78L13_ext.h"
+ #define LED_BIT ( P4_bit.no1 )
+ #define LED_INIT() P4 &= 0xFD; PM4 &= 0xFD
+ #endif /* RSKRL78L13 */
+
+ #ifdef RL78_G1A_TB
+ #include "iodefine_RL78G1A.h"
+ #include "iodefine_RL78G1A_ext.h"
+ #define LED_BIT ( P6_bit.no2 )
+ #define LED_INIT() P6 &= 0xFB; PM6 &= 0xFB
+ #endif /* RL78_G1A_TB */
+
+ #ifndef LED_BIT
+ #error The hardware platform is not defined
+ #endif
+
+ #endif /* INCLUDED_FROM_FREERTOS_ASM_FILE */
#endif /* LED_IO_H */
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/hardware_setup.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/hardware_setup.c
index 05fee28d51..061df9c76f 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/hardware_setup.c
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/hardware_setup.c
@@ -13,10 +13,6 @@
/* Scheduler include files. */
#include "FreeRTOS.h"
-/* Hardware includes. */
-#include "port_iodefine.h"
-#include "LED.h"
-
void HardwareSetup( void )
{
portDISABLE_INTERRUPTS();
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/interrupt_handlers.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/interrupt_handlers.c
deleted file mode 100644
index 59bc209a43..0000000000
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/interrupt_handlers.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : interrupt_handlers.c */
-/* DESCRIPTION : Interrupt Handler */
-/* CPU SERIES : RL78 - G14 */
-/* CPU TYPE : R5F104PJ */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/
-
-#include "interrupt_handlers.h"
-
-/*
- * INT_SRO/INT_WDTI (0x4)
- */
-void INT_WDTI (void) { }
-//void INT_SRO (void) { }
-
-/*
- * INT_LVI (0x6)
- */
-void INT_LVI (void) { }
-
-/*
- * INT_P0 (0x8)
- */
-void INT_P0 (void) { }
-
-/*
- * INT_P1 (0xA)
- */
-void INT_P1 (void) { }
-
-/*
- * INT_P2 (0xC)
- */
-void INT_P2 (void) { }
-
-/*
- * INT_P3 (0xE)
- */
-void INT_P3 (void) { }
-
-/*
- * INT_P4 (0x10)
- */
-void INT_P4 (void) { }
-
-/*
- * INT_P5 (0x12)
- */
-void INT_P5 (void) { }
-
-/*
- * INT_CSI20/INT_IIC20/INT_ST2 (0x14)
- */
-void INT_ST2 (void) { }
-//void INT_CSI20 (void) { }
-//void INT_IIC20 (void) { }
-
-/*
- * INT_CSI21/INT_IIC21/INT_SR2 (0x16)
- */
-void INT_SR2 (void) { }
-//void INT_CSI21 (void) { }
-//void INT_IIC21 (void) { }
-
-/*
- * INT_SRE2/INT_TM11H (0x18)
- */
-void INT_TM11H (void) { }
-//void INT_SRE2 (void) { }
-
-/*
- * INT_CSI00/INT_IIC00/INT_ST0 (0x1E)
- */
-void INT_ST0 (void) { }
-//void INT_CSI00 (void) { }
-//void INT_IIC00 (void) { }
-
-/*
- * INT_CSI01/INT_IIC01/INT_SR0 (0x20)
- */
-void INT_SR0 (void) { }
-//void INT_CSI01 (void) { }
-//void INT_IIC01 (void) { }
-
-/*
- * INT_SRE0/INT_TM01H (0x22)
- */
-void INT_TM01H (void) { }
-//void INT_SRE0 (void) { }
-
-/*
- * INT_CSI10/INT_IIC10/INT_ST1 (0x24)
- */
-void INT_ST1 (void) { }
-//void INT_CSI10 (void) { }
-//void INT_IIC10 (void) { }
-
-/*
- * INT_CSI11/INT_IIC11/INT_SR1 (0x26)
- */
-void INT_SR1 (void) { }
-//void INT_CSI11 (void) { }
-//void INT_IIC11 (void) { }
-
-/*
- * INT_SRE1/INT_TM03H (0x28)
- */
-void INT_TM03H (void) { }
-//void INT_SRE1 (void) { }
-
-/*
- * INT_IICA0 (0x2A)
- */
-void INT_IICA0 (void) { }
-
-/*
- * INT_TM00 (0x2C)
- */
-void INT_TM00 (void) { }
-
-/*
- * INT_TM01 (0x2E)
- */
-void INT_TM01 (void) { }
-
-/*
- * INT_TM02 (0x30)
- */
-void INT_TM02 (void) { }
-
-/*
- * INT_TM03 (0x32)
- */
-void INT_TM03 (void) { }
-
-/*
- * INT_AD (0x34)
- */
-void INT_AD (void) { }
-
-/*
- * INT_RTC (0x36)
- */
-void INT_RTC (void) { }
-
-/*
- * INT_IT (0x38)
- */
-void INT_IT (void) { }
-
-/*
- * INT_KR (0x3A)
- */
-void INT_KR (void) { }
-
-/*
- * INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
- */
-void INT_ST3 (void) { }
-//void INT_CSI30 (void) { }
-//void INT_IIC30 (void) { }
-
-/*
- * INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
- */
-void INT_SR3 (void) { }
-//void INT_CSI31 (void) { }
-//void INT_IIC31 (void) { }
-
-/*
- * INT_TRJ0 (0x40)
- */
-void INT_TRJ0 (void) { }
-
-/*
- * INT_TM10 (0x42)
- */
-void INT_TM10 (void) { }
-
-/*
- * INT_TM11 (0x44)
- */
-void INT_TM11 (void) { }
-
-/*
- * INT_TM12 (0x46)
- */
-void INT_TM12 (void) { }
-
-/*
- * INT_TM13 (0x48)
- */
-void INT_TM13 (void) { }
-
-/*
- * INT_P6 (0x4A)
- */
-void INT_P6 (void) { }
-
-/*
- * INT_P7 (0x4C)
- */
-void INT_P7 (void) { }
-
-/*
- * INT_P8 (0x4E)
- */
-void INT_P8 (void) { }
-
-/*
- * INT_P9 (0x50)
- */
-void INT_P9 (void) { }
-
-/*
- * INT_CMP0/INT_P10 (0x52)
- */
-void INT_P10 (void) { }
-//void INT_CMP0 (void) { }
-
-/*
- * INT_CMP1/INT_P11 (0x54)
- */
-void INT_P11 (void) { }
-//void INT_CMP1 (void) { }
-
-/*
- * INT_TRD0 (0x56)
- */
-void INT_TRD0 (void) { }
-
-/*
- * INT_TRD1 (0x58)
- */
-void INT_TRD1 (void) { }
-
-/*
- * INT_TRG (0x5A)
- */
-void INT_TRG (void) { }
-
-/*
- * INT_SRE3/INT_TM13H (0x5C)
- */
-void INT_TM13H (void) { }
-//void INT_SRE3 (void) { }
-
-/*
- * INT_IICA1 (0x60)
- */
-void INT_IICA1 (void) { }
-
-/*
- * INT_FL (0x62)
- */
-void INT_FL (void) { }
-
-/*
- * INT_BRK_I (0x7E)
- */
-void INT_BRK_I (void) { }
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/interrupt_handlers.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/interrupt_handlers.h
deleted file mode 100644
index 542e8158f9..0000000000
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/interrupt_handlers.h
+++ /dev/null
@@ -1,272 +0,0 @@
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : interrupt_handlers.h */
-/* DESCRIPTION : Interrupt Handler Declarations */
-/* CPU SERIES : RL78 - G14 */
-/* CPU TYPE : R5F104PJ */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/
-
-#ifndef INTERRUPT_HANDLERS_H
-#define INTERRUPT_HANDLERS_H
-
-/*
- * INT_SRO/INT_WDTI (0x4)
- */
-void INT_WDTI(void) __attribute__ ((interrupt));
-//void INT_SRO(void) __attribute__ ((interrupt));
-
-/*
- * INT_LVI (0x6)
- */
-void INT_LVI(void) __attribute__ ((interrupt));
-
-/*
- * INT_P0 (0x8)
- */
-void INT_P0(void) __attribute__ ((interrupt));
-
-/*
- * INT_P1 (0xA)
- */
-void INT_P1(void) __attribute__ ((interrupt));
-
-/*
- * INT_P2 (0xC)
- */
-void INT_P2(void) __attribute__ ((interrupt));
-
-/*
- * INT_P3 (0xE)
- */
-void INT_P3(void) __attribute__ ((interrupt));
-
-/*
- * INT_P4 (0x10)
- */
-void INT_P4(void) __attribute__ ((interrupt));
-
-/*
- * INT_P5 (0x12)
- */
-void INT_P5(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI20/INT_IIC20/INT_ST2 (0x14)
- */
-void INT_ST2(void) __attribute__ ((interrupt));
-//void INT_CSI20(void) __attribute__ ((interrupt));
-//void INT_IIC20(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI21/INT_IIC21/INT_SR2 (0x16)
- */
-void INT_SR2(void) __attribute__ ((interrupt));
-//void INT_CSI21(void) __attribute__ ((interrupt));
-//void INT_IIC21(void) __attribute__ ((interrupt));
-
-/*
- * INT_SRE2/INT_TM11H (0x18)
- */
-void INT_TM11H(void) __attribute__ ((interrupt));
-//void INT_SRE2(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI00/INT_IIC00/INT_ST0 (0x1E)
- */
-void INT_ST0(void) __attribute__ ((interrupt));
-//void INT_CSI00(void) __attribute__ ((interrupt));
-//void INT_IIC00(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI01/INT_IIC01/INT_SR0 (0x20)
- */
-void INT_SR0(void) __attribute__ ((interrupt));
-//void INT_CSI01(void) __attribute__ ((interrupt));
-//void INT_IIC01(void) __attribute__ ((interrupt));
-
-/*
- * INT_SRE0/INT_TM01H (0x22)
- */
-void INT_TM01H(void) __attribute__ ((interrupt));
-//void INT_SRE0(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI10/INT_IIC10/INT_ST1 (0x24)
- */
-void INT_ST1(void) __attribute__ ((interrupt));
-//void INT_CSI10(void) __attribute__ ((interrupt));
-//void INT_IIC10(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI11/INT_IIC11/INT_SR1 (0x26)
- */
-void INT_SR1(void) __attribute__ ((interrupt));
-//void INT_CSI11(void) __attribute__ ((interrupt));
-//void INT_IIC11(void) __attribute__ ((interrupt));
-
-/*
- * INT_SRE1/INT_TM03H (0x28)
- */
-void INT_TM03H(void) __attribute__ ((interrupt));
-//void INT_SRE1(void) __attribute__ ((interrupt));
-
-/*
- * INT_IICA0 (0x2A)
- */
-void INT_IICA0(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM00 (0x2C)
- */
-void INT_TM00(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM01 (0x2E)
- */
-void INT_TM01(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM02 (0x30)
- */
-void INT_TM02(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM03 (0x32)
- */
-void INT_TM03(void) __attribute__ ((interrupt));
-
-/*
- * INT_AD (0x34)
- */
-void INT_AD(void) __attribute__ ((interrupt));
-
-/*
- * INT_RTC (0x36)
- */
-void INT_RTC(void) __attribute__ ((interrupt));
-
-/*
- * INT_IT (0x38)
- */
-void INT_IT(void) __attribute__ ((interrupt));
-
-/*
- * INT_KR (0x3A)
- */
-void INT_KR(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
- */
-void INT_ST3(void) __attribute__ ((interrupt));
-//void INT_CSI30(void) __attribute__ ((interrupt));
-//void INT_IIC30(void) __attribute__ ((interrupt));
-
-/*
- * INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
- */
-void INT_SR3(void) __attribute__ ((interrupt));
-//void INT_CSI31(void) __attribute__ ((interrupt));
-//void INT_IIC31(void) __attribute__ ((interrupt));
-
-/*
- * INT_TRJ0 (0x40)
- */
-void INT_TRJ0(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM10 (0x42)
- */
-void INT_TM10(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM11 (0x44)
- */
-void INT_TM11(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM12 (0x46)
- */
-void INT_TM12(void) __attribute__ ((interrupt));
-
-/*
- * INT_TM13 (0x48)
- */
-void INT_TM13(void) __attribute__ ((interrupt));
-
-/*
- * INT_P6 (0x4A)
- */
-void INT_P6(void) __attribute__ ((interrupt));
-
-/*
- * INT_P7 (0x4C)
- */
-void INT_P7(void) __attribute__ ((interrupt));
-
-/*
- * INT_P8 (0x4E)
- */
-void INT_P8(void) __attribute__ ((interrupt));
-
-/*
- * INT_P9 (0x50)
- */
-void INT_P9(void) __attribute__ ((interrupt));
-
-/*
- * INT_CMP0/INT_P10 (0x52)
- */
-void INT_P10(void) __attribute__ ((interrupt));
-//void INT_CMP0(void) __attribute__ ((interrupt));
-
-/*
- * INT_CMP1/INT_P11 (0x54)
- */
-void INT_P11(void) __attribute__ ((interrupt));
-//void INT_CMP1(void) __attribute__ ((interrupt));
-
-/*
- * INT_TRD0 (0x56)
- */
-void INT_TRD0(void) __attribute__ ((interrupt));
-
-/*
- * INT_TRD1 (0x58)
- */
-void INT_TRD1(void) __attribute__ ((interrupt));
-
-/*
- * INT_TRG (0x5A)
- */
-void INT_TRG(void) __attribute__ ((interrupt));
-
-/*
- * INT_SRE3/INT_TM13H (0x5C)
- */
-void INT_TM13H(void) __attribute__ ((interrupt));
-//void INT_SRE3(void) __attribute__ ((interrupt));
-
-/*
- * INT_IICA1 (0x60)
- */
-void INT_IICA1(void) __attribute__ ((interrupt));
-
-/*
- * INT_FL (0x62)
- */
-void INT_FL(void) __attribute__ ((interrupt));
-
-/*
- * INT_BRK_I (0x7E)
- */
-void INT_BRK_I(void) __attribute__ ((interrupt));
-
-//Hardware Vectors
-//PowerON_Reset (0x0)
-void PowerON_Reset(void) __attribute__ ((interrupt));
-#endif
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G14.h
similarity index 96%
rename from FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine.h
rename to FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G14.h
index a26684b714..bfa227a6d9 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine.h
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G14.h
@@ -1,6 +1,6 @@
/***********************************************************************/
/* */
-/* PROJECT NAME : RTOSDemo */
+/* PROJECT NAME : RL78G14 */
/* FILE : iodefine.h */
/* DESCRIPTION : Definition of I/O Registers */
/* CPU SERIES : RL78 - G14 */
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_ext.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G14_ext.h
similarity index 97%
rename from FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_ext.h
rename to FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G14_ext.h
index d55c543ab5..892692056b 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_ext.h
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G14_ext.h
@@ -1,6 +1,6 @@
/***********************************************************************/
/* */
-/* PROJECT NAME : RTOSDemo */
+/* PROJECT NAME : RL78G14 */
/* FILE : iodefine_ext.h */
/* DESCRIPTION : Definition of Extended SFRs */
/* CPU SERIES : RL78 - G14 */
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1A.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1A.h
new file mode 100644
index 0000000000..341081ea31
--- /dev/null
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1A.h
@@ -0,0 +1,1037 @@
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1A */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - G1A */
+/* CPU TYPE : R5F10ELE */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/
+
+/************************************************************************/
+/* Header file generated from device file: */
+/* DR5F10ELE.DVF */
+/* Copyright(C) 2012 Renesas */
+/* File Version V1.00 */
+/* Tool Version 1.9.7121 */
+/* Date Generated 13/11/2012 */
+/************************************************************************/
+
+#ifndef __IOREG_BIT_STRUCTURES
+#define __IOREG_BIT_STRUCTURES
+typedef struct {
+ unsigned char no0 :1;
+ unsigned char no1 :1;
+ unsigned char no2 :1;
+ unsigned char no3 :1;
+ unsigned char no4 :1;
+ unsigned char no5 :1;
+ unsigned char no6 :1;
+ unsigned char no7 :1;
+} __BITS8;
+
+typedef struct {
+ unsigned short no0 :1;
+ unsigned short no1 :1;
+ unsigned short no2 :1;
+ unsigned short no3 :1;
+ unsigned short no4 :1;
+ unsigned short no5 :1;
+ unsigned short no6 :1;
+ unsigned short no7 :1;
+ unsigned short no8 :1;
+ unsigned short no9 :1;
+ unsigned short no10 :1;
+ unsigned short no11 :1;
+ unsigned short no12 :1;
+ unsigned short no13 :1;
+ unsigned short no14 :1;
+ unsigned short no15 :1;
+} __BITS16;
+
+#endif
+
+#ifndef IODEFINE_H
+#define IODEFINE_H
+
+/*
+ IO Registers
+ */
+union un_p0 {
+ unsigned char p0;
+ __BITS8 BIT;
+};
+union un_p1 {
+ unsigned char p1;
+ __BITS8 BIT;
+};
+union un_p2 {
+ unsigned char p2;
+ __BITS8 BIT;
+};
+union un_p3 {
+ unsigned char p3;
+ __BITS8 BIT;
+};
+union un_p4 {
+ unsigned char p4;
+ __BITS8 BIT;
+};
+union un_p5 {
+ unsigned char p5;
+ __BITS8 BIT;
+};
+union un_p6 {
+ unsigned char p6;
+ __BITS8 BIT;
+};
+union un_p7 {
+ unsigned char p7;
+ __BITS8 BIT;
+};
+union un_p12 {
+ unsigned char p12;
+ __BITS8 BIT;
+};
+union un_p13 {
+ unsigned char p13;
+ __BITS8 BIT;
+};
+union un_p14 {
+ unsigned char p14;
+ __BITS8 BIT;
+};
+union un_p15 {
+ unsigned char p15;
+ __BITS8 BIT;
+};
+union un_pm0 {
+ unsigned char pm0;
+ __BITS8 BIT;
+};
+union un_pm1 {
+ unsigned char pm1;
+ __BITS8 BIT;
+};
+union un_pm2 {
+ unsigned char pm2;
+ __BITS8 BIT;
+};
+union un_pm3 {
+ unsigned char pm3;
+ __BITS8 BIT;
+};
+union un_pm4 {
+ unsigned char pm4;
+ __BITS8 BIT;
+};
+union un_pm5 {
+ unsigned char pm5;
+ __BITS8 BIT;
+};
+union un_pm6 {
+ unsigned char pm6;
+ __BITS8 BIT;
+};
+union un_pm7 {
+ unsigned char pm7;
+ __BITS8 BIT;
+};
+union un_pm12 {
+ unsigned char pm12;
+ __BITS8 BIT;
+};
+union un_pm14 {
+ unsigned char pm14;
+ __BITS8 BIT;
+};
+union un_pm15 {
+ unsigned char pm15;
+ __BITS8 BIT;
+};
+union un_adm0 {
+ unsigned char adm0;
+ __BITS8 BIT;
+};
+union un_ads {
+ unsigned char ads;
+ __BITS8 BIT;
+};
+union un_adm1 {
+ unsigned char adm1;
+ __BITS8 BIT;
+};
+union un_krctl {
+ unsigned char krctl;
+ __BITS8 BIT;
+};
+union un_krf {
+ unsigned char krf;
+ __BITS8 BIT;
+};
+union un_krm1 {
+ unsigned char krm1;
+ __BITS8 BIT;
+};
+union un_krm0 {
+ unsigned char krm0;
+ __BITS8 BIT;
+};
+union un_egp0 {
+ unsigned char egp0;
+ __BITS8 BIT;
+};
+union un_egn0 {
+ unsigned char egn0;
+ __BITS8 BIT;
+};
+union un_egp1 {
+ unsigned char egp1;
+ __BITS8 BIT;
+};
+union un_egn1 {
+ unsigned char egn1;
+ __BITS8 BIT;
+};
+union un_iics0 {
+ unsigned char iics0;
+ __BITS8 BIT;
+};
+union un_iicf0 {
+ unsigned char iicf0;
+ __BITS8 BIT;
+};
+union un_flars {
+ unsigned char flars;
+ __BITS8 BIT;
+};
+union un_fssq {
+ unsigned char fssq;
+ __BITS8 BIT;
+};
+union un_flrst {
+ unsigned char flrst;
+ __BITS8 BIT;
+};
+union un_fsastl {
+ unsigned char fsastl;
+ __BITS8 BIT;
+};
+union un_fsasth {
+ unsigned char fsasth;
+ __BITS8 BIT;
+};
+union un_rtcc0 {
+ unsigned char rtcc0;
+ __BITS8 BIT;
+};
+union un_rtcc1 {
+ unsigned char rtcc1;
+ __BITS8 BIT;
+};
+union un_csc {
+ unsigned char csc;
+ __BITS8 BIT;
+};
+union un_ostc {
+ unsigned char ostc;
+ __BITS8 BIT;
+};
+union un_ckc {
+ unsigned char ckc;
+ __BITS8 BIT;
+};
+union un_cks0 {
+ unsigned char cks0;
+ __BITS8 BIT;
+};
+union un_cks1 {
+ unsigned char cks1;
+ __BITS8 BIT;
+};
+union un_lvim {
+ unsigned char lvim;
+ __BITS8 BIT;
+};
+union un_lvis {
+ unsigned char lvis;
+ __BITS8 BIT;
+};
+union un_monsta0 {
+ unsigned char monsta0;
+ __BITS8 BIT;
+};
+union un_asim {
+ unsigned char asim;
+ __BITS8 BIT;
+};
+union un_dmc0 {
+ unsigned char dmc0;
+ __BITS8 BIT;
+};
+union un_dmc1 {
+ unsigned char dmc1;
+ __BITS8 BIT;
+};
+union un_drc0 {
+ unsigned char drc0;
+ __BITS8 BIT;
+};
+union un_drc1 {
+ unsigned char drc1;
+ __BITS8 BIT;
+};
+union un_if2 {
+ unsigned short if2;
+ __BITS16 BIT;
+};
+union un_if2l {
+ unsigned char if2l;
+ __BITS8 BIT;
+};
+union un_if2h {
+ unsigned char if2h;
+ __BITS8 BIT;
+};
+union un_mk2 {
+ unsigned short mk2;
+ __BITS16 BIT;
+};
+union un_mk2l {
+ unsigned char mk2l;
+ __BITS8 BIT;
+};
+union un_mk2h {
+ unsigned char mk2h;
+ __BITS8 BIT;
+};
+union un_pr02 {
+ unsigned short pr02;
+ __BITS16 BIT;
+};
+union un_pr02l {
+ unsigned char pr02l;
+ __BITS8 BIT;
+};
+union un_pr02h {
+ unsigned char pr02h;
+ __BITS8 BIT;
+};
+union un_pr12 {
+ unsigned short pr12;
+ __BITS16 BIT;
+};
+union un_pr12l {
+ unsigned char pr12l;
+ __BITS8 BIT;
+};
+union un_pr12h {
+ unsigned char pr12h;
+ __BITS8 BIT;
+};
+union un_if0 {
+ unsigned short if0;
+ __BITS16 BIT;
+};
+union un_if0l {
+ unsigned char if0l;
+ __BITS8 BIT;
+};
+union un_if0h {
+ unsigned char if0h;
+ __BITS8 BIT;
+};
+union un_if1 {
+ unsigned short if1;
+ __BITS16 BIT;
+};
+union un_if1l {
+ unsigned char if1l;
+ __BITS8 BIT;
+};
+union un_if1h {
+ unsigned char if1h;
+ __BITS8 BIT;
+};
+union un_mk0 {
+ unsigned short mk0;
+ __BITS16 BIT;
+};
+union un_mk0l {
+ unsigned char mk0l;
+ __BITS8 BIT;
+};
+union un_mk0h {
+ unsigned char mk0h;
+ __BITS8 BIT;
+};
+union un_mk1 {
+ unsigned short mk1;
+ __BITS16 BIT;
+};
+union un_mk1l {
+ unsigned char mk1l;
+ __BITS8 BIT;
+};
+union un_mk1h {
+ unsigned char mk1h;
+ __BITS8 BIT;
+};
+union un_pr00 {
+ unsigned short pr00;
+ __BITS16 BIT;
+};
+union un_pr00l {
+ unsigned char pr00l;
+ __BITS8 BIT;
+};
+union un_pr00h {
+ unsigned char pr00h;
+ __BITS8 BIT;
+};
+union un_pr01 {
+ unsigned short pr01;
+ __BITS16 BIT;
+};
+union un_pr01l {
+ unsigned char pr01l;
+ __BITS8 BIT;
+};
+union un_pr01h {
+ unsigned char pr01h;
+ __BITS8 BIT;
+};
+union un_pr10 {
+ unsigned short pr10;
+ __BITS16 BIT;
+};
+union un_pr10l {
+ unsigned char pr10l;
+ __BITS8 BIT;
+};
+union un_pr10h {
+ unsigned char pr10h;
+ __BITS8 BIT;
+};
+union un_pr11 {
+ unsigned short pr11;
+ __BITS16 BIT;
+};
+union un_pr11l {
+ unsigned char pr11l;
+ __BITS8 BIT;
+};
+union un_pr11h {
+ unsigned char pr11h;
+ __BITS8 BIT;
+};
+union un_pmc {
+ unsigned char pmc;
+ __BITS8 BIT;
+};
+
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
+#define P14 (*(volatile union un_p14 *)0xFFF0E).p14
+#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT
+#define P15 (*(volatile union un_p15 *)0xFFF0F).p15
+#define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT
+#define SDR00 (*(volatile unsigned short *)0xFFF10)
+#define SIO00 (*(volatile unsigned char *)0xFFF10)
+#define TXD0 (*(volatile unsigned char *)0xFFF10)
+#define SDR01 (*(volatile unsigned short *)0xFFF12)
+#define RXD0 (*(volatile unsigned char *)0xFFF12)
+#define SIO01 (*(volatile unsigned char *)0xFFF12)
+#define TDR00 (*(volatile unsigned short *)0xFFF18)
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)
+#define ADCR (*(volatile unsigned short *)0xFFF1E)
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
+#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14
+#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT
+#define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15
+#define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
+#define ADS (*(volatile union un_ads *)0xFFF31).ads
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
+#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl
+#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT
+#define KRF (*(volatile union un_krf *)0xFFF35).krf
+#define KRF_bit (*(volatile union un_krf *)0xFFF35).BIT
+#define KRM1 (*(volatile union un_krm1 *)0xFFF36).krm1
+#define KRM1_bit (*(volatile union un_krm1 *)0xFFF36).BIT
+#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0
+#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT
+#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1
+#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT
+#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1
+#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT
+#define SDR02 (*(volatile unsigned short *)0xFFF44)
+#define SIO10 (*(volatile unsigned char *)0xFFF44)
+#define TXD1 (*(volatile unsigned char *)0xFFF44)
+#define SDR03 (*(volatile unsigned short *)0xFFF46)
+#define RXD1 (*(volatile unsigned char *)0xFFF46)
+#define SIO11 (*(volatile unsigned char *)0xFFF46)
+#define SDR10 (*(volatile unsigned short *)0xFFF48)
+#define SIO20 (*(volatile unsigned char *)0xFFF48)
+#define TXD2 (*(volatile unsigned char *)0xFFF48)
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)
+#define SIO21 (*(volatile unsigned char *)0xFFF4A)
+#define IICA0 (*(volatile unsigned char *)0xFFF50)
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
+#define TDR02 (*(volatile unsigned short *)0xFFF64)
+#define TDR03 (*(volatile unsigned short *)0xFFF66)
+#define TDR03L (*(volatile unsigned char *)0xFFF66)
+#define TDR03H (*(volatile unsigned char *)0xFFF67)
+#define TDR04 (*(volatile unsigned short *)0xFFF68)
+#define TDR05 (*(volatile unsigned short *)0xFFF6A)
+#define TDR06 (*(volatile unsigned short *)0xFFF6C)
+#define TDR07 (*(volatile unsigned short *)0xFFF6E)
+#define FLPMC (*(volatile unsigned char *)0xFFF80)
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT
+#define FLAPL (*(volatile unsigned short *)0xFFF82)
+#define FLAPH (*(volatile unsigned char *)0xFFF84)
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT
+#define FLWL (*(volatile unsigned short *)0xFFF8C)
+#define FLWH (*(volatile unsigned short *)0xFFF8E)
+#define ITMC (*(volatile unsigned short *)0xFFF90)
+#define SEC (*(volatile unsigned char *)0xFFF92)
+#define MIN (*(volatile unsigned char *)0xFFF93)
+#define HOUR (*(volatile unsigned char *)0xFFF94)
+#define WEEK (*(volatile unsigned char *)0xFFF95)
+#define DAY (*(volatile unsigned char *)0xFFF96)
+#define MONTH (*(volatile unsigned char *)0xFFF97)
+#define YEAR (*(volatile unsigned char *)0xFFF98)
+#define SUBCUD (*(volatile unsigned char *)0xFFF99)
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT
+#define CMC (*(volatile unsigned char *)0xFFFA0)
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT
+#define OSTS (*(volatile unsigned char *)0xFFFA3)
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT
+#define RESF (*(volatile unsigned char *)0xFFFA8)
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT
+#define WDTE (*(volatile unsigned char *)0xFFFAB)
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)
+#define RXB (*(volatile unsigned char *)0xFFFAD)
+#define TXS (*(volatile unsigned char *)0xFFFAD)
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT
+#define MDAL (*(volatile unsigned short *)0xFFFF0)
+#define MULA (*(volatile unsigned short *)0xFFFF0)
+#define MDAH (*(volatile unsigned short *)0xFFFF2)
+#define MULB (*(volatile unsigned short *)0xFFFF2)
+#define MDBH (*(volatile unsigned short *)0xFFFF4)
+#define MULOH (*(volatile unsigned short *)0xFFFF4)
+#define MDBL (*(volatile unsigned short *)0xFFFF6)
+#define MULOL (*(volatile unsigned short *)0xFFFF6)
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
+
+/*
+ Sfr bits
+ */
+#define ADCE ADM0_bit.no0
+#define ADCS ADM0_bit.no7
+#define SPD0 IICS0_bit.no0
+#define STD0 IICS0_bit.no1
+#define ACKD0 IICS0_bit.no2
+#define TRC0 IICS0_bit.no3
+#define COI0 IICS0_bit.no4
+#define EXC0 IICS0_bit.no5
+#define ALD0 IICS0_bit.no6
+#define MSTS0 IICS0_bit.no7
+#define IICRSV0 IICF0_bit.no0
+#define STCEN0 IICF0_bit.no1
+#define IICBSY0 IICF0_bit.no6
+#define STCF0 IICF0_bit.no7
+#define FSSTP FSSQ_bit.no6
+#define SQST FSSQ_bit.no7
+#define SQEND FSASTH_bit.no6
+#define ESQEND FSASTH_bit.no7
+#define RCLOE1 RTCC0_bit.no5
+#define RTCE RTCC0_bit.no7
+#define RWAIT RTCC1_bit.no0
+#define RWST RTCC1_bit.no1
+#define RIFG RTCC1_bit.no3
+#define WAFG RTCC1_bit.no4
+#define WALIE RTCC1_bit.no6
+#define WALE RTCC1_bit.no7
+#define HIOSTOP CSC_bit.no0
+#define XTSTOP CSC_bit.no6
+#define MSTOP CSC_bit.no7
+#define SDIV CKC_bit.no3
+#define MCM0 CKC_bit.no4
+#define MCS CKC_bit.no5
+#define CSS CKC_bit.no6
+#define CLS CKC_bit.no7
+#define PCLOE0 CKS0_bit.no7
+#define PCLOE1 CKS1_bit.no7
+#define LVIF LVIM_bit.no0
+#define LVIOMSK LVIM_bit.no1
+#define LVISEN LVIM_bit.no7
+#define LVILV LVIS_bit.no0
+#define LVIMD LVIS_bit.no7
+#define DWAIT0 DMC0_bit.no4
+#define DS0 DMC0_bit.no5
+#define DRS0 DMC0_bit.no6
+#define STG0 DMC0_bit.no7
+#define DWAIT1 DMC1_bit.no4
+#define DS1 DMC1_bit.no5
+#define DRS1 DMC1_bit.no6
+#define STG1 DMC1_bit.no7
+#define DST0 DRC0_bit.no0
+#define DEN0 DRC0_bit.no7
+#define DST1 DRC1_bit.no0
+#define DEN1 DRC1_bit.no7
+#define TMIF05 IF2_bit.no0
+#define TMIF06 IF2_bit.no1
+#define TMIF07 IF2_bit.no2
+#define PIF6 IF2_bit.no3
+#define PIF7 IF2_bit.no4
+#define PIF8 IF2_bit.no5
+#define PIF9 IF2_bit.no6
+#define PIF10 IF2_bit.no7
+#define PIF11 IF2H_bit.no0
+#define MDIF IF2H_bit.no5
+#define FLIF IF2H_bit.no7
+#define TMMK05 MK2_bit.no0
+#define TMMK06 MK2_bit.no1
+#define TMMK07 MK2_bit.no2
+#define PMK6 MK2_bit.no3
+#define PMK7 MK2_bit.no4
+#define PMK8 MK2_bit.no5
+#define PMK9 MK2_bit.no6
+#define PMK10 MK2_bit.no7
+#define PMK11 MK2H_bit.no0
+#define MDMK MK2H_bit.no5
+#define FLMK MK2H_bit.no7
+#define TMPR005 PR02_bit.no0
+#define TMPR006 PR02_bit.no1
+#define TMPR007 PR02_bit.no2
+#define PPR06 PR02_bit.no3
+#define PPR07 PR02_bit.no4
+#define PPR08 PR02_bit.no5
+#define PPR09 PR02_bit.no6
+#define PPR010 PR02_bit.no7
+#define PPR011 PR02H_bit.no0
+#define MDPR0 PR02H_bit.no5
+#define FLPR0 PR02H_bit.no7
+#define TMPR105 PR12_bit.no0
+#define TMPR106 PR12_bit.no1
+#define TMPR107 PR12_bit.no2
+#define PPR16 PR12_bit.no3
+#define PPR17 PR12_bit.no4
+#define PPR18 PR12_bit.no5
+#define PPR19 PR12_bit.no6
+#define PPR110 PR12_bit.no7
+#define PPR111 PR12H_bit.no0
+#define MDPR1 PR12H_bit.no5
+#define FLPR1 PR12H_bit.no7
+#define WDTIIF IF0_bit.no0
+#define LVIIF IF0_bit.no1
+#define PIF0 IF0_bit.no2
+#define PIF1 IF0_bit.no3
+#define PIF2 IF0_bit.no4
+#define PIF3 IF0_bit.no5
+#define PIF4 IF0_bit.no6
+#define PIF5 IF0_bit.no7
+#define CSIIF20 IF0H_bit.no0
+#define IICIF20 IF0H_bit.no0
+#define STIF2 IF0H_bit.no0
+#define CSIIF21 IF0H_bit.no1
+#define IICIF21 IF0H_bit.no1
+#define SRIF2 IF0H_bit.no1
+#define SREIF2 IF0H_bit.no2
+#define DMAIF0 IF0H_bit.no3
+#define DMAIF1 IF0H_bit.no4
+#define CSIIF00 IF0H_bit.no5
+#define IICIF00 IF0H_bit.no5
+#define STIF0 IF0H_bit.no5
+#define CSIIF01 IF0H_bit.no6
+#define IICIF01 IF0H_bit.no6
+#define SRIF0 IF0H_bit.no6
+#define SREIF0 IF0H_bit.no7
+#define TMIF01H IF0H_bit.no7
+#define CSIIF10 IF1_bit.no0
+#define IICIF10 IF1_bit.no0
+#define STIF1 IF1_bit.no0
+#define CSIIF11 IF1_bit.no1
+#define IICIF11 IF1_bit.no1
+#define SRIF1 IF1_bit.no1
+#define SREIF1 IF1_bit.no2
+#define TMIF03H IF1_bit.no2
+#define IICAIF0 IF1_bit.no3
+#define TMIF00 IF1_bit.no4
+#define TMIF01 IF1_bit.no5
+#define TMIF02 IF1_bit.no6
+#define TMIF03 IF1_bit.no7
+#define ADIF IF1H_bit.no0
+#define RTCIF IF1H_bit.no1
+#define ITIF IF1H_bit.no2
+#define KRIF IF1H_bit.no3
+#define TMIF04 IF1H_bit.no7
+#define WDTIMK MK0_bit.no0
+#define LVIMK MK0_bit.no1
+#define PMK0 MK0_bit.no2
+#define PMK1 MK0_bit.no3
+#define PMK2 MK0_bit.no4
+#define PMK3 MK0_bit.no5
+#define PMK4 MK0_bit.no6
+#define PMK5 MK0_bit.no7
+#define CSIMK20 MK0H_bit.no0
+#define IICMK20 MK0H_bit.no0
+#define STMK2 MK0H_bit.no0
+#define CSIMK21 MK0H_bit.no1
+#define IICMK21 MK0H_bit.no1
+#define SRMK2 MK0H_bit.no1
+#define SREMK2 MK0H_bit.no2
+#define DMAMK0 MK0H_bit.no3
+#define DMAMK1 MK0H_bit.no4
+#define CSIMK00 MK0H_bit.no5
+#define IICMK00 MK0H_bit.no5
+#define STMK0 MK0H_bit.no5
+#define CSIMK01 MK0H_bit.no6
+#define IICMK01 MK0H_bit.no6
+#define SRMK0 MK0H_bit.no6
+#define SREMK0 MK0H_bit.no7
+#define TMMK01H MK0H_bit.no7
+#define CSIMK10 MK1_bit.no0
+#define IICMK10 MK1_bit.no0
+#define STMK1 MK1_bit.no0
+#define CSIMK11 MK1_bit.no1
+#define IICMK11 MK1_bit.no1
+#define SRMK1 MK1_bit.no1
+#define SREMK1 MK1_bit.no2
+#define TMMK03H MK1_bit.no2
+#define IICAMK0 MK1_bit.no3
+#define TMMK00 MK1_bit.no4
+#define TMMK01 MK1_bit.no5
+#define TMMK02 MK1_bit.no6
+#define TMMK03 MK1_bit.no7
+#define ADMK MK1H_bit.no0
+#define RTCMK MK1H_bit.no1
+#define ITMK MK1H_bit.no2
+#define KRMK MK1H_bit.no3
+#define TMMK04 MK1H_bit.no7
+#define WDTIPR0 PR00_bit.no0
+#define LVIPR0 PR00_bit.no1
+#define PPR00 PR00_bit.no2
+#define PPR01 PR00_bit.no3
+#define PPR02 PR00_bit.no4
+#define PPR03 PR00_bit.no5
+#define PPR04 PR00_bit.no6
+#define PPR05 PR00_bit.no7
+#define CSIPR020 PR00H_bit.no0
+#define IICPR020 PR00H_bit.no0
+#define STPR02 PR00H_bit.no0
+#define CSIPR021 PR00H_bit.no1
+#define IICPR021 PR00H_bit.no1
+#define SRPR02 PR00H_bit.no1
+#define SREPR02 PR00H_bit.no2
+#define DMAPR00 PR00H_bit.no3
+#define DMAPR01 PR00H_bit.no4
+#define CSIPR000 PR00H_bit.no5
+#define IICPR000 PR00H_bit.no5
+#define STPR00 PR00H_bit.no5
+#define CSIPR001 PR00H_bit.no6
+#define IICPR001 PR00H_bit.no6
+#define SRPR00 PR00H_bit.no6
+#define SREPR00 PR00H_bit.no7
+#define TMPR001H PR00H_bit.no7
+#define CSIPR010 PR01_bit.no0
+#define IICPR010 PR01_bit.no0
+#define STPR01 PR01_bit.no0
+#define CSIPR011 PR01_bit.no1
+#define IICPR011 PR01_bit.no1
+#define SRPR01 PR01_bit.no1
+#define SREPR01 PR01_bit.no2
+#define TMPR003H PR01_bit.no2
+#define IICAPR00 PR01_bit.no3
+#define TMPR000 PR01_bit.no4
+#define TMPR001 PR01_bit.no5
+#define TMPR002 PR01_bit.no6
+#define TMPR003 PR01_bit.no7
+#define ADPR0 PR01H_bit.no0
+#define RTCPR0 PR01H_bit.no1
+#define ITPR0 PR01H_bit.no2
+#define KRPR0 PR01H_bit.no3
+#define TMPR004 PR01H_bit.no7
+#define WDTIPR1 PR10_bit.no0
+#define LVIPR1 PR10_bit.no1
+#define PPR10 PR10_bit.no2
+#define PPR11 PR10_bit.no3
+#define PPR12 PR10_bit.no4
+#define PPR13 PR10_bit.no5
+#define PPR14 PR10_bit.no6
+#define PPR15 PR10_bit.no7
+#define CSIPR120 PR10H_bit.no0
+#define IICPR120 PR10H_bit.no0
+#define STPR12 PR10H_bit.no0
+#define CSIPR121 PR10H_bit.no1
+#define IICPR121 PR10H_bit.no1
+#define SRPR12 PR10H_bit.no1
+#define SREPR12 PR10H_bit.no2
+#define DMAPR10 PR10H_bit.no3
+#define DMAPR11 PR10H_bit.no4
+#define CSIPR100 PR10H_bit.no5
+#define IICPR100 PR10H_bit.no5
+#define STPR10 PR10H_bit.no5
+#define CSIPR101 PR10H_bit.no6
+#define IICPR101 PR10H_bit.no6
+#define SRPR10 PR10H_bit.no6
+#define SREPR10 PR10H_bit.no7
+#define TMPR101H PR10H_bit.no7
+#define CSIPR110 PR11_bit.no0
+#define IICPR110 PR11_bit.no0
+#define STPR11 PR11_bit.no0
+#define CSIPR111 PR11_bit.no1
+#define IICPR111 PR11_bit.no1
+#define SRPR11 PR11_bit.no1
+#define SREPR11 PR11_bit.no2
+#define TMPR103H PR11_bit.no2
+#define IICAPR10 PR11_bit.no3
+#define TMPR100 PR11_bit.no4
+#define TMPR101 PR11_bit.no5
+#define TMPR102 PR11_bit.no6
+#define TMPR103 PR11_bit.no7
+#define ADPR1 PR11H_bit.no0
+#define RTCPR1 PR11H_bit.no1
+#define ITPR1 PR11H_bit.no2
+#define KRPR1 PR11H_bit.no3
+#define TMPR104 PR11H_bit.no7
+#define MAA PMC_bit.no0
+
+/*
+ Interrupt vector addresses
+ */
+#define RST_vect (0x0)
+#define INTDBG_vect (0x2)
+#define INTWDTI_vect (0x4)
+#define INTLVI_vect (0x6)
+#define INTP0_vect (0x8)
+#define INTP1_vect (0xA)
+#define INTP2_vect (0xC)
+#define INTP3_vect (0xE)
+#define INTP4_vect (0x10)
+#define INTP5_vect (0x12)
+#define INTCSI20_vect (0x14)
+#define INTIIC20_vect (0x14)
+#define INTST2_vect (0x14)
+#define INTCSI21_vect (0x16)
+#define INTIIC21_vect (0x16)
+#define INTSR2_vect (0x16)
+#define INTSRE2_vect (0x18)
+#define INTDMA0_vect (0x1A)
+#define INTDMA1_vect (0x1C)
+#define INTCSI00_vect (0x1E)
+#define INTIIC00_vect (0x1E)
+#define INTST0_vect (0x1E)
+#define INTCSI01_vect (0x20)
+#define INTIIC01_vect (0x20)
+#define INTSR0_vect (0x20)
+#define INTSRE0_vect (0x22)
+#define INTTM01H_vect (0x22)
+#define INTCSI10_vect (0x24)
+#define INTIIC10_vect (0x24)
+#define INTST1_vect (0x24)
+#define INTCSI11_vect (0x26)
+#define INTIIC11_vect (0x26)
+#define INTSR1_vect (0x26)
+#define INTSRE1_vect (0x28)
+#define INTTM03H_vect (0x28)
+#define INTIICA0_vect (0x2A)
+#define INTTM00_vect (0x2C)
+#define INTTM01_vect (0x2E)
+#define INTTM02_vect (0x30)
+#define INTTM03_vect (0x32)
+#define INTAD_vect (0x34)
+#define INTRTC_vect (0x36)
+#define INTIT_vect (0x38)
+#define INTKR_vect (0x3A)
+#define INTTM04_vect (0x42)
+#define INTTM05_vect (0x44)
+#define INTTM06_vect (0x46)
+#define INTTM07_vect (0x48)
+#define INTP6_vect (0x4A)
+#define INTP7_vect (0x4C)
+#define INTP8_vect (0x4E)
+#define INTP9_vect (0x50)
+#define INTP10_vect (0x52)
+#define INTP11_vect (0x54)
+#define INTMD_vect (0x5E)
+#define INTFL_vect (0x62)
+#define BRK_I_vect (0x7E)
+#endif
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1A_ext.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1A_ext.h
new file mode 100644
index 0000000000..0048962c46
--- /dev/null
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1A_ext.h
@@ -0,0 +1,571 @@
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1A */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - G1A */
+/* CPU TYPE : R5F10ELE */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/
+
+/************************************************************************/
+/* Header file generated from device file: */
+/* DR5F10ELE.DVF */
+/* Copyright(C) 2012 Renesas */
+/* File Version V1.00 */
+/* Tool Version 1.9.7121 */
+/* Date Generated 13/11/2012 */
+/************************************************************************/
+
+#ifndef __IOREG_BIT_STRUCTURES
+#define __IOREG_BIT_STRUCTURES
+typedef struct {
+ unsigned char no0 :1;
+ unsigned char no1 :1;
+ unsigned char no2 :1;
+ unsigned char no3 :1;
+ unsigned char no4 :1;
+ unsigned char no5 :1;
+ unsigned char no6 :1;
+ unsigned char no7 :1;
+} __BITS8;
+
+typedef struct {
+ unsigned short no0 :1;
+ unsigned short no1 :1;
+ unsigned short no2 :1;
+ unsigned short no3 :1;
+ unsigned short no4 :1;
+ unsigned short no5 :1;
+ unsigned short no6 :1;
+ unsigned short no7 :1;
+ unsigned short no8 :1;
+ unsigned short no9 :1;
+ unsigned short no10 :1;
+ unsigned short no11 :1;
+ unsigned short no12 :1;
+ unsigned short no13 :1;
+ unsigned short no14 :1;
+ unsigned short no15 :1;
+} __BITS16;
+
+#endif
+
+#ifndef IODEFINE_EXT_H
+#define IODEFINE_EXT_H
+
+/*
+ IO Registers
+ */
+union un_adm2 {
+ unsigned char adm2;
+ __BITS8 BIT;
+};
+union un_pu0 {
+ unsigned char pu0;
+ __BITS8 BIT;
+};
+union un_pu1 {
+ unsigned char pu1;
+ __BITS8 BIT;
+};
+union un_pu3 {
+ unsigned char pu3;
+ __BITS8 BIT;
+};
+union un_pu4 {
+ unsigned char pu4;
+ __BITS8 BIT;
+};
+union un_pu5 {
+ unsigned char pu5;
+ __BITS8 BIT;
+};
+union un_pu7 {
+ unsigned char pu7;
+ __BITS8 BIT;
+};
+union un_pu12 {
+ unsigned char pu12;
+ __BITS8 BIT;
+};
+union un_pu14 {
+ unsigned char pu14;
+ __BITS8 BIT;
+};
+union un_pim0 {
+ unsigned char pim0;
+ __BITS8 BIT;
+};
+union un_pim1 {
+ unsigned char pim1;
+ __BITS8 BIT;
+};
+union un_pom0 {
+ unsigned char pom0;
+ __BITS8 BIT;
+};
+union un_pom1 {
+ unsigned char pom1;
+ __BITS8 BIT;
+};
+union un_pom5 {
+ unsigned char pom5;
+ __BITS8 BIT;
+};
+union un_pom7 {
+ unsigned char pom7;
+ __BITS8 BIT;
+};
+union un_pmc0 {
+ unsigned char pmc0;
+ __BITS8 BIT;
+};
+union un_pmc1 {
+ unsigned char pmc1;
+ __BITS8 BIT;
+};
+union un_pmc3 {
+ unsigned char pmc3;
+ __BITS8 BIT;
+};
+union un_pmc4 {
+ unsigned char pmc4;
+ __BITS8 BIT;
+};
+union un_pmc5 {
+ unsigned char pmc5;
+ __BITS8 BIT;
+};
+union un_pmc7 {
+ unsigned char pmc7;
+ __BITS8 BIT;
+};
+union un_pmc12 {
+ unsigned char pmc12;
+ __BITS8 BIT;
+};
+union un_nfen0 {
+ unsigned char nfen0;
+ __BITS8 BIT;
+};
+union un_nfen1 {
+ unsigned char nfen1;
+ __BITS8 BIT;
+};
+union un_isc {
+ unsigned char isc;
+ __BITS8 BIT;
+};
+union un_gaidis {
+ unsigned char gaidis;
+ __BITS8 BIT;
+};
+union un_gdidis {
+ unsigned char gdidis;
+ __BITS8 BIT;
+};
+union un_dflctl {
+ unsigned char dflctl;
+ __BITS8 BIT;
+};
+union un_bectl {
+ unsigned char bectl;
+ __BITS8 BIT;
+};
+union un_fsse {
+ unsigned char fsse;
+ __BITS8 BIT;
+};
+union un_pfs {
+ unsigned char pfs;
+ __BITS8 BIT;
+};
+union un_mduc {
+ unsigned char mduc;
+ __BITS8 BIT;
+};
+union un_per0 {
+ unsigned char per0;
+ __BITS8 BIT;
+};
+union un_rmc {
+ unsigned char rmc;
+ __BITS8 BIT;
+};
+union un_rpectl {
+ unsigned char rpectl;
+ __BITS8 BIT;
+};
+union un_se0l {
+ unsigned char se0l;
+ __BITS8 BIT;
+};
+union un_ss0l {
+ unsigned char ss0l;
+ __BITS8 BIT;
+};
+union un_st0l {
+ unsigned char st0l;
+ __BITS8 BIT;
+};
+union un_soe0l {
+ unsigned char soe0l;
+ __BITS8 BIT;
+};
+union un_se1l {
+ unsigned char se1l;
+ __BITS8 BIT;
+};
+union un_ss1l {
+ unsigned char ss1l;
+ __BITS8 BIT;
+};
+union un_st1l {
+ unsigned char st1l;
+ __BITS8 BIT;
+};
+union un_soe1l {
+ unsigned char soe1l;
+ __BITS8 BIT;
+};
+union un_te0l {
+ unsigned char te0l;
+ __BITS8 BIT;
+};
+union un_ts0l {
+ unsigned char ts0l;
+ __BITS8 BIT;
+};
+union un_tt0l {
+ unsigned char tt0l;
+ __BITS8 BIT;
+};
+union un_toe0l {
+ unsigned char toe0l;
+ __BITS8 BIT;
+};
+union un_iicctl00 {
+ unsigned char iicctl00;
+ __BITS8 BIT;
+};
+union un_iicctl01 {
+ unsigned char iicctl01;
+ __BITS8 BIT;
+};
+union un_crc0ctl {
+ unsigned char crc0ctl;
+ __BITS8 BIT;
+};
+
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT
+#define ADUL (*(volatile unsigned char *)0xF0011)
+#define ADLL (*(volatile unsigned char *)0xF0012)
+#define ADTES (*(volatile unsigned char *)0xF0013)
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT
+#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14
+#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT
+#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1
+#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT
+#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1
+#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT
+#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7
+#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT
+#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0
+#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT
+#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1
+#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT
+#define PMC3 (*(volatile union un_pmc3 *)0xF0063).pmc3
+#define PMC3_bit (*(volatile union un_pmc3 *)0xF0063).BIT
+#define PMC4 (*(volatile union un_pmc4 *)0xF0064).pmc4
+#define PMC4_bit (*(volatile union un_pmc4 *)0xF0064).BIT
+#define PMC5 (*(volatile union un_pmc5 *)0xF0065).pmc5
+#define PMC5_bit (*(volatile union un_pmc5 *)0xF0065).BIT
+#define PMC7 (*(volatile union un_pmc7 *)0xF0067).pmc7
+#define PMC7_bit (*(volatile union un_pmc7 *)0xF0067).BIT
+#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12
+#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT
+#define ISC (*(volatile union un_isc *)0xF0073).isc
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT
+#define TIS0 (*(volatile unsigned char *)0xF0074)
+#define ADPC (*(volatile unsigned char *)0xF0076)
+#define PIOR (*(volatile unsigned char *)0xF0077)
+#define IAWCTL (*(volatile unsigned char *)0xF0078)
+#define GAIDIS (*(volatile union un_gaidis *)0xF007C).gaidis
+#define GAIDIS_bit (*(volatile union un_gaidis *)0xF007C).BIT
+#define GDIDIS (*(volatile union un_gdidis *)0xF007D).gdidis
+#define GDIDIS_bit (*(volatile union un_gdidis *)0xF007D).BIT
+#define PRDSEL (*(volatile unsigned short *)0xF007E)
+#define TOOLEN (*(volatile unsigned char *)0xF0080)
+#define BPAL0 (*(volatile unsigned char *)0xF0081)
+#define BPAH0 (*(volatile unsigned char *)0xF0082)
+#define BPAS0 (*(volatile unsigned char *)0xF0083)
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)
+#define BACDML0 (*(volatile unsigned char *)0xF0086)
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)
+#define MONMOD (*(volatile unsigned char *)0xF0088)
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)
+#define FLSEC (*(volatile unsigned short *)0xF00B0)
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)
+#define FSSET (*(volatile unsigned char *)0xF00B6)
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT
+#define FLFADL (*(volatile unsigned short *)0xF00B8)
+#define FLFADH (*(volatile unsigned char *)0xF00BA)
+#define PFCMD (*(volatile unsigned char *)0xF00C0)
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT
+#define FLRL (*(volatile unsigned short *)0xF00C2)
+#define FLRH (*(volatile unsigned short *)0xF00C4)
+#define FLWE (*(volatile unsigned char *)0xF00C6)
+#define FLRE (*(volatile unsigned char *)0xF00C7)
+#define FLTMS (*(volatile unsigned short *)0xF00C8)
+#define DFLMC (*(volatile unsigned short *)0xF00CA)
+#define FLMCL (*(volatile unsigned short *)0xF00CC)
+#define FLMCH (*(volatile unsigned char *)0xF00CE)
+#define FSCTL (*(volatile unsigned char *)0xF00CF)
+#define ICEADR (*(volatile unsigned short *)0xF00D0)
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)
+#define MDCL (*(volatile unsigned short *)0xF00E0)
+#define MDCH (*(volatile unsigned short *)0xF00E2)
+#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc
+#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT
+#define OSMC (*(volatile unsigned char *)0xF00F3)
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)
+#define SSR00 (*(volatile unsigned short *)0xF0100)
+#define SSR00L (*(volatile unsigned char *)0xF0100)
+#define SSR01 (*(volatile unsigned short *)0xF0102)
+#define SSR01L (*(volatile unsigned char *)0xF0102)
+#define SSR02 (*(volatile unsigned short *)0xF0104)
+#define SSR02L (*(volatile unsigned char *)0xF0104)
+#define SSR03 (*(volatile unsigned short *)0xF0106)
+#define SSR03L (*(volatile unsigned char *)0xF0106)
+#define SIR00 (*(volatile unsigned short *)0xF0108)
+#define SIR00L (*(volatile unsigned char *)0xF0108)
+#define SIR01 (*(volatile unsigned short *)0xF010A)
+#define SIR01L (*(volatile unsigned char *)0xF010A)
+#define SIR02 (*(volatile unsigned short *)0xF010C)
+#define SIR02L (*(volatile unsigned char *)0xF010C)
+#define SIR03 (*(volatile unsigned short *)0xF010E)
+#define SIR03L (*(volatile unsigned char *)0xF010E)
+#define SMR00 (*(volatile unsigned short *)0xF0110)
+#define SMR01 (*(volatile unsigned short *)0xF0112)
+#define SMR02 (*(volatile unsigned short *)0xF0114)
+#define SMR03 (*(volatile unsigned short *)0xF0116)
+#define SCR00 (*(volatile unsigned short *)0xF0118)
+#define SCR01 (*(volatile unsigned short *)0xF011A)
+#define SCR02 (*(volatile unsigned short *)0xF011C)
+#define SCR03 (*(volatile unsigned short *)0xF011E)
+#define SE0 (*(volatile unsigned short *)0xF0120)
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT
+#define SS0 (*(volatile unsigned short *)0xF0122)
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT
+#define ST0 (*(volatile unsigned short *)0xF0124)
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT
+#define SPS0 (*(volatile unsigned short *)0xF0126)
+#define SPS0L (*(volatile unsigned char *)0xF0126)
+#define SO0 (*(volatile unsigned short *)0xF0128)
+#define SOE0 (*(volatile unsigned short *)0xF012A)
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT
+#define EDR00 (*(volatile unsigned short *)0xF012C)
+#define EDR00L (*(volatile unsigned char *)0xF012C)
+#define EDR01 (*(volatile unsigned short *)0xF012E)
+#define EDR01L (*(volatile unsigned char *)0xF012E)
+#define EDR02 (*(volatile unsigned short *)0xF0130)
+#define EDR02L (*(volatile unsigned char *)0xF0130)
+#define EDR03 (*(volatile unsigned short *)0xF0132)
+#define EDR03L (*(volatile unsigned char *)0xF0132)
+#define SOL0 (*(volatile unsigned short *)0xF0134)
+#define SOL0L (*(volatile unsigned char *)0xF0134)
+#define SSC0 (*(volatile unsigned short *)0xF0138)
+#define SSC0L (*(volatile unsigned char *)0xF0138)
+#define SSR10 (*(volatile unsigned short *)0xF0140)
+#define SSR10L (*(volatile unsigned char *)0xF0140)
+#define SSR11 (*(volatile unsigned short *)0xF0142)
+#define SSR11L (*(volatile unsigned char *)0xF0142)
+#define SIR10 (*(volatile unsigned short *)0xF0148)
+#define SIR10L (*(volatile unsigned char *)0xF0148)
+#define SIR11 (*(volatile unsigned short *)0xF014A)
+#define SIR11L (*(volatile unsigned char *)0xF014A)
+#define SMR10 (*(volatile unsigned short *)0xF0150)
+#define SMR11 (*(volatile unsigned short *)0xF0152)
+#define SCR10 (*(volatile unsigned short *)0xF0158)
+#define SCR11 (*(volatile unsigned short *)0xF015A)
+#define SE1 (*(volatile unsigned short *)0xF0160)
+#define SE1L (*(volatile union un_se1l *)0xF0160).se1l
+#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT
+#define SS1 (*(volatile unsigned short *)0xF0162)
+#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l
+#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT
+#define ST1 (*(volatile unsigned short *)0xF0164)
+#define ST1L (*(volatile union un_st1l *)0xF0164).st1l
+#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT
+#define SPS1 (*(volatile unsigned short *)0xF0166)
+#define SPS1L (*(volatile unsigned char *)0xF0166)
+#define SO1 (*(volatile unsigned short *)0xF0168)
+#define SOE1 (*(volatile unsigned short *)0xF016A)
+#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l
+#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT
+#define EDR10 (*(volatile unsigned short *)0xF016C)
+#define EDR10L (*(volatile unsigned char *)0xF016C)
+#define EDR11 (*(volatile unsigned short *)0xF016E)
+#define EDR11L (*(volatile unsigned char *)0xF016E)
+#define SOL1 (*(volatile unsigned short *)0xF0174)
+#define SOL1L (*(volatile unsigned char *)0xF0174)
+#define TCR00 (*(volatile unsigned short *)0xF0180)
+#define TCR01 (*(volatile unsigned short *)0xF0182)
+#define TCR02 (*(volatile unsigned short *)0xF0184)
+#define TCR03 (*(volatile unsigned short *)0xF0186)
+#define TCR04 (*(volatile unsigned short *)0xF0188)
+#define TCR05 (*(volatile unsigned short *)0xF018A)
+#define TCR06 (*(volatile unsigned short *)0xF018C)
+#define TCR07 (*(volatile unsigned short *)0xF018E)
+#define TMR00 (*(volatile unsigned short *)0xF0190)
+#define TMR01 (*(volatile unsigned short *)0xF0192)
+#define TMR02 (*(volatile unsigned short *)0xF0194)
+#define TMR03 (*(volatile unsigned short *)0xF0196)
+#define TMR04 (*(volatile unsigned short *)0xF0198)
+#define TMR05 (*(volatile unsigned short *)0xF019A)
+#define TMR06 (*(volatile unsigned short *)0xF019C)
+#define TMR07 (*(volatile unsigned short *)0xF019E)
+#define TSR00 (*(volatile unsigned short *)0xF01A0)
+#define TSR00L (*(volatile unsigned char *)0xF01A0)
+#define TSR01 (*(volatile unsigned short *)0xF01A2)
+#define TSR01L (*(volatile unsigned char *)0xF01A2)
+#define TSR02 (*(volatile unsigned short *)0xF01A4)
+#define TSR02L (*(volatile unsigned char *)0xF01A4)
+#define TSR03 (*(volatile unsigned short *)0xF01A6)
+#define TSR03L (*(volatile unsigned char *)0xF01A6)
+#define TSR04 (*(volatile unsigned short *)0xF01A8)
+#define TSR04L (*(volatile unsigned char *)0xF01A8)
+#define TSR05 (*(volatile unsigned short *)0xF01AA)
+#define TSR05L (*(volatile unsigned char *)0xF01AA)
+#define TSR06 (*(volatile unsigned short *)0xF01AC)
+#define TSR06L (*(volatile unsigned char *)0xF01AC)
+#define TSR07 (*(volatile unsigned short *)0xF01AE)
+#define TSR07L (*(volatile unsigned char *)0xF01AE)
+#define TE0 (*(volatile unsigned short *)0xF01B0)
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT
+#define TS0 (*(volatile unsigned short *)0xF01B2)
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT
+#define TT0 (*(volatile unsigned short *)0xF01B4)
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT
+#define TPS0 (*(volatile unsigned short *)0xF01B6)
+#define TO0 (*(volatile unsigned short *)0xF01B8)
+#define TO0L (*(volatile unsigned char *)0xF01B8)
+#define TOE0 (*(volatile unsigned short *)0xF01BA)
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT
+#define TOL0 (*(volatile unsigned short *)0xF01BC)
+#define TOL0L (*(volatile unsigned char *)0xF01BC)
+#define TOM0 (*(volatile unsigned short *)0xF01BE)
+#define TOM0L (*(volatile unsigned char *)0xF01BE)
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT
+#define IICWL0 (*(volatile unsigned char *)0xF0232)
+#define IICWH0 (*(volatile unsigned char *)0xF0233)
+#define SVA0 (*(volatile unsigned char *)0xF0234)
+#define IICSE0 (*(volatile unsigned char *)0xF0235)
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)
+#define CRCD (*(volatile unsigned short *)0xF02FA)
+
+/*
+ Sfr bits
+ */
+#define ADTYP ADM2_bit.no0
+#define AWC ADM2_bit.no2
+#define ADRCK ADM2_bit.no3
+#define DFLEN DFLCTL_bit.no0
+#define BRSAM BECTL_bit.no0
+#define ESQST FSSE_bit.no7
+#define DIVST MDUC_bit.no0
+#define MACSF MDUC_bit.no1
+#define MACOF MDUC_bit.no2
+#define MDSM MDUC_bit.no3
+#define MACMODE MDUC_bit.no6
+#define DIVMODE MDUC_bit.no7
+#define TAU0EN PER0_bit.no0
+#define SAU0EN PER0_bit.no2
+#define SAU1EN PER0_bit.no3
+#define IICA0EN PER0_bit.no4
+#define ADCEN PER0_bit.no5
+#define RTCEN PER0_bit.no7
+#define PAENB RMC_bit.no0
+#define WDVOL RMC_bit.no7
+#define RPEF RPECTL_bit.no0
+#define RPERDIS RPECTL_bit.no7
+#define SPT0 IICCTL00_bit.no0
+#define STT0 IICCTL00_bit.no1
+#define ACKE0 IICCTL00_bit.no2
+#define WTIM0 IICCTL00_bit.no3
+#define SPIE0 IICCTL00_bit.no4
+#define WREL0 IICCTL00_bit.no5
+#define LREL0 IICCTL00_bit.no6
+#define IICE0 IICCTL00_bit.no7
+#define PRS0 IICCTL01_bit.no0
+#define DFC0 IICCTL01_bit.no2
+#define SMC0 IICCTL01_bit.no3
+#define DAD0 IICCTL01_bit.no4
+#define CLD0 IICCTL01_bit.no5
+#define WUP0 IICCTL01_bit.no7
+#define CRC0EN CRC0CTL_bit.no7
+
+/*
+ Interrupt vector addresses
+ */
+#endif
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port_iodefine.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1C.h
similarity index 92%
rename from FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port_iodefine.h
rename to FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1C.h
index 19d2081470..dfd8685359 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port_iodefine.h
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1C.h
@@ -1,26 +1,24 @@
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : iodefine.h */
-/* DESCRIPTION : Definition of I/O Registers */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/
-
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1C */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - G1C */
+/* CPU TYPE : R5F10JGC */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/
+
/************************************************************************/
/* Header file generated from device file: */
-/* DR5F10JBC.DVF */
+/* DR5F10JGC.DVF */
/* Copyright(C) 2012 Renesas */
/* File Version V1.00 */
/* Tool Version 1.9.7121 */
/* Date Generated 13/11/2012 */
/************************************************************************/
-#include "port_iodefine_ext.h"
-
#ifndef __IOREG_BIT_STRUCTURES
#define __IOREG_BIT_STRUCTURES
typedef struct {
@@ -101,6 +99,10 @@ union un_p13 {
unsigned char p13;
__BITS8 BIT;
};
+union un_p14 {
+ unsigned char p14;
+ __BITS8 BIT;
+};
union un_pm0 {
unsigned char pm0;
__BITS8 BIT;
@@ -137,6 +139,10 @@ union un_pm12 {
unsigned char pm12;
__BITS8 BIT;
};
+union un_pm14 {
+ unsigned char pm14;
+ __BITS8 BIT;
+};
union un_adm0 {
unsigned char adm0;
__BITS8 BIT;
@@ -149,6 +155,10 @@ union un_adm1 {
unsigned char adm1;
__BITS8 BIT;
};
+union un_krm {
+ unsigned char krm;
+ __BITS8 BIT;
+};
union un_egp0 {
unsigned char egp0;
__BITS8 BIT;
@@ -422,6 +432,8 @@ union un_pmc {
#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
+#define P14 (*(volatile union un_p14 *)0xFFF0E).p14
+#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT
#define SDR00 (*(volatile unsigned short *)0xFFF10)
#define SIO00 (*(volatile unsigned char *)0xFFF10)
#define TXD0 (*(volatile unsigned char *)0xFFF10)
@@ -452,12 +464,16 @@ union un_pmc {
#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
+#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14
+#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT
#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
#define ADS (*(volatile union un_ads *)0xFFF31).ads
#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
+#define KRM (*(volatile union un_krm *)0xFFF37).krm
+#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT
#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
@@ -665,6 +681,7 @@ union un_pmc {
#define SQST FSSQ_bit.no7
#define SQEND FSASTH_bit.no6
#define ESQEND FSASTH_bit.no7
+#define RCLOE1 RTCC0_bit.no5
#define RTCE RTCC0_bit.no7
#define RWAIT RTCC1_bit.no0
#define RWST RTCC1_bit.no1
@@ -675,9 +692,11 @@ union un_pmc {
#define HIOSTOP CSC_bit.no0
#define XTSTOP CSC_bit.no6
#define MSTOP CSC_bit.no7
+#define SDIV CKC_bit.no3
#define MCM0 CKC_bit.no4
#define MCS CKC_bit.no5
#define CSS CKC_bit.no6
+#define CLS CKC_bit.no7
#define PCLOE0 CKS0_bit.no7
#define PCLOE1 CKS1_bit.no7
#define LVIF LVIM_bit.no0
@@ -697,18 +716,22 @@ union un_pmc {
#define DEN0 DRC0_bit.no7
#define DST1 DRC1_bit.no0
#define DEN1 DRC1_bit.no7
+#define PIF6 IF2_bit.no3
#define PIF8 IF2_bit.no5
#define PIF9 IF2_bit.no6
#define MDIF IF2H_bit.no5
#define FLIF IF2H_bit.no7
+#define PMK6 MK2_bit.no3
#define PMK8 MK2_bit.no5
#define PMK9 MK2_bit.no6
#define MDMK MK2H_bit.no5
#define FLMK MK2H_bit.no7
+#define PPR06 PR02_bit.no3
#define PPR08 PR02_bit.no5
#define PPR09 PR02_bit.no6
#define MDPR0 PR02H_bit.no5
#define FLPR0 PR02H_bit.no7
+#define PPR16 PR12_bit.no3
#define PPR18 PR12_bit.no5
#define PPR19 PR12_bit.no6
#define MDPR1 PR12H_bit.no5
@@ -740,6 +763,7 @@ union un_pmc {
#define ADIF IF1H_bit.no0
#define RTCIF IF1H_bit.no1
#define ITIF IF1H_bit.no2
+#define KRIF IF1H_bit.no3
#define USBIF IF1H_bit.no4
#define RSUIF IF1H_bit.no5
#define WDTIMK MK0_bit.no0
@@ -769,6 +793,7 @@ union un_pmc {
#define ADMK MK1H_bit.no0
#define RTCMK MK1H_bit.no1
#define ITMK MK1H_bit.no2
+#define KRMK MK1H_bit.no3
#define USBMK MK1H_bit.no4
#define RSUMK MK1H_bit.no5
#define WDTIPR0 PR00_bit.no0
@@ -798,6 +823,7 @@ union un_pmc {
#define ADPR0 PR01H_bit.no0
#define RTCPR0 PR01H_bit.no1
#define ITPR0 PR01H_bit.no2
+#define KRPR0 PR01H_bit.no3
#define USBPR0 PR01H_bit.no4
#define RSUPR0 PR01H_bit.no5
#define WDTIPR1 PR10_bit.no0
@@ -827,6 +853,7 @@ union un_pmc {
#define ADPR1 PR11H_bit.no0
#define RTCPR1 PR11H_bit.no1
#define ITPR1 PR11H_bit.no2
+#define KRPR1 PR11H_bit.no3
#define USBPR1 PR11H_bit.no4
#define RSUPR1 PR11H_bit.no5
#define MAA PMC_bit.no0
@@ -864,8 +891,10 @@ union un_pmc {
#define INTAD_vect (0x34)
#define INTRTC_vect (0x36)
#define INTIT_vect (0x38)
+#define INTKR_vect (0x3A)
#define INTUSB_vect (0x3C)
#define INTRSUM_vect (0x3E)
+#define INTP6_vect (0x4A)
#define INTP8_vect (0x4E)
#define INTP9_vect (0x50)
#define INTMD_vect (0x5E)
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port_iodefine_ext.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1C_ext.h
similarity index 94%
rename from FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port_iodefine_ext.h
rename to FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1C_ext.h
index 621fc739fe..e881e4b6ae 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/FreeRTOS_Source/portable/GCC/RL78/port_iodefine_ext.h
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78G1C_ext.h
@@ -1,18 +1,18 @@
-/***********************************************************************/
-/* */
-/* PROJECT NAME : RTOSDemo */
-/* FILE : iodefine_ext.h */
-/* DESCRIPTION : Definition of Extended SFRs */
-/* CPU SERIES : RL78 - G1C */
-/* CPU TYPE : R5F10JBC */
-/* */
-/* This file is generated by e2studio. */
-/* */
-/***********************************************************************/
-
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78G1C */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - G1C */
+/* CPU TYPE : R5F10JGC */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/
+
/************************************************************************/
/* Header file generated from device file: */
-/* DR5F10JBC.DVF */
+/* DR5F10JGC.DVF */
/* Copyright(C) 2012 Renesas */
/* File Version V1.00 */
/* Tool Version 1.9.7121 */
@@ -95,6 +95,10 @@ union un_pu12 {
unsigned char pu12;
__BITS8 BIT;
};
+union un_pu14 {
+ unsigned char pu14;
+ __BITS8 BIT;
+};
union un_pim0 {
unsigned char pim0;
__BITS8 BIT;
@@ -119,8 +123,8 @@ union un_pom5 {
unsigned char pom5;
__BITS8 BIT;
};
-union un_pmc0 {
- unsigned char pmc0;
+union un_pom7 {
+ unsigned char pom7;
__BITS8 BIT;
};
union un_pmc12 {
@@ -246,6 +250,8 @@ union un_crc0ctl {
#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT
#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12
#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT
+#define PU14 (*(volatile union un_pu14 *)0xF003E).pu14
+#define PU14_bit (*(volatile union un_pu14 *)0xF003E).BIT
#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0
#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT
#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3
@@ -258,8 +264,8 @@ union un_crc0ctl {
#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT
#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5
#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT
-#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0
-#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT
+#define POM7 (*(volatile union un_pom7 *)0xF0057).pom7
+#define POM7_bit (*(volatile union un_pom7 *)0xF0057).BIT
#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12
#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT
#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78L13.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78L13.h
new file mode 100644
index 0000000000..60db13d1fd
--- /dev/null
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78L13.h
@@ -0,0 +1,1057 @@
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78L13 */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - L13 */
+/* CPU TYPE : R5F10WMG */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/
+
+/************************************************************************/
+/* Header file generated from device file: */
+/* DR5F10WMG.DVF */
+/* Copyright(C) 2012 Renesas */
+/* Version E1.00d */
+/************************************************************************/
+
+#ifndef __IOREG_BIT_STRUCTURES
+#define __IOREG_BIT_STRUCTURES
+typedef struct {
+ unsigned char no0 :1;
+ unsigned char no1 :1;
+ unsigned char no2 :1;
+ unsigned char no3 :1;
+ unsigned char no4 :1;
+ unsigned char no5 :1;
+ unsigned char no6 :1;
+ unsigned char no7 :1;
+} __BITS8;
+
+typedef struct {
+ unsigned short no0 :1;
+ unsigned short no1 :1;
+ unsigned short no2 :1;
+ unsigned short no3 :1;
+ unsigned short no4 :1;
+ unsigned short no5 :1;
+ unsigned short no6 :1;
+ unsigned short no7 :1;
+ unsigned short no8 :1;
+ unsigned short no9 :1;
+ unsigned short no10 :1;
+ unsigned short no11 :1;
+ unsigned short no12 :1;
+ unsigned short no13 :1;
+ unsigned short no14 :1;
+ unsigned short no15 :1;
+} __BITS16;
+
+#endif
+
+#ifndef IODEFINE_H
+#define IODEFINE_H
+
+/*
+ IO Registers
+ */
+union un_p0 {
+ unsigned char p0;
+ __BITS8 BIT;
+};
+union un_p1 {
+ unsigned char p1;
+ __BITS8 BIT;
+};
+union un_p2 {
+ unsigned char p2;
+ __BITS8 BIT;
+};
+union un_p3 {
+ unsigned char p3;
+ __BITS8 BIT;
+};
+union un_p4 {
+ unsigned char p4;
+ __BITS8 BIT;
+};
+union un_p5 {
+ unsigned char p5;
+ __BITS8 BIT;
+};
+union un_p6 {
+ unsigned char p6;
+ __BITS8 BIT;
+};
+union un_p7 {
+ unsigned char p7;
+ __BITS8 BIT;
+};
+union un_p12 {
+ unsigned char p12;
+ __BITS8 BIT;
+};
+union un_p13 {
+ unsigned char p13;
+ __BITS8 BIT;
+};
+union un_pm0 {
+ unsigned char pm0;
+ __BITS8 BIT;
+};
+union un_pm1 {
+ unsigned char pm1;
+ __BITS8 BIT;
+};
+union un_pm2 {
+ unsigned char pm2;
+ __BITS8 BIT;
+};
+union un_pm3 {
+ unsigned char pm3;
+ __BITS8 BIT;
+};
+union un_pm4 {
+ unsigned char pm4;
+ __BITS8 BIT;
+};
+union un_pm5 {
+ unsigned char pm5;
+ __BITS8 BIT;
+};
+union un_pm6 {
+ unsigned char pm6;
+ __BITS8 BIT;
+};
+union un_pm7 {
+ unsigned char pm7;
+ __BITS8 BIT;
+};
+union un_pm12 {
+ unsigned char pm12;
+ __BITS8 BIT;
+};
+union un_pm13 {
+ unsigned char pm13;
+ __BITS8 BIT;
+};
+union un_adm0 {
+ unsigned char adm0;
+ __BITS8 BIT;
+};
+union un_ads {
+ unsigned char ads;
+ __BITS8 BIT;
+};
+union un_adm1 {
+ unsigned char adm1;
+ __BITS8 BIT;
+};
+union un_krctl {
+ unsigned char krctl;
+ __BITS8 BIT;
+};
+union un_krm0 {
+ unsigned char krm0;
+ __BITS8 BIT;
+};
+union un_egp0 {
+ unsigned char egp0;
+ __BITS8 BIT;
+};
+union un_egn0 {
+ unsigned char egn0;
+ __BITS8 BIT;
+};
+union un_lcdm1 {
+ unsigned char lcdm1;
+ __BITS8 BIT;
+};
+union un_mlcd {
+ unsigned char mlcd;
+ __BITS8 BIT;
+};
+union un_iics0 {
+ unsigned char iics0;
+ __BITS8 BIT;
+};
+union un_iicf0 {
+ unsigned char iicf0;
+ __BITS8 BIT;
+};
+union un_flars {
+ unsigned char flars;
+ __BITS8 BIT;
+};
+union un_fssq {
+ unsigned char fssq;
+ __BITS8 BIT;
+};
+union un_flrst {
+ unsigned char flrst;
+ __BITS8 BIT;
+};
+union un_fsastl {
+ unsigned char fsastl;
+ __BITS8 BIT;
+};
+union un_fsasth {
+ unsigned char fsasth;
+ __BITS8 BIT;
+};
+union un_rtcc0 {
+ unsigned char rtcc0;
+ __BITS8 BIT;
+};
+union un_rtcc1 {
+ unsigned char rtcc1;
+ __BITS8 BIT;
+};
+union un_csc {
+ unsigned char csc;
+ __BITS8 BIT;
+};
+union un_ostc {
+ unsigned char ostc;
+ __BITS8 BIT;
+};
+union un_ckc {
+ unsigned char ckc;
+ __BITS8 BIT;
+};
+union un_cks0 {
+ unsigned char cks0;
+ __BITS8 BIT;
+};
+union un_cks1 {
+ unsigned char cks1;
+ __BITS8 BIT;
+};
+union un_lvim {
+ unsigned char lvim;
+ __BITS8 BIT;
+};
+union un_lvis {
+ unsigned char lvis;
+ __BITS8 BIT;
+};
+union un_monsta0 {
+ unsigned char monsta0;
+ __BITS8 BIT;
+};
+union un_asim {
+ unsigned char asim;
+ __BITS8 BIT;
+};
+union un_dmc0 {
+ unsigned char dmc0;
+ __BITS8 BIT;
+};
+union un_dmc1 {
+ unsigned char dmc1;
+ __BITS8 BIT;
+};
+union un_drc0 {
+ unsigned char drc0;
+ __BITS8 BIT;
+};
+union un_drc1 {
+ unsigned char drc1;
+ __BITS8 BIT;
+};
+union un_if2 {
+ unsigned short if2;
+ __BITS16 BIT;
+};
+union un_if2l {
+ unsigned char if2l;
+ __BITS8 BIT;
+};
+union un_if2h {
+ unsigned char if2h;
+ __BITS8 BIT;
+};
+union un_if3 {
+ unsigned short if3;
+ __BITS16 BIT;
+};
+union un_if3l {
+ unsigned char if3l;
+ __BITS8 BIT;
+};
+union un_mk2 {
+ unsigned short mk2;
+ __BITS16 BIT;
+};
+union un_mk2l {
+ unsigned char mk2l;
+ __BITS8 BIT;
+};
+union un_mk2h {
+ unsigned char mk2h;
+ __BITS8 BIT;
+};
+union un_mk3 {
+ unsigned short mk3;
+ __BITS16 BIT;
+};
+union un_mk3l {
+ unsigned char mk3l;
+ __BITS8 BIT;
+};
+union un_pr02 {
+ unsigned short pr02;
+ __BITS16 BIT;
+};
+union un_pr02l {
+ unsigned char pr02l;
+ __BITS8 BIT;
+};
+union un_pr02h {
+ unsigned char pr02h;
+ __BITS8 BIT;
+};
+union un_pr03 {
+ unsigned short pr03;
+ __BITS16 BIT;
+};
+union un_pr03l {
+ unsigned char pr03l;
+ __BITS8 BIT;
+};
+union un_pr12 {
+ unsigned short pr12;
+ __BITS16 BIT;
+};
+union un_pr12l {
+ unsigned char pr12l;
+ __BITS8 BIT;
+};
+union un_pr12h {
+ unsigned char pr12h;
+ __BITS8 BIT;
+};
+union un_pr13 {
+ unsigned short pr13;
+ __BITS16 BIT;
+};
+union un_pr13l {
+ unsigned char pr13l;
+ __BITS8 BIT;
+};
+union un_if0 {
+ unsigned short if0;
+ __BITS16 BIT;
+};
+union un_if0l {
+ unsigned char if0l;
+ __BITS8 BIT;
+};
+union un_if0h {
+ unsigned char if0h;
+ __BITS8 BIT;
+};
+union un_if1 {
+ unsigned short if1;
+ __BITS16 BIT;
+};
+union un_if1l {
+ unsigned char if1l;
+ __BITS8 BIT;
+};
+union un_if1h {
+ unsigned char if1h;
+ __BITS8 BIT;
+};
+union un_mk0 {
+ unsigned short mk0;
+ __BITS16 BIT;
+};
+union un_mk0l {
+ unsigned char mk0l;
+ __BITS8 BIT;
+};
+union un_mk0h {
+ unsigned char mk0h;
+ __BITS8 BIT;
+};
+union un_mk1 {
+ unsigned short mk1;
+ __BITS16 BIT;
+};
+union un_mk1l {
+ unsigned char mk1l;
+ __BITS8 BIT;
+};
+union un_mk1h {
+ unsigned char mk1h;
+ __BITS8 BIT;
+};
+union un_pr00 {
+ unsigned short pr00;
+ __BITS16 BIT;
+};
+union un_pr00l {
+ unsigned char pr00l;
+ __BITS8 BIT;
+};
+union un_pr00h {
+ unsigned char pr00h;
+ __BITS8 BIT;
+};
+union un_pr01 {
+ unsigned short pr01;
+ __BITS16 BIT;
+};
+union un_pr01l {
+ unsigned char pr01l;
+ __BITS8 BIT;
+};
+union un_pr01h {
+ unsigned char pr01h;
+ __BITS8 BIT;
+};
+union un_pr10 {
+ unsigned short pr10;
+ __BITS16 BIT;
+};
+union un_pr10l {
+ unsigned char pr10l;
+ __BITS8 BIT;
+};
+union un_pr10h {
+ unsigned char pr10h;
+ __BITS8 BIT;
+};
+union un_pr11 {
+ unsigned short pr11;
+ __BITS16 BIT;
+};
+union un_pr11l {
+ unsigned char pr11l;
+ __BITS8 BIT;
+};
+union un_pr11h {
+ unsigned char pr11h;
+ __BITS8 BIT;
+};
+union un_pmc {
+ unsigned char pmc;
+ __BITS8 BIT;
+};
+
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
+#define SDR00 (*(volatile unsigned short *)0xFFF10)
+#define SIO00 (*(volatile unsigned char *)0xFFF10)
+#define TXD0 (*(volatile unsigned char *)0xFFF10)
+#define SDR01 (*(volatile unsigned short *)0xFFF12)
+#define RXD0 (*(volatile unsigned char *)0xFFF12)
+#define SDR12 (*(volatile unsigned short *)0xFFF14)
+#define TXD3 (*(volatile unsigned char *)0xFFF14)
+#define SDR13 (*(volatile unsigned short *)0xFFF16)
+#define RXD3 (*(volatile unsigned char *)0xFFF16)
+#define TDR00 (*(volatile unsigned short *)0xFFF18)
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)
+#define ADCR (*(volatile unsigned short *)0xFFF1E)
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
+#define PM13 (*(volatile union un_pm13 *)0xFFF2D).pm13
+#define PM13_bit (*(volatile union un_pm13 *)0xFFF2D).BIT
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
+#define ADS (*(volatile union un_ads *)0xFFF31).ads
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
+#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl
+#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT
+#define KRF (*(volatile unsigned char *)0xFFF35)
+#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0
+#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT
+#define LCDM0 (*(volatile unsigned char *)0xFFF40)
+#define LCDM1 (*(volatile union un_lcdm1 *)0xFFF41).lcdm1
+#define LCDM1_bit (*(volatile union un_lcdm1 *)0xFFF41).BIT
+#define LCDC0 (*(volatile unsigned char *)0xFFF42)
+#define VLCD (*(volatile unsigned char *)0xFFF43)
+#define SDR02 (*(volatile unsigned short *)0xFFF44)
+#define SIO10 (*(volatile unsigned char *)0xFFF44)
+#define TXD1 (*(volatile unsigned char *)0xFFF44)
+#define SDR03 (*(volatile unsigned short *)0xFFF46)
+#define RXD1 (*(volatile unsigned char *)0xFFF46)
+#define SDR10 (*(volatile unsigned short *)0xFFF48)
+#define TXD2 (*(volatile unsigned char *)0xFFF48)
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)
+#define MLCD (*(volatile union un_mlcd *)0xFFF4C).mlcd
+#define MLCD_bit (*(volatile union un_mlcd *)0xFFF4C).BIT
+#define IICA0 (*(volatile unsigned char *)0xFFF50)
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
+#define TDR02 (*(volatile unsigned short *)0xFFF64)
+#define TDR03 (*(volatile unsigned short *)0xFFF66)
+#define TDR03L (*(volatile unsigned char *)0xFFF66)
+#define TDR03H (*(volatile unsigned char *)0xFFF67)
+#define TDR04 (*(volatile unsigned short *)0xFFF68)
+#define TDR05 (*(volatile unsigned short *)0xFFF6A)
+#define TDR06 (*(volatile unsigned short *)0xFFF6C)
+#define TDR07 (*(volatile unsigned short *)0xFFF6E)
+#define FLPMC (*(volatile unsigned char *)0xFFF80)
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT
+#define FLAPL (*(volatile unsigned short *)0xFFF82)
+#define FLAPH (*(volatile unsigned char *)0xFFF84)
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT
+#define FLWL (*(volatile unsigned short *)0xFFF8C)
+#define FLWH (*(volatile unsigned short *)0xFFF8E)
+#define ITMC (*(volatile unsigned short *)0xFFF90)
+#define SEC (*(volatile unsigned char *)0xFFF92)
+#define MIN (*(volatile unsigned char *)0xFFF93)
+#define HOUR (*(volatile unsigned char *)0xFFF94)
+#define WEEK (*(volatile unsigned char *)0xFFF95)
+#define DAY (*(volatile unsigned char *)0xFFF96)
+#define MONTH (*(volatile unsigned char *)0xFFF97)
+#define YEAR (*(volatile unsigned char *)0xFFF98)
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT
+#define CMC (*(volatile unsigned char *)0xFFFA0)
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT
+#define OSTS (*(volatile unsigned char *)0xFFFA3)
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT
+#define RESF (*(volatile unsigned char *)0xFFFA8)
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT
+#define WDTE (*(volatile unsigned char *)0xFFFAB)
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)
+#define RXB (*(volatile unsigned char *)0xFFFAD)
+#define TXS (*(volatile unsigned char *)0xFFFAD)
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT
+#define IF3 (*(volatile union un_if3 *)0xFFFD2).if3
+#define IF3_bit (*(volatile union un_if3 *)0xFFFD2).BIT
+#define IF3L (*(volatile union un_if3l *)0xFFFD2).if3l
+#define IF3L_bit (*(volatile union un_if3l *)0xFFFD2).BIT
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT
+#define MK3 (*(volatile union un_mk3 *)0xFFFD6).mk3
+#define MK3_bit (*(volatile union un_mk3 *)0xFFFD6).BIT
+#define MK3L (*(volatile union un_mk3l *)0xFFFD6).mk3l
+#define MK3L_bit (*(volatile union un_mk3l *)0xFFFD6).BIT
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT
+#define PR03 (*(volatile union un_pr03 *)0xFFFDA).pr03
+#define PR03_bit (*(volatile union un_pr03 *)0xFFFDA).BIT
+#define PR03L (*(volatile union un_pr03l *)0xFFFDA).pr03l
+#define PR03L_bit (*(volatile union un_pr03l *)0xFFFDA).BIT
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT
+#define PR13 (*(volatile union un_pr13 *)0xFFFDE).pr13
+#define PR13_bit (*(volatile union un_pr13 *)0xFFFDE).BIT
+#define PR13L (*(volatile union un_pr13l *)0xFFFDE).pr13l
+#define PR13L_bit (*(volatile union un_pr13l *)0xFFFDE).BIT
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT
+#define MDAL (*(volatile unsigned short *)0xFFFF0)
+#define MULA (*(volatile unsigned short *)0xFFFF0)
+#define MDAH (*(volatile unsigned short *)0xFFFF2)
+#define MULB (*(volatile unsigned short *)0xFFFF2)
+#define MDBH (*(volatile unsigned short *)0xFFFF4)
+#define MULOH (*(volatile unsigned short *)0xFFFF4)
+#define MDBL (*(volatile unsigned short *)0xFFFF6)
+#define MULOL (*(volatile unsigned short *)0xFFFF6)
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
+
+/*
+ Sfr bits
+ */
+#define ADCE ADM0_bit.no0
+#define ADCS ADM0_bit.no7
+#define LCDVLM LCDM1_bit.no0
+#define LCDSEL LCDM1_bit.no3
+#define BLON LCDM1_bit.no4
+#define VLCON LCDM1_bit.no5
+#define SCOC LCDM1_bit.no6
+#define LCDON LCDM1_bit.no7
+#define OPTCKE MLCD_bit.no4
+#define COMEXP MLCD_bit.no6
+#define MLCDEN MLCD_bit.no7
+#define SPD0 IICS0_bit.no0
+#define STD0 IICS0_bit.no1
+#define ACKD0 IICS0_bit.no2
+#define TRC0 IICS0_bit.no3
+#define COI0 IICS0_bit.no4
+#define EXC0 IICS0_bit.no5
+#define ALD0 IICS0_bit.no6
+#define MSTS0 IICS0_bit.no7
+#define IICRSV0 IICF0_bit.no0
+#define STCEN0 IICF0_bit.no1
+#define IICBSY0 IICF0_bit.no6
+#define STCF0 IICF0_bit.no7
+#define FSSTP FSSQ_bit.no6
+#define SQST FSSQ_bit.no7
+#define SQEND FSASTH_bit.no6
+#define ESQEND FSASTH_bit.no7
+#define RCLOE1 RTCC0_bit.no5
+#define RCLOSEL RTCC0_bit.no6
+#define RTCE RTCC0_bit.no7
+#define RWAIT RTCC1_bit.no0
+#define RWST RTCC1_bit.no1
+#define RIFG RTCC1_bit.no3
+#define WAFG RTCC1_bit.no4
+#define RITE RTCC1_bit.no5
+#define WALIE RTCC1_bit.no6
+#define WALE RTCC1_bit.no7
+#define HIOSTOP CSC_bit.no0
+#define XTSTOP CSC_bit.no6
+#define MSTOP CSC_bit.no7
+#define SDIV CKC_bit.no3
+#define MCM0 CKC_bit.no4
+#define MCS CKC_bit.no5
+#define CSS CKC_bit.no6
+#define CLS CKC_bit.no7
+#define PCLOE0 CKS0_bit.no7
+#define PCLOE1 CKS1_bit.no7
+#define LVIF LVIM_bit.no0
+#define LVIOMSK LVIM_bit.no1
+#define LVISEN LVIM_bit.no7
+#define LVILV LVIS_bit.no0
+#define LVIMD LVIS_bit.no7
+#define DWAIT0 DMC0_bit.no4
+#define DS0 DMC0_bit.no5
+#define DRS0 DMC0_bit.no6
+#define STG0 DMC0_bit.no7
+#define DWAIT1 DMC1_bit.no4
+#define DS1 DMC1_bit.no5
+#define DRS1 DMC1_bit.no6
+#define STG1 DMC1_bit.no7
+#define DST0 DRC0_bit.no0
+#define DEN0 DRC0_bit.no7
+#define DST1 DRC1_bit.no0
+#define DEN1 DRC1_bit.no7
+#define TKBIF2 IF2_bit.no0
+#define TMIF04 IF2_bit.no1
+#define TMIF05 IF2_bit.no2
+#define PIF6 IF2_bit.no3
+#define PIF7 IF2_bit.no4
+#define LCDIF0 IF2_bit.no5
+#define CMPIF0 IF2_bit.no6
+#define CMPIF1 IF2_bit.no7
+#define TMIF06 IF2H_bit.no0
+#define TMIF07 IF2H_bit.no1
+#define SREIF3 IF2H_bit.no4
+#define MDIF IF2H_bit.no5
+#define FLIF IF2H_bit.no7
+#define DMAIF2 IF3_bit.no0
+#define DMAIF3 IF3_bit.no1
+#define TKBMK2 MK2_bit.no0
+#define TMMK04 MK2_bit.no1
+#define TMMK05 MK2_bit.no2
+#define PMK6 MK2_bit.no3
+#define PMK7 MK2_bit.no4
+#define LCDMK0 MK2_bit.no5
+#define CMPMK0 MK2_bit.no6
+#define CMPMK1 MK2_bit.no7
+#define TMMK06 MK2H_bit.no0
+#define TMMK07 MK2H_bit.no1
+#define SREMK3 MK2H_bit.no4
+#define MDMK MK2H_bit.no5
+#define FLMK MK2H_bit.no7
+#define DMAMK2 MK3_bit.no0
+#define DMAMK3 MK3_bit.no1
+#define TKBPR02 PR02_bit.no0
+#define TMPR004 PR02_bit.no1
+#define TMPR005 PR02_bit.no2
+#define PPR06 PR02_bit.no3
+#define PPR07 PR02_bit.no4
+#define LCDPR00 PR02_bit.no5
+#define CMPPR00 PR02_bit.no6
+#define CMPPR01 PR02_bit.no7
+#define TPR006 PR02H_bit.no0
+#define TPR007 PR02H_bit.no1
+#define SREPR03 PR02H_bit.no4
+#define MDPR0 PR02H_bit.no5
+#define FLPR0 PR02H_bit.no7
+#define DMAPR02 PR03_bit.no0
+#define DMAPR03 PR03_bit.no1
+#define TKBPR12 PR12_bit.no0
+#define TMPR104 PR12_bit.no1
+#define TMPR105 PR12_bit.no2
+#define PPR16 PR12_bit.no3
+#define PPR17 PR12_bit.no4
+#define LCDPR10 PR12_bit.no5
+#define CMPPR10 PR12_bit.no6
+#define CMPPR11 PR12_bit.no7
+#define TPR106 PR12H_bit.no0
+#define TPR107 PR12H_bit.no1
+#define SREPR13 PR12H_bit.no4
+#define MDPR1 PR12H_bit.no5
+#define FLPR1 PR12H_bit.no7
+#define DMAPR12 PR13_bit.no0
+#define DMAPR13 PR13_bit.no1
+#define WDTIIF IF0_bit.no0
+#define LVIIF IF0_bit.no1
+#define PIF0 IF0_bit.no2
+#define PIF1 IF0_bit.no3
+#define PIF2 IF0_bit.no4
+#define PIF3 IF0_bit.no5
+#define PIF4 IF0_bit.no6
+#define PIF5 IF0_bit.no7
+#define STIF2 IF0H_bit.no0
+#define SRIF2 IF0H_bit.no1
+#define SREIF2 IF0H_bit.no2
+#define DMAIF0 IF0H_bit.no3
+#define DMAIF1 IF0H_bit.no4
+#define CSIIF00 IF0H_bit.no5
+#define IICIF00 IF0H_bit.no5
+#define STIF0 IF0H_bit.no5
+#define TMIF00 IF0H_bit.no6
+#define SRIF0 IF0H_bit.no7
+#define SREIF0 IF1_bit.no0
+#define TMIF01H IF1_bit.no0
+#define CSIIF10 IF1_bit.no1
+#define IICIF10 IF1_bit.no1
+#define STIF1 IF1_bit.no1
+#define SRIF1 IF1_bit.no2
+#define SREIF1 IF1_bit.no3
+#define TMIF03H IF1_bit.no3
+#define IICAIF0 IF1_bit.no4
+#define RTITIF IF1_bit.no5
+#define TMIF01 IF1_bit.no7
+#define TMIF02 IF1H_bit.no0
+#define TMIF03 IF1H_bit.no1
+#define ADIF IF1H_bit.no2
+#define RTCIF IF1H_bit.no3
+#define TMKAIF IF1H_bit.no4
+#define KRIF IF1H_bit.no5
+#define STIF3 IF1H_bit.no6
+#define SRIF3 IF1H_bit.no7
+#define WDTIMK MK0_bit.no0
+#define LVIMK MK0_bit.no1
+#define PMK0 MK0_bit.no2
+#define PMK1 MK0_bit.no3
+#define PMK2 MK0_bit.no4
+#define PMK3 MK0_bit.no5
+#define PMK4 MK0_bit.no6
+#define PMK5 MK0_bit.no7
+#define STMK2 MK0H_bit.no0
+#define SRMK2 MK0H_bit.no1
+#define SREMK2 MK0H_bit.no2
+#define DMAMK0 MK0H_bit.no3
+#define DMAMK1 MK0H_bit.no4
+#define CSIMK00 MK0H_bit.no5
+#define IICMK00 MK0H_bit.no5
+#define STMK0 MK0H_bit.no5
+#define TMMK00 MK0H_bit.no6
+#define SRMK0 MK0H_bit.no7
+#define SREMK0 MK1_bit.no0
+#define TMMK01H MK1_bit.no0
+#define CSIMK10 MK1_bit.no1
+#define IICMK10 MK1_bit.no1
+#define STMK1 MK1_bit.no1
+#define SRMK1 MK1_bit.no2
+#define SREMK1 MK1_bit.no3
+#define TMMK03H MK1_bit.no3
+#define IICAMK0 MK1_bit.no4
+#define RTITMK MK1_bit.no5
+#define TMMK01 MK1_bit.no7
+#define TMMK02 MK1H_bit.no0
+#define TMMK03 MK1H_bit.no1
+#define ADMK MK1H_bit.no2
+#define RTCMK MK1H_bit.no3
+#define TMKAMK MK1H_bit.no4
+#define KRMK MK1H_bit.no5
+#define STMK3 MK1H_bit.no6
+#define SRMK3 MK1H_bit.no7
+#define WDTIPR0 PR00_bit.no0
+#define LVIPR0 PR00_bit.no1
+#define PPR00 PR00_bit.no2
+#define PPR01 PR00_bit.no3
+#define PPR02 PR00_bit.no4
+#define PPR03 PR00_bit.no5
+#define PPR04 PR00_bit.no6
+#define PPR05 PR00_bit.no7
+#define STPR02 PR00H_bit.no0
+#define SRPR02 PR00H_bit.no1
+#define SREPR02 PR00H_bit.no2
+#define DMAPR00 PR00H_bit.no3
+#define DMAPR01 PR00H_bit.no4
+#define CSIPR000 PR00H_bit.no5
+#define IICPR000 PR00H_bit.no5
+#define STPR00 PR00H_bit.no5
+#define TMPR000 PR00H_bit.no6
+#define SRPR00 PR00H_bit.no7
+#define SREPR00 PR01_bit.no0
+#define TMPR001H PR01_bit.no0
+#define CSIPR010 PR01_bit.no1
+#define IICPR010 PR01_bit.no1
+#define STPR01 PR01_bit.no1
+#define SRPR01 PR01_bit.no2
+#define SREPR01 PR01_bit.no3
+#define TMPR003H PR01_bit.no3
+#define IICAPR00 PR01_bit.no4
+#define RTITPR0 PR01_bit.no5
+#define TMPR001 PR01_bit.no7
+#define TMPR002 PR01H_bit.no0
+#define TMPR003 PR01H_bit.no1
+#define ADPR0 PR01H_bit.no2
+#define RTCPR0 PR01H_bit.no3
+#define TMKAPR0 PR01H_bit.no4
+#define KRPR0 PR01H_bit.no5
+#define STPR03 PR01H_bit.no6
+#define SRPR03 PR01H_bit.no7
+#define WDTIPR1 PR10_bit.no0
+#define LVIPR1 PR10_bit.no1
+#define PPR10 PR10_bit.no2
+#define PPR11 PR10_bit.no3
+#define PPR12 PR10_bit.no4
+#define PPR13 PR10_bit.no5
+#define PPR14 PR10_bit.no6
+#define PPR15 PR10_bit.no7
+#define STPR12 PR10H_bit.no0
+#define SRPR12 PR10H_bit.no1
+#define SREPR12 PR10H_bit.no2
+#define DMAPR10 PR10H_bit.no3
+#define DMAPR11 PR10H_bit.no4
+#define CSIPR100 PR10H_bit.no5
+#define IICPR100 PR10H_bit.no5
+#define STPR10 PR10H_bit.no5
+#define TMPR100 PR10H_bit.no6
+#define SRPR10 PR10H_bit.no7
+#define SREPR10 PR11_bit.no0
+#define TMPR101H PR11_bit.no0
+#define CSIPR110 PR11_bit.no1
+#define IICPR110 PR11_bit.no1
+#define STPR11 PR11_bit.no1
+#define SRPR11 PR11_bit.no2
+#define SREPR11 PR11_bit.no3
+#define TMPR103H PR11_bit.no3
+#define IICAPR10 PR11_bit.no4
+#define RTITPR1 PR11_bit.no5
+#define TMPR101 PR11_bit.no7
+#define TMPR102 PR11H_bit.no0
+#define TMPR103 PR11H_bit.no1
+#define ADPR1 PR11H_bit.no2
+#define RTCPR1 PR11H_bit.no3
+#define TMKAPR1 PR11H_bit.no4
+#define KRPR1 PR11H_bit.no5
+#define STPR13 PR11H_bit.no6
+#define SRPR13 PR11H_bit.no7
+#define MAA PMC_bit.no0
+
+/*
+ Interrupt vector addresses
+ */
+#define RST_vect (0x0)
+#define INTDBG_vect (0x2)
+#define INTWDTI_vect (0x4)
+#define INTLVI_vect (0x6)
+#define INTP0_vect (0x8)
+#define INTP1_vect (0xA)
+#define INTP2_vect (0xC)
+#define INTP3_vect (0xE)
+#define INTP4_vect (0x10)
+#define INTP5_vect (0x12)
+#define INTST2_vect (0x14)
+#define INTSR2_vect (0x16)
+#define INTSRE2_vect (0x18)
+#define INTDMA0_vect (0x1A)
+#define INTDMA1_vect (0x1C)
+#define INTCSI00_vect (0x1E)
+#define INTIIC00_vect (0x1E)
+#define INTST0_vect (0x1E)
+#define INTTM00_vect (0x20)
+#define INTSR0_vect (0x22)
+#define INTSRE0_vect (0x24)
+#define INTTM01H_vect (0x24)
+#define INTCSI10_vect (0x26)
+#define INTIIC10_vect (0x26)
+#define INTST1_vect (0x26)
+#define INTSR1_vect (0x28)
+#define INTSRE1_vect (0x2A)
+#define INTTM03H_vect (0x2A)
+#define INTIICA0_vect (0x2C)
+#define INTRTIT_vect (0x2E)
+#define INTTM01_vect (0x32)
+#define INTTM02_vect (0x34)
+#define INTTM03_vect (0x36)
+#define INTAD_vect (0x38)
+#define INTRTC_vect (0x3A)
+#define INTIT_vect (0x3C)
+#define INTKR_vect (0x3E)
+#define INTST3_vect (0x40)
+#define INTSR3_vect (0x42)
+#define INTTKB20_vect (0x44)
+#define INTTM04_vect (0x46)
+#define INTTM05_vect (0x48)
+#define INTP6_vect (0x4A)
+#define INTP7_vect (0x4C)
+#define INTLCD0_vect (0x4E)
+#define INTCMP0_vect (0x50)
+#define INTCMP1_vect (0x52)
+#define INTTM06_vect (0x54)
+#define INTTM07_vect (0x56)
+#define INTSRE3_vect (0x5C)
+#define INTMD_vect (0x5E)
+#define INTFL_vect (0x62)
+#define INTDMA2_vect (0x64)
+#define INTDMA3_vect (0x66)
+#define BRK_I_vect (0x7E)
+#endif
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78L13_ext.h b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78L13_ext.h
new file mode 100644
index 0000000000..dca40d06e5
--- /dev/null
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/iodefine_RL78L13_ext.h
@@ -0,0 +1,946 @@
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78L13 */
+/* FILE : iodefine_ext.h */
+/* DESCRIPTION : Definition of Extended SFRs */
+/* CPU SERIES : RL78 - L13 */
+/* CPU TYPE : R5F10WMG */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/
+
+/************************************************************************/
+/* Header file generated from device file: */
+/* DR5F10WMG.DVF */
+/* Copyright(C) 2012 Renesas */
+/* Version E1.00d */
+/************************************************************************/
+
+#ifndef __IOREG_BIT_STRUCTURES
+#define __IOREG_BIT_STRUCTURES
+typedef struct {
+ unsigned char no0 :1;
+ unsigned char no1 :1;
+ unsigned char no2 :1;
+ unsigned char no3 :1;
+ unsigned char no4 :1;
+ unsigned char no5 :1;
+ unsigned char no6 :1;
+ unsigned char no7 :1;
+} __BITS8;
+
+typedef struct {
+ unsigned short no0 :1;
+ unsigned short no1 :1;
+ unsigned short no2 :1;
+ unsigned short no3 :1;
+ unsigned short no4 :1;
+ unsigned short no5 :1;
+ unsigned short no6 :1;
+ unsigned short no7 :1;
+ unsigned short no8 :1;
+ unsigned short no9 :1;
+ unsigned short no10 :1;
+ unsigned short no11 :1;
+ unsigned short no12 :1;
+ unsigned short no13 :1;
+ unsigned short no14 :1;
+ unsigned short no15 :1;
+} __BITS16;
+
+#endif
+
+#ifndef IODEFINE_EXT_H
+#define IODEFINE_EXT_H
+
+/*
+ IO Registers
+ */
+union un_adm2 {
+ unsigned char adm2;
+ __BITS8 BIT;
+};
+union un_pu0 {
+ unsigned char pu0;
+ __BITS8 BIT;
+};
+union un_pu1 {
+ unsigned char pu1;
+ __BITS8 BIT;
+};
+union un_pu2 {
+ unsigned char pu2;
+ __BITS8 BIT;
+};
+union un_pu3 {
+ unsigned char pu3;
+ __BITS8 BIT;
+};
+union un_pu4 {
+ unsigned char pu4;
+ __BITS8 BIT;
+};
+union un_pu5 {
+ unsigned char pu5;
+ __BITS8 BIT;
+};
+union un_pu7 {
+ unsigned char pu7;
+ __BITS8 BIT;
+};
+union un_pu12 {
+ unsigned char pu12;
+ __BITS8 BIT;
+};
+union un_pu13 {
+ unsigned char pu13;
+ __BITS8 BIT;
+};
+union un_pim0 {
+ unsigned char pim0;
+ __BITS8 BIT;
+};
+union un_pim1 {
+ unsigned char pim1;
+ __BITS8 BIT;
+};
+union un_pim3 {
+ unsigned char pim3;
+ __BITS8 BIT;
+};
+union un_pim4 {
+ unsigned char pim4;
+ __BITS8 BIT;
+};
+union un_pim5 {
+ unsigned char pim5;
+ __BITS8 BIT;
+};
+union un_pom0 {
+ unsigned char pom0;
+ __BITS8 BIT;
+};
+union un_pom1 {
+ unsigned char pom1;
+ __BITS8 BIT;
+};
+union un_pom3 {
+ unsigned char pom3;
+ __BITS8 BIT;
+};
+union un_pom4 {
+ unsigned char pom4;
+ __BITS8 BIT;
+};
+union un_pom5 {
+ unsigned char pom5;
+ __BITS8 BIT;
+};
+union un_pom13 {
+ unsigned char pom13;
+ __BITS8 BIT;
+};
+union un_pmc1 {
+ unsigned char pmc1;
+ __BITS8 BIT;
+};
+union un_pmc2 {
+ unsigned char pmc2;
+ __BITS8 BIT;
+};
+union un_pmc4 {
+ unsigned char pmc4;
+ __BITS8 BIT;
+};
+union un_nfen0 {
+ unsigned char nfen0;
+ __BITS8 BIT;
+};
+union un_nfen1 {
+ unsigned char nfen1;
+ __BITS8 BIT;
+};
+union un_isc {
+ unsigned char isc;
+ __BITS8 BIT;
+};
+union un_tos {
+ unsigned char tos;
+ __BITS8 BIT;
+};
+union un_per1 {
+ unsigned char per1;
+ __BITS8 BIT;
+};
+union un_pms {
+ unsigned char pms;
+ __BITS8 BIT;
+};
+union un_dflctl {
+ unsigned char dflctl;
+ __BITS8 BIT;
+};
+union un_perz {
+ unsigned char perz;
+ __BITS8 BIT;
+};
+union un_bectl {
+ unsigned char bectl;
+ __BITS8 BIT;
+};
+union un_fsse {
+ unsigned char fsse;
+ __BITS8 BIT;
+};
+union un_pfs {
+ unsigned char pfs;
+ __BITS8 BIT;
+};
+union un_mduc {
+ unsigned char mduc;
+ __BITS8 BIT;
+};
+union un_per0 {
+ unsigned char per0;
+ __BITS8 BIT;
+};
+union un_rmc {
+ unsigned char rmc;
+ __BITS8 BIT;
+};
+union un_rpectl {
+ unsigned char rpectl;
+ __BITS8 BIT;
+};
+union un_porsr {
+ unsigned char porsr;
+ __BITS8 BIT;
+};
+union un_se0l {
+ unsigned char se0l;
+ __BITS8 BIT;
+};
+union un_ss0l {
+ unsigned char ss0l;
+ __BITS8 BIT;
+};
+union un_st0l {
+ unsigned char st0l;
+ __BITS8 BIT;
+};
+union un_soe0l {
+ unsigned char soe0l;
+ __BITS8 BIT;
+};
+union un_se1l {
+ unsigned char se1l;
+ __BITS8 BIT;
+};
+union un_ss1l {
+ unsigned char ss1l;
+ __BITS8 BIT;
+};
+union un_st1l {
+ unsigned char st1l;
+ __BITS8 BIT;
+};
+union un_soe1l {
+ unsigned char soe1l;
+ __BITS8 BIT;
+};
+union un_te0l {
+ unsigned char te0l;
+ __BITS8 BIT;
+};
+union un_ts0l {
+ unsigned char ts0l;
+ __BITS8 BIT;
+};
+union un_tt0l {
+ unsigned char tt0l;
+ __BITS8 BIT;
+};
+union un_toe0l {
+ unsigned char toe0l;
+ __BITS8 BIT;
+};
+union un_dmc2 {
+ unsigned char dmc2;
+ __BITS8 BIT;
+};
+union un_dmc3 {
+ unsigned char dmc3;
+ __BITS8 BIT;
+};
+union un_drc2 {
+ unsigned char drc2;
+ __BITS8 BIT;
+};
+union un_drc3 {
+ unsigned char drc3;
+ __BITS8 BIT;
+};
+union un_dwaitall {
+ unsigned char dwaitall;
+ __BITS8 BIT;
+};
+union un_iicctl00 {
+ unsigned char iicctl00;
+ __BITS8 BIT;
+};
+union un_iicctl01 {
+ unsigned char iicctl01;
+ __BITS8 BIT;
+};
+union un_crc0ctl {
+ unsigned char crc0ctl;
+ __BITS8 BIT;
+};
+union un_pfseg0 {
+ unsigned char pfseg0;
+ __BITS8 BIT;
+};
+union un_pfseg1 {
+ unsigned char pfseg1;
+ __BITS8 BIT;
+};
+union un_pfseg2 {
+ unsigned char pfseg2;
+ __BITS8 BIT;
+};
+union un_pfseg3 {
+ unsigned char pfseg3;
+ __BITS8 BIT;
+};
+union un_pfseg4 {
+ unsigned char pfseg4;
+ __BITS8 BIT;
+};
+union un_pfseg5 {
+ unsigned char pfseg5;
+ __BITS8 BIT;
+};
+union un_pfseg6 {
+ unsigned char pfseg6;
+ __BITS8 BIT;
+};
+union un_isclcd {
+ unsigned char isclcd;
+ __BITS8 BIT;
+};
+union un_compmdr {
+ unsigned char compmdr;
+ __BITS8 BIT;
+};
+union un_compfir {
+ unsigned char compfir;
+ __BITS8 BIT;
+};
+union un_compocr {
+ unsigned char compocr;
+ __BITS8 BIT;
+};
+union un_comptcr {
+ unsigned char comptcr;
+ __BITS8 BIT;
+};
+union un_tkbtrg0 {
+ unsigned char tkbtrg0;
+ __BITS8 BIT;
+};
+union un_tkbflg0 {
+ unsigned char tkbflg0;
+ __BITS8 BIT;
+};
+union un_tkbioc00 {
+ unsigned char tkbioc00;
+ __BITS8 BIT;
+};
+union un_tkbclr0 {
+ unsigned char tkbclr0;
+ __BITS8 BIT;
+};
+union un_tkbioc01 {
+ unsigned char tkbioc01;
+ __BITS8 BIT;
+};
+union un_tkbctl01 {
+ unsigned char tkbctl01;
+ __BITS8 BIT;
+};
+union un_tkbpahfs0 {
+ unsigned char tkbpahfs0;
+ __BITS8 BIT;
+};
+union un_tkbpahft0 {
+ unsigned char tkbpahft0;
+ __BITS8 BIT;
+};
+union un_tkbpaflg0 {
+ unsigned char tkbpaflg0;
+ __BITS8 BIT;
+};
+union un_tkbpactl02 {
+ unsigned char tkbpactl02;
+ __BITS8 BIT;
+};
+
+#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2
+#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT
+#define ADUL (*(volatile unsigned char *)0xF0011)
+#define ADLL (*(volatile unsigned char *)0xF0012)
+#define ADTES (*(volatile unsigned char *)0xF0013)
+#define LCDI (*(volatile unsigned char *)0xF001F)
+#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0
+#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT
+#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1
+#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT
+#define PU2 (*(volatile union un_pu2 *)0xF0032).pu2
+#define PU2_bit (*(volatile union un_pu2 *)0xF0032).BIT
+#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3
+#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT
+#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4
+#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT
+#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5
+#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT
+#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7
+#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT
+#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12
+#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT
+#define PU13 (*(volatile union un_pu13 *)0xF003D).pu13
+#define PU13_bit (*(volatile union un_pu13 *)0xF003D).BIT
+#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0
+#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT
+#define PIM1 (*(volatile union un_pim1 *)0xF0041).pim1
+#define PIM1_bit (*(volatile union un_pim1 *)0xF0041).BIT
+#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3
+#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT
+#define PIM4 (*(volatile union un_pim4 *)0xF0044).pim4
+#define PIM4_bit (*(volatile union un_pim4 *)0xF0044).BIT
+#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5
+#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT
+#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0
+#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT
+#define POM1 (*(volatile union un_pom1 *)0xF0051).pom1
+#define POM1_bit (*(volatile union un_pom1 *)0xF0051).BIT
+#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3
+#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT
+#define POM4 (*(volatile union un_pom4 *)0xF0054).pom4
+#define POM4_bit (*(volatile union un_pom4 *)0xF0054).BIT
+#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5
+#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT
+#define POM13 (*(volatile union un_pom13 *)0xF005D).pom13
+#define POM13_bit (*(volatile union un_pom13 *)0xF005D).BIT
+#define PMC1 (*(volatile union un_pmc1 *)0xF0061).pmc1
+#define PMC1_bit (*(volatile union un_pmc1 *)0xF0061).BIT
+#define PMC2 (*(volatile union un_pmc2 *)0xF0062).pmc2
+#define PMC2_bit (*(volatile union un_pmc2 *)0xF0062).BIT
+#define PMC4 (*(volatile union un_pmc4 *)0xF0064).pmc4
+#define PMC4_bit (*(volatile union un_pmc4 *)0xF0064).BIT
+#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0
+#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT
+#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1
+#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT
+#define ISC (*(volatile union un_isc *)0xF0073).isc
+#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT
+#define TIS0 (*(volatile unsigned char *)0xF0074)
+#define ADPC (*(volatile unsigned char *)0xF0076)
+#define PIOR (*(volatile unsigned char *)0xF0077)
+#define IAWCTL (*(volatile unsigned char *)0xF0078)
+#define TOS (*(volatile union un_tos *)0xF0079).tos
+#define TOS_bit (*(volatile union un_tos *)0xF0079).BIT
+#define PER1 (*(volatile union un_per1 *)0xF007A).per1
+#define PER1_bit (*(volatile union un_per1 *)0xF007A).BIT
+#define PMS (*(volatile union un_pms *)0xF007B).pms
+#define PMS_bit (*(volatile union un_pms *)0xF007B).BIT
+#define PWCTKB (*(volatile unsigned char *)0xF007C)
+#define PRDSEL (*(volatile unsigned short *)0xF007E)
+#define TOOLEN (*(volatile unsigned char *)0xF0080)
+#define BPAL0 (*(volatile unsigned char *)0xF0081)
+#define BPAH0 (*(volatile unsigned char *)0xF0082)
+#define BPAS0 (*(volatile unsigned char *)0xF0083)
+#define BACDVL0 (*(volatile unsigned char *)0xF0084)
+#define BACDVH0 (*(volatile unsigned char *)0xF0085)
+#define BACDML0 (*(volatile unsigned char *)0xF0086)
+#define BACDMH0 (*(volatile unsigned char *)0xF0087)
+#define MONMOD (*(volatile unsigned char *)0xF0088)
+#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl
+#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT
+#define PERZ (*(volatile union un_perz *)0xF009F).perz
+#define PERZ_bit (*(volatile union un_perz *)0xF009F).BIT
+#define HIOTRM (*(volatile unsigned char *)0xF00A0)
+#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl
+#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT
+#define HOCODIV (*(volatile unsigned char *)0xF00A8)
+#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC)
+#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD)
+#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE)
+#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF)
+#define FLSEC (*(volatile unsigned short *)0xF00B0)
+#define FLFSWS (*(volatile unsigned short *)0xF00B2)
+#define FLFSWE (*(volatile unsigned short *)0xF00B4)
+#define FSSET (*(volatile unsigned char *)0xF00B6)
+#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse
+#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT
+#define FLFADL (*(volatile unsigned short *)0xF00B8)
+#define FLFADH (*(volatile unsigned char *)0xF00BA)
+#define PFCMD (*(volatile unsigned char *)0xF00C0)
+#define PFS (*(volatile union un_pfs *)0xF00C1).pfs
+#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT
+#define FLRL (*(volatile unsigned short *)0xF00C2)
+#define FLRH (*(volatile unsigned short *)0xF00C4)
+#define FLWE (*(volatile unsigned char *)0xF00C6)
+#define FLRE (*(volatile unsigned char *)0xF00C7)
+#define FLTMS (*(volatile unsigned short *)0xF00C8)
+#define DFLMC (*(volatile unsigned short *)0xF00CA)
+#define FLMCL (*(volatile unsigned short *)0xF00CC)
+#define FLMCH (*(volatile unsigned char *)0xF00CE)
+#define FSCTL (*(volatile unsigned char *)0xF00CF)
+#define ICEADR (*(volatile unsigned short *)0xF00D0)
+#define ICEDAT (*(volatile unsigned short *)0xF00D2)
+#define MDCL (*(volatile unsigned short *)0xF00E0)
+#define MDCH (*(volatile unsigned short *)0xF00E2)
+#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc
+#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT
+#define PER0 (*(volatile union un_per0 *)0xF00F0).per0
+#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT
+#define OSMC (*(volatile unsigned char *)0xF00F3)
+#define RMC (*(volatile union un_rmc *)0xF00F4).rmc
+#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT
+#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl
+#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT
+#define PORSR (*(volatile union un_porsr *)0xF00F9).porsr
+#define PORSR_bit (*(volatile union un_porsr *)0xF00F9).BIT
+#define BCDADJ (*(volatile unsigned char *)0xF00FE)
+#define VECTCTRL (*(volatile unsigned char *)0xF00FF)
+#define SSR00 (*(volatile unsigned short *)0xF0100)
+#define SSR00L (*(volatile unsigned char *)0xF0100)
+#define SSR01 (*(volatile unsigned short *)0xF0102)
+#define SSR01L (*(volatile unsigned char *)0xF0102)
+#define SSR02 (*(volatile unsigned short *)0xF0104)
+#define SSR02L (*(volatile unsigned char *)0xF0104)
+#define SSR03 (*(volatile unsigned short *)0xF0106)
+#define SSR03L (*(volatile unsigned char *)0xF0106)
+#define SIR00 (*(volatile unsigned short *)0xF0108)
+#define SIR00L (*(volatile unsigned char *)0xF0108)
+#define SIR01 (*(volatile unsigned short *)0xF010A)
+#define SIR01L (*(volatile unsigned char *)0xF010A)
+#define SIR02 (*(volatile unsigned short *)0xF010C)
+#define SIR02L (*(volatile unsigned char *)0xF010C)
+#define SIR03 (*(volatile unsigned short *)0xF010E)
+#define SIR03L (*(volatile unsigned char *)0xF010E)
+#define SMR00 (*(volatile unsigned short *)0xF0110)
+#define SMR01 (*(volatile unsigned short *)0xF0112)
+#define SMR02 (*(volatile unsigned short *)0xF0114)
+#define SMR03 (*(volatile unsigned short *)0xF0116)
+#define SCR00 (*(volatile unsigned short *)0xF0118)
+#define SCR01 (*(volatile unsigned short *)0xF011A)
+#define SCR02 (*(volatile unsigned short *)0xF011C)
+#define SCR03 (*(volatile unsigned short *)0xF011E)
+#define SE0 (*(volatile unsigned short *)0xF0120)
+#define SE0L (*(volatile union un_se0l *)0xF0120).se0l
+#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT
+#define SS0 (*(volatile unsigned short *)0xF0122)
+#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l
+#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT
+#define ST0 (*(volatile unsigned short *)0xF0124)
+#define ST0L (*(volatile union un_st0l *)0xF0124).st0l
+#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT
+#define SPS0 (*(volatile unsigned short *)0xF0126)
+#define SPS0L (*(volatile unsigned char *)0xF0126)
+#define SO0 (*(volatile unsigned short *)0xF0128)
+#define SOE0 (*(volatile unsigned short *)0xF012A)
+#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l
+#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT
+#define EDR00 (*(volatile unsigned short *)0xF012C)
+#define EDR00L (*(volatile unsigned char *)0xF012C)
+#define EDR01 (*(volatile unsigned short *)0xF012E)
+#define EDR01L (*(volatile unsigned char *)0xF012E)
+#define EDR02 (*(volatile unsigned short *)0xF0130)
+#define EDR02L (*(volatile unsigned char *)0xF0130)
+#define EDR03 (*(volatile unsigned short *)0xF0132)
+#define EDR03L (*(volatile unsigned char *)0xF0132)
+#define SOL0 (*(volatile unsigned short *)0xF0134)
+#define SOL0L (*(volatile unsigned char *)0xF0134)
+#define SSC0 (*(volatile unsigned short *)0xF0138)
+#define SSC0L (*(volatile unsigned char *)0xF0138)
+#define SSR10 (*(volatile unsigned short *)0xF0140)
+#define SSR10L (*(volatile unsigned char *)0xF0140)
+#define SSR11 (*(volatile unsigned short *)0xF0142)
+#define SSR11L (*(volatile unsigned char *)0xF0142)
+#define SSR12 (*(volatile unsigned short *)0xF0144)
+#define SSR12L (*(volatile unsigned char *)0xF0144)
+#define SSR13 (*(volatile unsigned short *)0xF0146)
+#define SSR13L (*(volatile unsigned char *)0xF0146)
+#define SIR10 (*(volatile unsigned short *)0xF0148)
+#define SIR10L (*(volatile unsigned char *)0xF0148)
+#define SIR11 (*(volatile unsigned short *)0xF014A)
+#define SIR11L (*(volatile unsigned char *)0xF014A)
+#define SIR12 (*(volatile unsigned short *)0xF014C)
+#define SIR12L (*(volatile unsigned char *)0xF014C)
+#define SIR13 (*(volatile unsigned short *)0xF014E)
+#define SIR13L (*(volatile unsigned char *)0xF014E)
+#define SMR10 (*(volatile unsigned short *)0xF0150)
+#define SMR11 (*(volatile unsigned short *)0xF0152)
+#define SMR12 (*(volatile unsigned short *)0xF0154)
+#define SMR13 (*(volatile unsigned short *)0xF0156)
+#define SCR10 (*(volatile unsigned short *)0xF0158)
+#define SCR11 (*(volatile unsigned short *)0xF015A)
+#define SCR12 (*(volatile unsigned short *)0xF015C)
+#define SCR13 (*(volatile unsigned short *)0xF015E)
+#define SE1 (*(volatile unsigned short *)0xF0160)
+#define SE1L (*(volatile union un_se1l *)0xF0160).se1l
+#define SE1L_bit (*(volatile union un_se1l *)0xF0160).BIT
+#define SS1 (*(volatile unsigned short *)0xF0162)
+#define SS1L (*(volatile union un_ss1l *)0xF0162).ss1l
+#define SS1L_bit (*(volatile union un_ss1l *)0xF0162).BIT
+#define ST1 (*(volatile unsigned short *)0xF0164)
+#define ST1L (*(volatile union un_st1l *)0xF0164).st1l
+#define ST1L_bit (*(volatile union un_st1l *)0xF0164).BIT
+#define SPS1 (*(volatile unsigned short *)0xF0166)
+#define SPS1L (*(volatile unsigned char *)0xF0166)
+#define SO1 (*(volatile unsigned short *)0xF0168)
+#define SOE1 (*(volatile unsigned short *)0xF016A)
+#define SOE1L (*(volatile union un_soe1l *)0xF016A).soe1l
+#define SOE1L_bit (*(volatile union un_soe1l *)0xF016A).BIT
+#define EDR10 (*(volatile unsigned short *)0xF016C)
+#define EDR10L (*(volatile unsigned char *)0xF016C)
+#define EDR11 (*(volatile unsigned short *)0xF016E)
+#define EDR11L (*(volatile unsigned char *)0xF016E)
+#define EDR12 (*(volatile unsigned short *)0xF0170)
+#define EDR12L (*(volatile unsigned char *)0xF0170)
+#define EDR13 (*(volatile unsigned short *)0xF0172)
+#define EDR13L (*(volatile unsigned char *)0xF0172)
+#define SOL1 (*(volatile unsigned short *)0xF0174)
+#define SOL1L (*(volatile unsigned char *)0xF0174)
+#define SSC1 (*(volatile unsigned short *)0xF0178)
+#define SSC1L (*(volatile unsigned char *)0xF0178)
+#define TCR00 (*(volatile unsigned short *)0xF0180)
+#define TCR01 (*(volatile unsigned short *)0xF0182)
+#define TCR02 (*(volatile unsigned short *)0xF0184)
+#define TCR03 (*(volatile unsigned short *)0xF0186)
+#define TCR04 (*(volatile unsigned short *)0xF0188)
+#define TCR05 (*(volatile unsigned short *)0xF018A)
+#define TCR06 (*(volatile unsigned short *)0xF018C)
+#define TCR07 (*(volatile unsigned short *)0xF018E)
+#define TMR00 (*(volatile unsigned short *)0xF0190)
+#define TMR01 (*(volatile unsigned short *)0xF0192)
+#define TMR02 (*(volatile unsigned short *)0xF0194)
+#define TMR03 (*(volatile unsigned short *)0xF0196)
+#define TMR04 (*(volatile unsigned short *)0xF0198)
+#define TMR05 (*(volatile unsigned short *)0xF019A)
+#define TMR06 (*(volatile unsigned short *)0xF019C)
+#define TMR07 (*(volatile unsigned short *)0xF019E)
+#define TSR00 (*(volatile unsigned short *)0xF01A0)
+#define TSR00L (*(volatile unsigned char *)0xF01A0)
+#define TSR01 (*(volatile unsigned short *)0xF01A2)
+#define TSR01L (*(volatile unsigned char *)0xF01A2)
+#define TSR02 (*(volatile unsigned short *)0xF01A4)
+#define TSR02L (*(volatile unsigned char *)0xF01A4)
+#define TSR03 (*(volatile unsigned short *)0xF01A6)
+#define TSR03L (*(volatile unsigned char *)0xF01A6)
+#define TSR04 (*(volatile unsigned short *)0xF01A8)
+#define TSR04L (*(volatile unsigned char *)0xF01A8)
+#define TSR05 (*(volatile unsigned short *)0xF01AA)
+#define TSR05L (*(volatile unsigned char *)0xF01AA)
+#define TSR06 (*(volatile unsigned short *)0xF01AC)
+#define TSR06L (*(volatile unsigned char *)0xF01AC)
+#define TSR07 (*(volatile unsigned short *)0xF01AE)
+#define TSR07L (*(volatile unsigned char *)0xF01AE)
+#define TE0 (*(volatile unsigned short *)0xF01B0)
+#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l
+#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT
+#define TS0 (*(volatile unsigned short *)0xF01B2)
+#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l
+#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT
+#define TT0 (*(volatile unsigned short *)0xF01B4)
+#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l
+#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT
+#define TPS0 (*(volatile unsigned short *)0xF01B6)
+#define TO0 (*(volatile unsigned short *)0xF01B8)
+#define TO0L (*(volatile unsigned char *)0xF01B8)
+#define TOE0 (*(volatile unsigned short *)0xF01BA)
+#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l
+#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT
+#define TOL0 (*(volatile unsigned short *)0xF01BC)
+#define TOL0L (*(volatile unsigned char *)0xF01BC)
+#define TOM0 (*(volatile unsigned short *)0xF01BE)
+#define TOM0L (*(volatile unsigned char *)0xF01BE)
+#define DSA2 (*(volatile unsigned char *)0xF0200)
+#define DSA3 (*(volatile unsigned char *)0xF0201)
+#define DRA2 (*(volatile unsigned short *)0xF0202)
+#define DRA2L (*(volatile unsigned char *)0xF0202)
+#define DRA2H (*(volatile unsigned char *)0xF0203)
+#define DRA3 (*(volatile unsigned short *)0xF0204)
+#define DRA3L (*(volatile unsigned char *)0xF0204)
+#define DRA3H (*(volatile unsigned char *)0xF0205)
+#define DBC2 (*(volatile unsigned short *)0xF0206)
+#define DBC2L (*(volatile unsigned char *)0xF0206)
+#define DBC2H (*(volatile unsigned char *)0xF0207)
+#define DBC3 (*(volatile unsigned short *)0xF0208)
+#define DBC3L (*(volatile unsigned char *)0xF0208)
+#define DBC3H (*(volatile unsigned char *)0xF0209)
+#define DMC2 (*(volatile union un_dmc2 *)0xF020A).dmc2
+#define DMC2_bit (*(volatile union un_dmc2 *)0xF020A).BIT
+#define DMC3 (*(volatile union un_dmc3 *)0xF020B).dmc3
+#define DMC3_bit (*(volatile union un_dmc3 *)0xF020B).BIT
+#define DRC2 (*(volatile union un_drc2 *)0xF020C).drc2
+#define DRC2_bit (*(volatile union un_drc2 *)0xF020C).BIT
+#define DRC3 (*(volatile union un_drc3 *)0xF020D).drc3
+#define DRC3_bit (*(volatile union un_drc3 *)0xF020D).BIT
+#define DWAITALL (*(volatile union un_dwaitall *)0xF020F).dwaitall
+#define DWAITALL_bit (*(volatile union un_dwaitall *)0xF020F).BIT
+#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00
+#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT
+#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01
+#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT
+#define IICWL0 (*(volatile unsigned char *)0xF0232)
+#define IICWH0 (*(volatile unsigned char *)0xF0233)
+#define SVA0 (*(volatile unsigned char *)0xF0234)
+#define IICSE0 (*(volatile unsigned char *)0xF0235)
+#define ELSELR00 (*(volatile unsigned char *)0xF0240)
+#define ELSELR01 (*(volatile unsigned char *)0xF0241)
+#define ELSELR02 (*(volatile unsigned char *)0xF0242)
+#define ELSELR03 (*(volatile unsigned char *)0xF0243)
+#define ELSELR04 (*(volatile unsigned char *)0xF0244)
+#define ELSELR05 (*(volatile unsigned char *)0xF0245)
+#define ELSELR06 (*(volatile unsigned char *)0xF0246)
+#define ELSELR07 (*(volatile unsigned char *)0xF0247)
+#define ELSELR08 (*(volatile unsigned char *)0xF0248)
+#define ELSELR09 (*(volatile unsigned char *)0xF0249)
+#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl
+#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT
+#define PGCRCL (*(volatile unsigned short *)0xF02F2)
+#define CRCD (*(volatile unsigned short *)0xF02FA)
+#define PFSEG0 (*(volatile union un_pfseg0 *)0xF0300).pfseg0
+#define PFSEG0_bit (*(volatile union un_pfseg0 *)0xF0300).BIT
+#define PFSEG1 (*(volatile union un_pfseg1 *)0xF0301).pfseg1
+#define PFSEG1_bit (*(volatile union un_pfseg1 *)0xF0301).BIT
+#define PFSEG2 (*(volatile union un_pfseg2 *)0xF0302).pfseg2
+#define PFSEG2_bit (*(volatile union un_pfseg2 *)0xF0302).BIT
+#define PFSEG3 (*(volatile union un_pfseg3 *)0xF0303).pfseg3
+#define PFSEG3_bit (*(volatile union un_pfseg3 *)0xF0303).BIT
+#define PFSEG4 (*(volatile union un_pfseg4 *)0xF0304).pfseg4
+#define PFSEG4_bit (*(volatile union un_pfseg4 *)0xF0304).BIT
+#define PFSEG5 (*(volatile union un_pfseg5 *)0xF0305).pfseg5
+#define PFSEG5_bit (*(volatile union un_pfseg5 *)0xF0305).BIT
+#define PFSEG6 (*(volatile union un_pfseg6 *)0xF0306).pfseg6
+#define PFSEG6_bit (*(volatile union un_pfseg6 *)0xF0306).BIT
+#define ISCLCD (*(volatile union un_isclcd *)0xF0308).isclcd
+#define ISCLCD_bit (*(volatile union un_isclcd *)0xF0308).BIT
+#define SUBCUD (*(volatile unsigned short *)0xF0310)
+#define COMPMDR (*(volatile union un_compmdr *)0xF0340).compmdr
+#define COMPMDR_bit (*(volatile union un_compmdr *)0xF0340).BIT
+#define COMPFIR (*(volatile union un_compfir *)0xF0341).compfir
+#define COMPFIR_bit (*(volatile union un_compfir *)0xF0341).BIT
+#define COMPOCR (*(volatile union un_compocr *)0xF0342).compocr
+#define COMPOCR_bit (*(volatile union un_compocr *)0xF0342).BIT
+#define COMPTCR (*(volatile union un_comptcr *)0xF0343).comptcr
+#define COMPTCR_bit (*(volatile union un_comptcr *)0xF0343).BIT
+#define SEG0 (*(volatile unsigned char *)0xF0400)
+#define SEG1 (*(volatile unsigned char *)0xF0401)
+#define SEG2 (*(volatile unsigned char *)0xF0402)
+#define SEG3 (*(volatile unsigned char *)0xF0403)
+#define SEG4 (*(volatile unsigned char *)0xF0404)
+#define SEG5 (*(volatile unsigned char *)0xF0405)
+#define SEG6 (*(volatile unsigned char *)0xF0406)
+#define SEG7 (*(volatile unsigned char *)0xF0407)
+#define SEG8 (*(volatile unsigned char *)0xF0408)
+#define SEG9 (*(volatile unsigned char *)0xF0409)
+#define SEG10 (*(volatile unsigned char *)0xF040A)
+#define SEG11 (*(volatile unsigned char *)0xF040B)
+#define SEG12 (*(volatile unsigned char *)0xF040C)
+#define SEG13 (*(volatile unsigned char *)0xF040D)
+#define SEG14 (*(volatile unsigned char *)0xF040E)
+#define SEG15 (*(volatile unsigned char *)0xF040F)
+#define SEG16 (*(volatile unsigned char *)0xF0410)
+#define SEG17 (*(volatile unsigned char *)0xF0411)
+#define SEG18 (*(volatile unsigned char *)0xF0412)
+#define SEG19 (*(volatile unsigned char *)0xF0413)
+#define SEG20 (*(volatile unsigned char *)0xF0414)
+#define SEG21 (*(volatile unsigned char *)0xF0415)
+#define SEG22 (*(volatile unsigned char *)0xF0416)
+#define SEG23 (*(volatile unsigned char *)0xF0417)
+#define SEG24 (*(volatile unsigned char *)0xF0418)
+#define SEG25 (*(volatile unsigned char *)0xF0419)
+#define SEG26 (*(volatile unsigned char *)0xF041A)
+#define SEG27 (*(volatile unsigned char *)0xF041B)
+#define SEG28 (*(volatile unsigned char *)0xF041C)
+#define SEG29 (*(volatile unsigned char *)0xF041D)
+#define SEG30 (*(volatile unsigned char *)0xF041E)
+#define SEG31 (*(volatile unsigned char *)0xF041F)
+#define SEG32 (*(volatile unsigned char *)0xF0420)
+#define SEG33 (*(volatile unsigned char *)0xF0421)
+#define SEG34 (*(volatile unsigned char *)0xF0422)
+#define SEG35 (*(volatile unsigned char *)0xF0423)
+#define SEG36 (*(volatile unsigned char *)0xF0424)
+#define SEG37 (*(volatile unsigned char *)0xF0425)
+#define SEG38 (*(volatile unsigned char *)0xF0426)
+#define SEG39 (*(volatile unsigned char *)0xF0427)
+#define SEG40 (*(volatile unsigned char *)0xF0428)
+#define SEG41 (*(volatile unsigned char *)0xF0429)
+#define SEG42 (*(volatile unsigned char *)0xF042A)
+#define SEG43 (*(volatile unsigned char *)0xF042B)
+#define SEG44 (*(volatile unsigned char *)0xF042C)
+#define SEG45 (*(volatile unsigned char *)0xF042D)
+#define SEG46 (*(volatile unsigned char *)0xF042E)
+#define SEG47 (*(volatile unsigned char *)0xF042F)
+#define SEG48 (*(volatile unsigned char *)0xF0430)
+#define SEG49 (*(volatile unsigned char *)0xF0431)
+#define SEG50 (*(volatile unsigned char *)0xF0432)
+#define SEG51 (*(volatile unsigned char *)0xF0433)
+#define SEG52 (*(volatile unsigned char *)0xF0434)
+#define SEG53 (*(volatile unsigned char *)0xF0435)
+#define SEG54 (*(volatile unsigned char *)0xF0436)
+#define SEG55 (*(volatile unsigned char *)0xF0437)
+#define TKBCR00 (*(volatile unsigned short *)0xF0500)
+#define TKBCR01 (*(volatile unsigned short *)0xF0502)
+#define TKBCR02 (*(volatile unsigned short *)0xF0504)
+#define TKBCR03 (*(volatile unsigned short *)0xF0506)
+#define TKBTGCR0 (*(volatile unsigned short *)0xF0508)
+#define TKBSIR00 (*(volatile unsigned short *)0xF050A)
+#define TKBSIR01 (*(volatile unsigned short *)0xF050C)
+#define TKBDNR00 (*(volatile unsigned char *)0xF050E)
+#define TKBSSR00 (*(volatile unsigned char *)0xF050F)
+#define TKBDNR01 (*(volatile unsigned char *)0xF0510)
+#define TKBSSR01 (*(volatile unsigned char *)0xF0511)
+#define TKBTRG0 (*(volatile union un_tkbtrg0 *)0xF0512).tkbtrg0
+#define TKBTRG0_bit (*(volatile union un_tkbtrg0 *)0xF0512).BIT
+#define TKBFLG0 (*(volatile union un_tkbflg0 *)0xF0513).tkbflg0
+#define TKBFLG0_bit (*(volatile union un_tkbflg0 *)0xF0513).BIT
+#define TKBCRLD00 (*(volatile unsigned short *)0xF0514)
+#define TKBCRLD01 (*(volatile unsigned short *)0xF0516)
+#define TKBCNT0 (*(volatile unsigned short *)0xF0520)
+#define TKBCTL00 (*(volatile unsigned short *)0xF0522)
+#define TKBMFR0 (*(volatile unsigned short *)0xF0524)
+#define TKBIOC00 (*(volatile union un_tkbioc00 *)0xF0526).tkbioc00
+#define TKBIOC00_bit (*(volatile union un_tkbioc00 *)0xF0526).BIT
+#define TKBCLR0 (*(volatile union un_tkbclr0 *)0xF0527).tkbclr0
+#define TKBCLR0_bit (*(volatile union un_tkbclr0 *)0xF0527).BIT
+#define TKBIOC01 (*(volatile union un_tkbioc01 *)0xF0528).tkbioc01
+#define TKBIOC01_bit (*(volatile union un_tkbioc01 *)0xF0528).BIT
+#define TKBCTL01 (*(volatile union un_tkbctl01 *)0xF0529).tkbctl01
+#define TKBCTL01_bit (*(volatile union un_tkbctl01 *)0xF0529).BIT
+#define TKBPSCS0 (*(volatile unsigned char *)0xF052A)
+#define TKBPACTL00 (*(volatile unsigned short *)0xF0530)
+#define TKBPACTL01 (*(volatile unsigned short *)0xF0532)
+#define TKBPAHFS0 (*(volatile union un_tkbpahfs0 *)0xF0534).tkbpahfs0
+#define TKBPAHFS0_bit (*(volatile union un_tkbpahfs0 *)0xF0534).BIT
+#define TKBPAHFT0 (*(volatile union un_tkbpahft0 *)0xF0535).tkbpahft0
+#define TKBPAHFT0_bit (*(volatile union un_tkbpahft0 *)0xF0535).BIT
+#define TKBPAFLG0 (*(volatile union un_tkbpaflg0 *)0xF0536).tkbpaflg0
+#define TKBPAFLG0_bit (*(volatile union un_tkbpaflg0 *)0xF0536).BIT
+#define TKBPACTL02 (*(volatile union un_tkbpactl02 *)0xF0537).tkbpactl02
+#define TKBPACTL02_bit (*(volatile union un_tkbpactl02 *)0xF0537).BIT
+
+/*
+ Sfr bits
+ */
+#define ADTYP ADM2_bit.no0
+#define AWC ADM2_bit.no2
+#define ADRCK ADM2_bit.no3
+#define TOS0 TOS_bit.no0
+#define TKB2EN PER1_bit.no4
+#define CMPEN PER1_bit.no5
+#define TMKAEN PER1_bit.no7
+#define DFLEN DFLCTL_bit.no0
+#define FSUBEN PERZ_bit.no7
+#define BRSAM BECTL_bit.no0
+#define ESQST FSSE_bit.no7
+#define DIVST MDUC_bit.no0
+#define MACSF MDUC_bit.no1
+#define MACOF MDUC_bit.no2
+#define MDSM MDUC_bit.no3
+#define MACMODE MDUC_bit.no6
+#define DIVMODE MDUC_bit.no7
+#define TAU0EN PER0_bit.no0
+#define SAU0EN PER0_bit.no2
+#define SAU1EN PER0_bit.no3
+#define IICA0EN PER0_bit.no4
+#define ADCEN PER0_bit.no5
+#define RTCWEN PER0_bit.no7
+#define PAENB RMC_bit.no0
+#define WDVOL RMC_bit.no7
+#define RPEF RPECTL_bit.no0
+#define RPERDIS RPECTL_bit.no7
+#define DWAIT2 DMC2_bit.no4
+#define DS2 DMC2_bit.no5
+#define DRS2 DMC2_bit.no6
+#define STG2 DMC2_bit.no7
+#define DWAIT3 DMC3_bit.no4
+#define DS3 DMC3_bit.no5
+#define DRS3 DMC3_bit.no6
+#define STG3 DMC3_bit.no7
+#define DST2 DRC2_bit.no0
+#define DEN2 DRC2_bit.no7
+#define DST3 DRC3_bit.no0
+#define DEN3 DRC3_bit.no7
+#define DWAITALL0 DWAITALL_bit.no0
+#define PRVARI DWAITALL_bit.no7
+#define SPT0 IICCTL00_bit.no0
+#define STT0 IICCTL00_bit.no1
+#define ACKE0 IICCTL00_bit.no2
+#define WTIM0 IICCTL00_bit.no3
+#define SPIE0 IICCTL00_bit.no4
+#define WREL0 IICCTL00_bit.no5
+#define LREL0 IICCTL00_bit.no6
+#define IICE0 IICCTL00_bit.no7
+#define PRS0 IICCTL01_bit.no0
+#define DFC0 IICCTL01_bit.no2
+#define SMC0 IICCTL01_bit.no3
+#define DAD0 IICCTL01_bit.no4
+#define CLD0 IICCTL01_bit.no5
+#define WUP0 IICCTL01_bit.no7
+#define CRC0EN CRC0CTL_bit.no7
+#define C0ENB COMPMDR_bit.no0
+#define C0MON COMPMDR_bit.no3
+#define C1ENB COMPMDR_bit.no4
+#define C1MON COMPMDR_bit.no7
+#define C0IE COMPOCR_bit.no0
+#define C0OE COMPOCR_bit.no1
+#define C0OP COMPOCR_bit.no2
+#define C1IE COMPOCR_bit.no4
+#define C1OE COMPOCR_bit.no5
+#define C1OP COMPOCR_bit.no6
+#define SPDMD COMPOCR_bit.no7
+#define TKBRDT0 TKBTRG0_bit.no0
+#define TKBRSF0 TKBFLG0_bit.no0
+#define TKBMFF0 TKBFLG0_bit.no1
+#define TKBIEF0 TKBFLG0_bit.no2
+#define TKBIRF0 TKBFLG0_bit.no3
+#define TKBSEF00 TKBFLG0_bit.no4
+#define TKBSEF01 TKBFLG0_bit.no5
+#define TKBSSF00 TKBFLG0_bit.no6
+#define TKBSSF01 TKBFLG0_bit.no7
+#define TKBTOD00 TKBIOC00_bit.no0
+#define TKBTOD01 TKBIOC00_bit.no1
+#define TKBTOL00 TKBIOC00_bit.no2
+#define TKBTOL01 TKBIOC00_bit.no3
+#define TKBCLMF0 TKBCLR0_bit.no1
+#define TKBCLIE0 TKBCLR0_bit.no2
+#define TKBCLIR0 TKBCLR0_bit.no3
+#define TKBCLSE00 TKBCLR0_bit.no4
+#define TKBCLSE01 TKBCLR0_bit.no5
+#define TKBTOE00 TKBIOC01_bit.no0
+#define TKBTOE01 TKBIOC01_bit.no1
+#define TKBCE0 TKBCTL01_bit.no7
+#define TKBPAHTS00 TKBPAHFS0_bit.no0
+#define TKBPAHTS01 TKBPAHFS0_bit.no1
+#define TKBPAHTT00 TKBPAHFT0_bit.no0
+#define TKBPAHTT01 TKBPAHFT0_bit.no1
+#define TKBPAHIF00 TKBPAFLG0_bit.no0
+#define TKBPAFIF00 TKBPAFLG0_bit.no1
+#define TKBPAHIF01 TKBPAFLG0_bit.no2
+#define TKBPAFIF01 TKBPAFLG0_bit.no3
+#define TKBPAHSF00 TKBPAFLG0_bit.no4
+#define TKBPAFSF00 TKBPAFLG0_bit.no5
+#define TKBPAHSF01 TKBPAFLG0_bit.no6
+#define TKBPAFSF01 TKBPAFLG0_bit.no7
+#define TKBPACE00 TKBPACTL02_bit.no0
+#define TKBPACE01 TKBPACTL02_bit.no1
+
+/*
+ Interrupt vector addresses
+ */
+#endif
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main.c
index 9e77569478..19ba34cdfd 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main.c
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main.c
@@ -103,7 +103,7 @@
/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,
or 0 to run the more comprehensive test and demo application. */
-#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1
/*-----------------------------------------------------------*/
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_blinky.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_blinky.c
index 35890528f8..78df194031 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_blinky.c
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_blinky.c
@@ -119,9 +119,7 @@
#include "semphr.h"
/* Eval board specific definitions. */
-#include "port_iodefine.h"
-#include "port_iodefine_ext.h"
-#include "LED.h"
+#include "demo_specific_io.h"
/* Priorities at which the tasks are created. */
#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_full.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_full.c
index 88fdc2673d..80b2a2ed17 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_full.c
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/main_full.c
@@ -137,9 +137,7 @@
#include "blocktim.h"
/* Hardware includes. */
-#include "port_iodefine.h"
-#include "port_iodefine_ext.h"
-#include "LED.h"
+#include "demo_specific_io.h"
/* The period at which the check timer will expire, in ms, provided no errors
have been reported by any of the standard demo tasks. ms are converted to the
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/reset_program.asm b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/reset_program.asm
index b0ee436521..5aa6cedf5b 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/reset_program.asm
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/reset_program.asm
@@ -10,8 +10,6 @@
/* */
/***********************************************************************/
-
-
/*reset_program.asm*/
.list
diff --git a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/vector_table.c b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/vector_table.c
index 7b4496dee6..f891b89a08 100644
--- a/FreeRTOS/Demo/RL78_E2Studio_GCC/src/vector_table.c
+++ b/FreeRTOS/Demo/RL78_E2Studio_GCC/src/vector_table.c
@@ -6,16 +6,21 @@
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
-/* This file is generated by e2studio. */
+/* This file is generated by e2studio. */
/* */
/***********************************************************************/
-
-#include "interrupt_handlers.h"
+
+#include "FreeRTOS.h"
extern void PowerON_Reset( void );
extern void vPortTickISR( void );
extern void vPortYield( void );
+void Dummy_Handler( void ) __attribute__((interrupt));
+void Dummy_Handler( void )
+{
+}
+
const unsigned char Option_Bytes[] __attribute__ ((section (".option_bytes"))) = {
0x6e, 0xff, 0xe8, 0x85
};
@@ -32,102 +37,110 @@ const void *HardwareVectors[] VEC = {
#define VECT_SECT __attribute__ ((section (".vects")))
const void *Vectors[] VECT_SECT = {
- //INT_SRO/INT_WDTI (0x4)
- INT_WDTI,
- //INT_LVI (0x6)
- INT_LVI,
- //INT_P0 (0x8)
- INT_P0,
- //INT_P1 (0xA)
- INT_P1,
- //INT_P2 (0xC)
- INT_P2,
- //INT_P3 (0xE)
- INT_P3,
- //INT_P4 (0x10)
- INT_P4,
- //INT_P5 (0x12)
- INT_P5,
- //INT_CSI20/INT_IIC20/INT_ST2 (0x14)
- INT_ST2,
- //INT_CSI21/INT_IIC21/INT_SR2 (0x16)
- INT_SR2,
- //INT_SRE2/INT_TM11H (0x18)
- INT_TM11H,
+ //(0x4)
+ Dummy_Handler,
+ //(0x6)
+ Dummy_Handler,
+ //(0x8)
+ Dummy_Handler,
+ //(0xA)
+ Dummy_Handler,
+ //(0xC)
+ Dummy_Handler,
+ //(0xE)
+ Dummy_Handler,
+ //(0x10)
+ Dummy_Handler,
+ //(0x12)
+ Dummy_Handler,
+ //(0x14)
+ Dummy_Handler,
+ //(0x16)
+ Dummy_Handler,
+ //(0x18)
+ Dummy_Handler,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
- //INT_CSI00/INT_IIC00/INT_ST0 (0x1E)
- INT_ST0,
- //INT_CSI01/INT_IIC01/INT_SR0 (0x20)
- INT_SR0,
- //INT_SRE0/INT_TM01H (0x22)
- INT_TM01H,
- //INT_CSI10/INT_IIC10/INT_ST1 (0x24)
- INT_ST1,
- //INT_CSI11/INT_IIC11/INT_SR1 (0x26)
- INT_SR1,
- //INT_SRE1/INT_TM03H (0x28)
- INT_TM03H,
- //INT_IICA0 (0x2A)
- INT_IICA0,
- //INT_TM00 (0x2C)
- INT_TM00,
- //INT_TM01 (0x2E)
- INT_TM01,
- //INT_TM02 (0x30)
- INT_TM02,
- //INT_TM03 (0x32)
- INT_TM03,
- //INT_AD (0x34)
- INT_AD,
- //INT_RTC (0x36)
- INT_RTC,
- //INT_IT (0x38)
- vPortTickISR,
- //INT_KR (0x3A)
- INT_KR,
- //INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
- INT_ST3,
- //INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
- INT_SR3,
- //INT_TRJ0 (0x40)
- INT_TRJ0,
- //INT_TM10 (0x42)
- INT_TM10,
- //INT_TM11 (0x44)
- INT_TM11,
- //INT_TM12 (0x46)
- INT_TM12,
- //INT_TM13 (0x48)
- INT_TM13,
- //INT_P6 (0x4A)
- INT_P6,
- //INT_P7 (0x4C)
- INT_P7,
- //INT_P8 (0x4E)
- INT_P8,
- //INT_P9 (0x50)
- INT_P9,
- //INT_CMP0/INT_P10 (0x52)
- INT_P10,
- //INT_CMP1/INT_P11 (0x54)
- INT_P11,
- //INT_TRD0 (0x56)
- INT_TRD0,
- //INT_TRD1 (0x58)
- INT_TRD1,
- //INT_TRG (0x5A)
- INT_TRG,
- //INT_SRE3/INT_TM13H (0x5C)
- INT_TM13H,
+ //(0x1E)
+ Dummy_Handler,
+ //(0x20)
+ Dummy_Handler,
+ //(0x22)
+ Dummy_Handler,
+ //(0x24)
+ Dummy_Handler,
+ //(0x26)
+ Dummy_Handler,
+ //(0x28)
+ Dummy_Handler,
+ //(0x2A)
+ Dummy_Handler,
+ //(0x2C)
+ Dummy_Handler,
+ //(0x2E)
+ Dummy_Handler,
+ //(0x30)
+ Dummy_Handler,
+ //(0x32)
+ Dummy_Handler,
+ //(0x34)
+ Dummy_Handler,
+ //(0x36)
+ Dummy_Handler,
+ //(0x38)
+#if INTIT_vect == 0x38
+ vPortTickISR, /* Note this vector table definition is used with lots of RL78 chips, some of which have the INTIT vector here. */
+#else
+ Dummy_Handler,
+#endif
+ //(0x3A)
+ Dummy_Handler,
+ //(0x3C)
+#if INTIT_vect == 0x3C
+ vPortTickISR, /* Note this vector table definition is used with lots of RL78 chips, some of which have the INTIT vector here. */
+#else
+ Dummy_Handler,
+#endif
+ //(0x3E)
+ Dummy_Handler,
+ //(0x40)
+ Dummy_Handler,
+ //(0x42)
+ Dummy_Handler,
+ //(0x44)
+ Dummy_Handler,
+ //(0x46)
+ Dummy_Handler,
+ //(0x48)
+ Dummy_Handler,
+ //(0x4A)
+ Dummy_Handler,
+ //(0x4C)
+ Dummy_Handler,
+ //(0x4E)
+ Dummy_Handler,
+ //(0x50)
+ Dummy_Handler,
+ //(0x52)
+ Dummy_Handler,
+ //(0x54)
+ Dummy_Handler,
+ //(0x56)
+ Dummy_Handler,
+ //(0x58)
+ Dummy_Handler,
+ //(0x5A)
+ Dummy_Handler,
+ //(0x5C)
+ Dummy_Handler,
// Padding
(void*)0xFFFF,
- //INT_IICA1 (0x60)
- INT_IICA1,
- //INT_FL (0x62)
- INT_FL,
+ //(0x60)
+ Dummy_Handler,
+ //(0x62)
+ Dummy_Handler,
// Padding
(void*)0xFFFF,
// Padding