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feat(draw/ppa): support SoCs that expose no L2 cache line size (#10396)

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This commit is contained in:
Akos Vandra-Meyer
2026-07-29 15:23:25 +00:00
committed by GitHub
parent 65bc757457
commit f147c9a34c
2 changed files with 11 additions and 3 deletions
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env_support/cmake/esp.cmake
+1 -1
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@@ -55,7 +55,7 @@ else()
set(IDF_COMPONENTS esp_timer log)
if(${target} STREQUAL "esp32p4")
if(${target} STREQUAL "esp32p4" OR ${target} STREQUAL "esp32s31")
list(APPEND IDF_COMPONENTS esp_driver_ppa esp_mm)
endif()
src/draw/espressif/ppa/lv_draw_ppa_private.h
+10 -2
View File
@@ -31,8 +31,16 @@ extern "C" {
/* The ppa driver depends heavily on the esp-idf headers*/
#include <sdkconfig.h>
#if (CONFIG_LV_DRAW_BUF_ALIGN != CONFIG_CACHE_L2_CACHE_LINE_SIZE)
#error "CONFIG_LV_DRAW_BUF_ALIGN must be equal to CONFIG_CACHE_L2_CACHE_LINE_SIZE!"
#if defined(CONFIG_CACHE_L2_CACHE_LINE_SIZE)
#define LV_DRAW_PPA_CACHE_LINE_SIZE CONFIG_CACHE_L2_CACHE_LINE_SIZE
#elif defined(CONFIG_CACHE_L1_DCACHE_LINE_SIZE)
#define LV_DRAW_PPA_CACHE_LINE_SIZE CONFIG_CACHE_L1_DCACHE_LINE_SIZE
#else
#error "Cannot determine the data cache line size for the PPA draw unit"
#endif
#if (CONFIG_LV_DRAW_BUF_ALIGN != LV_DRAW_PPA_CACHE_LINE_SIZE)
#error "CONFIG_LV_DRAW_BUF_ALIGN must be equal to the data cache line size!"
#endif