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Merge pull request #20 from forg0ne/release/v3.08.01

Browse Source 
Release/v3.08.01
This commit is contained in:
forg0ne
2021-05-04 14:32:27 -04:00
committed by GitHub
parent e65d9f9578 6f71b49ec4
commit 258010fb12
218 changed files with 1678 additions and 784 deletions
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Cfg/Template/os_app_hooks.c
+2 -2
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* APPLICATION HOOKS
*
* Filename : os_app_hooks.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Cfg/Template/os_app_hooks.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* APPLICATION HOOKS
*
* Filename : os_app_hooks.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Cfg/Template/os_cfg.h
+3 -2
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* CONFIGURATION FILE
*
* Filename : os_cfg.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
@@ -36,6 +36,7 @@
#define OS_CFG_DYN_TICK_EN 0u /* Enable (1) or Disable (0) the Dynamic Tick */
#define OS_CFG_INVALID_OS_CALLS_CHK_EN 1u /* Enable (1) or Disable (0) checks for invalid kernel calls */
#define OS_CFG_OBJ_TYPE_CHK_EN 1u /* Enable (1) or Disable (0) object type checking */
#define OS_CFG_OBJ_CREATED_CHK_EN 1u /* Enable (1) or Disable (0) object created checks */
#define OS_CFG_TS_EN 0u /* Enable (1) or Disable (0) time stamping */
#define OS_CFG_PRIO_MAX 64u /* Defines the maximum number of task priorities (see OS_PRIO data type) */
Cfg/Template/os_cfg_app.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* OS CONFIGURATION (APPLICATION SPECIFICS)
*
* Filename : os_cfg_app.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Ports/ARC/EM6/MetaWare/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Synopsys ARC EM6 Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : Synopsys ARC EM6
* Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check
Ports/ARC/EM6/MetaWare/os_cpu_a.s
+2 -2
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@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; Synopsys ARC EM6 Port
;
; File : os_cpu_a.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : Synopsys ARC EM6
; Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check
Ports/ARC/EM6/MetaWare/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Synopsys ARC EM6 Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : Synopsys ARC EM6
* Mode : Little-Endian, 32 registers, FPU, Code Density, Loop Counter, Stack Check
Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-A Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-A Cortex-A
* Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d16.s
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-d16.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-d32.s
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-d32.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/ARM/os_cpu_a_vfp-none.s
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-none.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-A Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-A Cortex-A
* Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d16.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-d16.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-d32.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-d32.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/CCS/os_cpu_a_vfp-none.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-none.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-A Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-A Cortex-A
* Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d16.S
+2 -2
View File
@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -17,7 +17,7 @@
@ ARMv7-A Port
@
@ File : os_cpu_a_vfp-d16.S
@ Version : V3.08.00
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARM7 or ARM9
@ Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-d32.S
+2 -2
View File
@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -17,7 +17,7 @@
@ ARMv7-A Port
@
@ File : os_cpu_a_vfp-d32.S
@ Version : V3.08.00
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARM7 or ARM9
@ Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/GNU/os_cpu_a_vfp-none.S
+2 -2
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@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -17,7 +17,7 @@
@ ARMv7-A Port
@
@ File : os_cpu_a_vfp-none.S
@ Version : V3.08.00
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARM7 or ARM9
@ Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu.h
+2 -2
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -19,7 +19,7 @@
* ARMv7-A Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-A Cortex-A
* Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d16.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-d16.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-d32.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-d32.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/IAR/os_cpu_a_vfp-none.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-A Port
;
; File : os_cpu_a_vfp-none.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM-Cortex-A/ARMv7-A/os_cpu_c.c
+2 -3
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-A Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-A Cortex-A
* Mode : ARM or Thumb
@@ -429,4 +429,3 @@ void OSTimeTickHook (void)
#ifdef __cplusplus
}
#endif
Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu.h
+2 -2
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv8-A Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv8-A Cortex-A
* Mode : ARM64
Ports/ARM-Cortex-A/ARMv8-A/GNU/os_cpu_a.S
+2 -3
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv8-A Port
*
* File : os_cpu_a.S
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv8-A Cortex-A
* Mode : ARM64
@@ -507,4 +507,3 @@ OS_CPU_SIMDGet:
#endif
RET
Ports/ARM-Cortex-A/ARMv8-A/os_cpu_c.c
+2 -3
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv8-A Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv8-A Cortex-A
* Mode : ARM64
@@ -431,4 +431,3 @@ void OSTimeTickHook (void)
#ifdef __cplusplus
}
#endif
Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu.h
+2 -2
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@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv6-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv6-M Cortex-M0 or Cortex-M0+
* Mode : Thumb2
Ports/ARM-Cortex-M/ARMv6-M/ARM/os_cpu_a.s
+2 -2
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@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv6-M Port
;
; File : os_cpu_a.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv6-M Cortex-M0 or Cortex-M0+
; Mode : Thumb2
Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv6-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv6-M Cortex-M0 or Cortex-M0+
* Mode : Thumb2
Ports/ARM-Cortex-M/ARMv6-M/GNU/os_cpu_a.s
+2 -2
View File
@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -17,7 +17,7 @@
@ ARMv6-M Port
@
@ File : os_cpu_a.s
@ Version : V3.08.00
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARMv6-M Cortex-M0 or Cortex-M0+
@ Mode : Thumb2
Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv6-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv6-M Cortex-M0 or Cortex-M0+
* Mode : Thumb2
Ports/ARM-Cortex-M/ARMv6-M/IAR/os_cpu_a.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv6-M Port
;
; File : os_cpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv6-M Cortex-M0 or Cortex-M0+
; Mode : Thumb2
Ports/ARM-Cortex-M/ARMv6-M/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv6-M Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv6-M Cortex-M0 or Cortex-M0+
* Mode : Thumb2
Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu.h
+2 -7
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*
* For : ARMv7-M Cortex-M
* Mode : Thumb-2 ISA
@@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq);
void OS_CPU_SysTickHandler (void);
void OS_CPU_PendSVHandler (void);
#if (OS_CPU_ARM_FP_EN > 0u)
void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr);
void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr);
#endif
/*
*********************************************************************************************************
Ports/ARM-Cortex-M/ARMv7-M/ARM/os_cpu_a.asm
+22 -56
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-M Port
;
; File : os_cpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-M Cortex-M
; Mode : Thumb-2 ISA
@@ -50,11 +50,6 @@
EXPORT OSIntCtxSw
EXPORT OS_CPU_PendSVHandler
IF {FPU} != "SoftVFP"
EXPORT OS_CPU_FP_Reg_Push
EXPORT OS_CPU_FP_Reg_Pop
ENDIF
;********************************************************************************************************
; EQUATES
@@ -76,55 +71,6 @@ NVIC_PENDSVSET EQU 0x10000000 ; Value to trigg
AREA CODE, CODE, READONLY
;********************************************************************************************************
; FLOATING POINT REGISTERS PUSH
; void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr)
;
; Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit.
;
; 2) Pseudo-code is:
; a) Push remaining FPU regs S16-S31 on process stack;
; b) Update OSTCBCurPtr->StkPtr;
;********************************************************************************************************
IF {FPU} != "SoftVFP"
OS_CPU_FP_Reg_Push
MRS R1, PSP ; PSP is process stack pointer
CBZ R1, OS_CPU_FP_nosave ; Skip FP register save the first time
VSTMDB R0!, {S16-S31}
LDR R1, =OSTCBCurPtr
LDR R2, [R1]
STR R0, [R2]
OS_CPU_FP_nosave
BX LR
ENDIF
;********************************************************************************************************
; FLOATING POINT REGISTERS POP
; void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr)
;
; Note(s) : 1) This function restores S16-S31 of the Floating Point Unit.
;
; 2) Pseudo-code is:
; a) Restore regs S16-S31 of new process stack;
; b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack;
;********************************************************************************************************
IF {FPU} != "SoftVFP"
OS_CPU_FP_Reg_Pop
VLDMIA R0!, {S16-S31}
LDR R1, =OSTCBHighRdyPtr
LDR R2, [R1]
STR R0, [R2]
BX LR
ENDIF
;********************************************************************************************************
; START MULTITASKING
@@ -177,6 +123,7 @@ OSStartHighRdy
MRS R0, CONTROL
ORR R0, R0, #2
BIC R0, R0, #4 ; Clear FPCA bit to indicate FPU is not in use
MSR CONTROL, R0
ISB ; Sync instruction stream
@@ -265,6 +212,13 @@ OS_CPU_PendSVHandler
CPSIE I
MRS R0, PSP ; PSP is process stack pointer
IF {FPU} != "SoftVFP"
; Push high vfp registers if the task is using the FPU context
TST R14, #0x10
IT EQ
VSTMDBEQ R0!, {S16-S31}
ENDIF
STMFD R0!, {R4-R11, R14} ; Save remaining regs r4-11, R14 on process stack
MOV32 R5, OSTCBCurPtr ; OSTCBCurPtr->StkPtr = SP;
@@ -287,10 +241,22 @@ OS_CPU_PendSVHandler
ORR LR, R4, #0x04 ; Ensure exception return uses process stack
LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr;
LDMFD R0!, {R4-R11, R14} ; Restore r4-11, R14 from new process stack
IF {FPU} != "SoftVFP"
; Pop the high vfp registers if the next task is using the FPU context
TST R14, #0x10
IT EQ
VLDMIAEQ R0!, {S16-S31}
ENDIF
MSR PSP, R0 ; Load PSP with new process SP
MOV32 R2, #0 ; Restore BASEPRI priority level to 0
CPSID I ; Cortex-M7 errata notice. See Note #5
MSR BASEPRI, R2
DSB
ISB
CPSIE I
BX LR ; Exception return will restore remaining context
ALIGN ; Removes warning[A1581W]: added <no_padbytes> of padding at <address>
Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu.h
+2 -7
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-M Cortex-M
* Mode : Thumb-2 ISA
@@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq);
void OS_CPU_SysTickHandler (void);
void OS_CPU_PendSVHandler (void);
#if (OS_CPU_ARM_FP_EN > 0u)
void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr);
void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr);
#endif
/*
*********************************************************************************************************
Ports/ARM-Cortex-M/ARMv7-M/CCS/os_cpu_a.asm
+22 -60
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-M Port
;
; File : os_cpu_s.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-M Cortex-M
; Mode : Thumb-2 ISA
@@ -59,11 +59,6 @@ OS_KA_BASEPRI_BoundaryAddr: .word OS_KA_BASEPRI_Boundary
.global OSIntCtxSw
.global OS_CPU_PendSVHandler
.if __TI_VFP_SUPPORT__
.global OS_CPU_FP_Reg_Push
.global OS_CPU_FP_Reg_Pop
.endif
;********************************************************************************************************
; EQUATES
@@ -84,59 +79,6 @@ NVIC_PENDSVSET: .word 0x10000000 ; Value to trigg
.thumb
;********************************************************************************************************
; FLOATING POINT REGISTERS PUSH
; void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr)
;
; Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit.
;
; 2) Pseudo-code is:
; a) Push remaining FPU regs S16-S31 on process stack;
; b) Update OSTCBCurPtr->StkPtr;
;********************************************************************************************************
.if __TI_VFP_SUPPORT__
.asmfunc
OS_CPU_FP_Reg_Push:
MRS R1, PSP ; PSP is process stack pointer
CBZ R1, OS_CPU_FP_nosave ; Skip FP register save the first time
VSTMDB R0!, {S16-S31}
LDR R1, OSTCBCurPtrAddr
LDR R2, [R1]
STR R0, [R2]
.endasmfunc
.asmfunc
OS_CPU_FP_nosave:
BX LR
.endasmfunc
.endif
;********************************************************************************************************
; FLOATING POINT REGISTERS POP
; void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr)
;
; Note(s) : 1) This function restores S16-S31 of the Floating Point Unit.
;
; 2) Pseudo-code is:
; a) Restore regs S16-S31 of new process stack;
; b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack;
;********************************************************************************************************
.if __TI_VFP_SUPPORT__
.asmfunc
OS_CPU_FP_Reg_Pop:
VLDMIA R0!, {S16-S31}
LDR R1, OSTCBHighRdyPtrAddr
LDR R2, [R1]
STR R0, [R2]
BX LR
.endasmfunc
.endif
;********************************************************************************************************
; START MULTITASKING
; void OSStartHighRdy(void)
@@ -189,6 +131,7 @@ OSStartHighRdy:
MRS R0, CONTROL
ORR R0, R0, #2
BIC R0, R0, #4 ; Clear FPCA bit to indicate FPU is not in use
MSR CONTROL, R0
ISB ; Sync instruction stream
@@ -281,6 +224,13 @@ OS_CPU_PendSVHandler:
CPSIE I
MRS R0, PSP ; PSP is process stack pointer
.if __TI_VFP_SUPPORT__
; Push high vfp registers if the task is using the FPU context
TST R14, #0x10
IT EQ
VSTMDBEQ R0!, {S16-S31}
.endif
STMFD R0!, {R4-R11, R14} ; Save remaining regs r4-11, R14 on process stack
LDR R5, OSTCBCurPtrAddr ; OSTCBCurPtr->StkPtr = SP;
@@ -303,10 +253,22 @@ OS_CPU_PendSVHandler:
ORR LR, R4, #0x04 ; Ensure exception return uses process stack
LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr;
LDMFD R0!, {R4-R11, R14} ; Restore r4-11, R14 from new process stack
.if __TI_VFP_SUPPORT__
; Pop the high vfp registers if the next task is using the FPU context
TST R14, #0x10
IT EQ
VLDMIAEQ R0!, {S16-S31}
.endif
MSR PSP, R0 ; Load PSP with new process SP
MOV R2, #0 ; Restore BASEPRI priority level to 0
CPSID I ; Cortex-M7 errata notice. See Note #5
MSR BASEPRI, R2
DSB
ISB
CPSIE I
BX LR ; Exception return will restore remaining context
.endasmfunc
Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu.h
+2 -7
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-M Cortex-M
* Mode : Thumb-2 ISA
@@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq);
void OS_CPU_SysTickHandler (void);
void OS_CPU_PendSVHandler (void);
#if (OS_CPU_ARM_FP_EN > 0u)
void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr);
void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr);
#endif
/*
*********************************************************************************************************
Ports/ARM-Cortex-M/ARMv7-M/GNU/os_cpu_a.S
+24 -55
View File
@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -16,6 +16,9 @@
@
@ ARMv7-M Port
@
@ File : os_cpu_a.asm
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARMv7-M Cortex-M
@ Mode : Thumb-2 ISA
@ Toolchain : GNU C Compiler
@@ -46,10 +49,6 @@
.global OSIntCtxSw
.global OS_CPU_PendSVHandler
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
.global OS_CPU_FP_Reg_Push
.global OS_CPU_FP_Reg_Pop
#endif
@********************************************************************************************************
@@ -72,56 +71,6 @@
.syntax unified
@********************************************************************************************************
@ FLOATING POINT REGISTERS PUSH
@ void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr)
@
@ Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit.
@
@ 2) Pseudo-code is:
@ a) Push remaining FPU regs S16-S31 on process stack;
@ b) Update OSTCBCurPtr->StkPtr;
@********************************************************************************************************
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
.thumb_func
OS_CPU_FP_Reg_Push:
MRS R1, PSP @ PSP is process stack pointer
CBZ R1, OS_CPU_FP_nosave @ Skip FP register save the first time
VSTMDB R0!, {S16-S31}
LDR R1, =OSTCBCurPtr
LDR R2, [R1]
STR R0, [R2]
OS_CPU_FP_nosave:
BX LR
#endif
@********************************************************************************************************
@ FLOATING POINT REGISTERS POP
@ void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr)
@
@ Note(s) : 1) This function restores S16-S31 of the Floating Point Unit.
@
@ 2) Pseudo-code is:
@ a) Restore regs S16-S31 of new process stack;
@ b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack;
@********************************************************************************************************
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
.thumb_func
OS_CPU_FP_Reg_Pop:
VLDMIA R0!, {S16-S31}
LDR R1, =OSTCBHighRdyPtr
LDR R2, [R1]
STR R0, [R2]
BX LR
#endif
@********************************************************************************************************
@ START MULTITASKING
@ void OSStartHighRdy(void)
@@ -182,6 +131,7 @@ OSStartHighRdy:
MRS R0, CONTROL
ORR R0, R0, #2
BIC R0, R0, #4 @ Clear FPCA bit to indicate FPU is not in use
MSR CONTROL, R0
ISB @ Sync instruction stream
@@ -273,6 +223,13 @@ OS_CPU_PendSVHandler:
CPSIE I
MRS R0, PSP @ PSP is process stack pointer
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
@ Push high vfp registers if the task is using the FPU context
TST R14, #0x10
IT EQ
VSTMDBEQ R0!, {S16-S31}
#endif
STMFD R0!, {R4-R11, R14} @ Save remaining regs r4-11, R14 on process stack
MOVW R5, #:lower16:OSTCBCurPtr @ OSTCBCurPtr->StkPtr = SP;
@@ -299,10 +256,22 @@ OS_CPU_PendSVHandler:
ORR LR, R4, #0x04 @ Ensure exception return uses process stack
LDR R0, [R2] @ R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr;
LDMFD R0!, {R4-R11, R14} @ Restore r4-11, R14 from new process stack
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
@ Pop the high vfp registers if the next task is using the FPU context
TST R14, #0x10
IT EQ
VLDMIAEQ R0!, {S16-S31}
#endif
MSR PSP, R0 @ Load PSP with new process SP
MOV R2, #0 @ Restore BASEPRI priority level to 0
CPSID I @ Cortex-M7 errata notice. See Note #5
MSR BASEPRI, R2
DSB
ISB
CPSIE I
BX LR @ Exception return will restore remaining context
.end
Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu.h
+2 -7
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-M Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-M Cortex-M
* Mode : Thumb-2 ISA
@@ -157,11 +157,6 @@ void OS_CPU_SysTickInitFreq(CPU_INT32U cpu_freq);
void OS_CPU_SysTickHandler (void);
void OS_CPU_PendSVHandler (void);
#if (OS_CPU_ARM_FP_EN > 0u)
void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr);
void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr);
#endif
/*
*********************************************************************************************************
Ports/ARM-Cortex-M/ARMv7-M/IAR/os_cpu_a.asm
+22 -52
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-M Port
;
; File : os_cpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-M Cortex-M
; Mode : Thumb-2 ISA
@@ -50,11 +50,6 @@
PUBLIC OSIntCtxSw
PUBLIC OS_CPU_PendSVHandler
#ifdef __ARMVFP__
PUBLIC OS_CPU_FP_Reg_Push
PUBLIC OS_CPU_FP_Reg_Pop
#endif
;********************************************************************************************************
; EQUATES
@@ -74,51 +69,6 @@ NVIC_PENDSVSET EQU 0x10000000 ; Value to trigg
THUMB
;********************************************************************************************************
; FLOATING POINT REGISTERS PUSH
; void OS_CPU_FP_Reg_Push (CPU_STK *stkPtr)
;
; Note(s) : 1) This function saves S16-S31 registers of the Floating Point Unit.
;
; 2) Pseudo-code is:
; a) Push remaining FPU regs S16-S31 on process stack;
; b) Update OSTCBCurPtr->StkPtr;
;********************************************************************************************************
#ifdef __ARMVFP__
OS_CPU_FP_Reg_Push
MRS R1, PSP ; PSP is process stack pointer
CBZ R1, OS_CPU_FP_nosave ; Skip FP register save the first time
VSTMDB R0!, {S16-S31}
LDR R1, =OSTCBCurPtr
LDR R2, [R1]
STR R0, [R2]
OS_CPU_FP_nosave
BX LR
#endif
;********************************************************************************************************
; FLOATING POINT REGISTERS POP
; void OS_CPU_FP_Reg_Pop (CPU_STK *stkPtr)
;
; Note(s) : 1) This function restores S16-S31 of the Floating Point Unit.
;
; 2) Pseudo-code is:
; a) Restore regs S16-S31 of new process stack;
; b) Update OSTCBHighRdyPtr->StkPtr pointer of new proces stack;
;********************************************************************************************************
#ifdef __ARMVFP__
OS_CPU_FP_Reg_Pop
VLDMIA R0!, {S16-S31}
LDR R1, =OSTCBHighRdyPtr
LDR R2, [R1]
STR R0, [R2]
BX LR
#endif
;********************************************************************************************************
; START MULTITASKING
@@ -171,6 +121,7 @@ OSStartHighRdy
MRS R0, CONTROL
ORR R0, R0, #2
BIC R0, R0, #4 ; Clear FPCA bit to indicate FPU is not in use
MSR CONTROL, R0
ISB ; Sync instruction stream
@@ -259,6 +210,13 @@ OS_CPU_PendSVHandler
CPSIE I
MRS R0, PSP ; PSP is process stack pointer
#ifdef __ARMVFP__
; Push high vfp registers if the task is using the FPU context
TST R14, #0x10
IT EQ
VSTMDBEQ R0!, {S16-S31}
#endif
STMFD R0!, {R4-R11, R14} ; Save remaining regs r4-11, R14 on process stack
MOV32 R5, OSTCBCurPtr ; OSTCBCurPtr->StkPtr = SP;
@@ -281,10 +239,22 @@ OS_CPU_PendSVHandler
ORR LR, R4, #0x04 ; Ensure exception return uses process stack
LDR R0, [R2] ; R0 is new process SP; SP = OSTCBHighRdyPtr->StkPtr;
LDMFD R0!, {R4-R11, R14} ; Restore r4-11, R14 from new process stack
#ifdef __ARMVFP__
; Pop the high vfp registers if the next task is using the FPU context
TST R14, #0x10
IT EQ
VLDMIAEQ R0!, {S16-S31}
#endif
MSR PSP, R0 ; Load PSP with new process SP
MOV32 R2, #0 ; Restore BASEPRI priority level to 0
CPSID I ; Cortex-M7 errata notice. See Note #5
MSR BASEPRI, R2
DSB
ISB
CPSIE I
BX LR ; Exception return will restore remaining context
END
Ports/ARM-Cortex-M/ARMv7-M/os_cpu_c.c
+2 -56
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-M Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-M Cortex-M
* Mode : Thumb-2 ISA
@@ -451,27 +451,6 @@ CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task,
/* Align the stack to 8-bytes. */
p_stk = (CPU_STK *)((CPU_STK)(p_stk) & 0xFFFFFFF8u);
/* Registers stacked as if auto-saved on exception */
#if (OS_CPU_ARM_FP_EN > 0u) /* FPU auto-saved registers. */
--p_stk;
*(--p_stk) = (CPU_STK)0x02000000u; /* FPSCR */
/* Initialize S0-S15 floating point registers */
*(--p_stk) = (CPU_STK)0x41700000u; /* S15 */
*(--p_stk) = (CPU_STK)0x41600000u; /* S14 */
*(--p_stk) = (CPU_STK)0x41500000u; /* S13 */
*(--p_stk) = (CPU_STK)0x41400000u; /* S12 */
*(--p_stk) = (CPU_STK)0x41300000u; /* S11 */
*(--p_stk) = (CPU_STK)0x41200000u; /* S10 */
*(--p_stk) = (CPU_STK)0x41100000u; /* S9 */
*(--p_stk) = (CPU_STK)0x41000000u; /* S8 */
*(--p_stk) = (CPU_STK)0x40E00000u; /* S7 */
*(--p_stk) = (CPU_STK)0x40C00000u; /* S6 */
*(--p_stk) = (CPU_STK)0x40A00000u; /* S5 */
*(--p_stk) = (CPU_STK)0x40800000u; /* S4 */
*(--p_stk) = (CPU_STK)0x40400000u; /* S3 */
*(--p_stk) = (CPU_STK)0x40000000u; /* S2 */
*(--p_stk) = (CPU_STK)0x3F800000u; /* S1 */
*(--p_stk) = (CPU_STK)0x00000000u; /* S0 */
#endif
*(--p_stk) = (CPU_STK)0x01000000u; /* xPSR */
*(--p_stk) = (CPU_STK)p_task; /* Entry Point */
*(--p_stk) = (CPU_STK)OS_TaskReturn; /* R14 (LR) */
@@ -480,12 +459,7 @@ CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task,
*(--p_stk) = (CPU_STK)0x02020202u; /* R2 */
*(--p_stk) = (CPU_STK)p_stk_limit; /* R1 */
*(--p_stk) = (CPU_STK)p_arg; /* R0 : argument */
#if (OS_CPU_ARM_FP_EN > 0u)
*(--p_stk) = (CPU_STK)0xFFFFFFEDuL; /* R14: EXEC_RETURN; See Note 5 */
#else
*(--p_stk) = (CPU_STK)0xFFFFFFFDuL; /* R14: EXEC_RETURN; See Note 5 */
#endif
/* Remaining registers saved on process stack */
*(--p_stk) = (CPU_STK)0x11111111uL; /* R11 */
*(--p_stk) = (CPU_STK)0x10101010uL; /* R10 */
@@ -496,26 +470,6 @@ CPU_STK *OSTaskStkInit (OS_TASK_PTR p_task,
*(--p_stk) = (CPU_STK)0x05050505uL; /* R5 */
*(--p_stk) = (CPU_STK)0x04040404uL; /* R4 */
#if (OS_CPU_ARM_FP_EN > 0u)
/* Initialize S16-S31 floating point registers */
*(--p_stk) = (CPU_STK)0x41F80000u; /* S31 */
*(--p_stk) = (CPU_STK)0x41F00000u; /* S30 */
*(--p_stk) = (CPU_STK)0x41E80000u; /* S29 */
*(--p_stk) = (CPU_STK)0x41E00000u; /* S28 */
*(--p_stk) = (CPU_STK)0x41D80000u; /* S27 */
*(--p_stk) = (CPU_STK)0x41D00000u; /* S26 */
*(--p_stk) = (CPU_STK)0x41C80000u; /* S25 */
*(--p_stk) = (CPU_STK)0x41C00000u; /* S24 */
*(--p_stk) = (CPU_STK)0x41B80000u; /* S23 */
*(--p_stk) = (CPU_STK)0x41B00000u; /* S22 */
*(--p_stk) = (CPU_STK)0x41A80000u; /* S21 */
*(--p_stk) = (CPU_STK)0x41A00000u; /* S20 */
*(--p_stk) = (CPU_STK)0x41980000u; /* S19 */
*(--p_stk) = (CPU_STK)0x41900000u; /* S18 */
*(--p_stk) = (CPU_STK)0x41880000u; /* S17 */
*(--p_stk) = (CPU_STK)0x41800000u; /* S16 */
#endif
return (p_stk);
}
@@ -548,10 +502,6 @@ void OSTaskSwHook (void)
CPU_BOOLEAN stk_status;
#endif
#if (OS_CPU_ARM_FP_EN > 0u)
OS_CPU_FP_Reg_Push(OSTCBCurPtr->StkPtr); /* Push the FP registers of the current task. */
#endif
#if OS_CFG_APP_HOOKS_EN > 0u
if (OS_AppTaskSwHookPtr != (OS_APP_HOOK_VOID)0) {
(*OS_AppTaskSwHookPtr)();
@@ -592,10 +542,6 @@ void OSTaskSwHook (void)
OSRedzoneHitHook(OSTCBCurPtr);
}
#endif
#if (OS_CPU_ARM_FP_EN > 0u)
OS_CPU_FP_Reg_Pop(OSTCBHighRdyPtr->StkPtr); /* Pop the FP registers of the highest ready task. */
#endif
}
Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-R Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-R Cortex-R
* Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-d16.s
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-R Port
;
; File : os_cpu_a_vfp-d16.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-R Cortex-R
; Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/ARM/os_cpu_a_vfp-none.s
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-R Port
;
; File : os_cpu_a_vfp-none.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-R Cortex-R
; Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-R Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-R Cortex-R
* Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-d16.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-R Port
;
; File : os_cpu_a_vfp-d16.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-R Cortex-R
; Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/CCS/os_cpu_a_vfp-none.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-R Port
;
; File : os_cpu_a_vfp-none.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-R Cortex-R
; Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-R Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-R Cortex-R
* Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-d16.S
+2 -2
View File
@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -17,7 +17,7 @@
@ ARMv7-R Port
@
@ File : os_cpu_a_vfp-d16.S
@ Version : V3.08.00
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARMv7-R Cortex-R
@ Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/GNU/os_cpu_a_vfp-none.S
+2 -2
View File
@@ -2,7 +2,7 @@
@ uC/OS-III
@ The Real-Time Kernel
@
@ Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
@ Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
@
@ SPDX-License-Identifier: APACHE-2.0
@
@@ -17,7 +17,7 @@
@ ARMv7-R Port
@
@ File : os_cpu_a_vfp-none.S
@ Version : V3.08.00
@ Version : V3.08.01
@********************************************************************************************************
@ For : ARMv7-R Cortex-R
@ Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ARMv7-R Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-R Cortex-R
* Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-d16.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-R Port
;
; File : os_cpu_a_vfp-d16.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-R Cortex-R
; Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/IAR/os_cpu_a_vfp-none.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ARMv7-R Port
;
; File : os_cpu_a_vfp-none.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARMv7-R Cortex-R
; Mode : ARM or Thumb
Ports/ARM-Cortex-R/ARMv7-R/os_cpu_c.c
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -19,7 +19,7 @@
* ARMv7-R Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARMv7-R Cortex-R
* Mode : ARM or Thumb
@@ -428,4 +428,3 @@ void OSTimeTickHook (void)
#ifdef __cplusplus
}
#endif
Ports/ARM/Generic/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ARM Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARM7 or ARM9
* Mode : ARM or Thumb
Ports/ARM/Generic/IAR/os_cpu_a.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; Generic ARM Port
;
; File : os_cpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM/Generic/IAR/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ARM Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARM7 or ARM9
* Mode : ARM or Thumb
Ports/ARM/Generic/IAR/os_cpu_fpu_a.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -18,7 +18,7 @@
; VFP SUPPORT
;
; File : os_cpu_fpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM/Generic/IAR/os_dcc.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -21,7 +21,7 @@
* DCC Communication
*
* File : os_dcc.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARM7 or ARM9
* Mode : ARM or Thumb
Ports/ARM/Generic/RealView/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ARM Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARM7 or ARM9
* Mode : ARM or Thumb
Ports/ARM/Generic/RealView/os_cpu_a.s
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; Generic ARM Port
;
; File : os_cpu_a.s
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : ARM7 or ARM9
; Mode : ARM or Thumb
Ports/ARM/Generic/RealView/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ARM Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARM7 or ARM9
* Mode : ARM or Thumb
Ports/ARM/Generic/RealView/os_dcc.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -21,7 +21,7 @@
* DCC Communication
*
* File : os_dcc.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : ARM7 or ARM9
* Mode : ARM or Thumb
Ports/AVR/ATxmega128/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR Xmega Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Ports/AVR/ATxmega128/IAR/os_cpu_a.s90
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ATMEL AVR Xmega Port
;
; File : os_cpu_a.s90
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
;********************************************************************************************************
Ports/AVR/ATxmega128/IAR/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR Xmega Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
Ports/AVR/ATxmega128/IAR/os_cpu_i.s90
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; ATMEL AVR Xmega Port
;
; File : os_cpu_i.s90
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
Ports/AVR32/AP7000/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -19,7 +19,7 @@
* ATMEL AVR32 AP7000 Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
Ports/AVR32/AP7000/IAR/os_cpu_a.asm
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -19,7 +19,7 @@
* ATMEL AVR32 AP7000 Port
*
* File : os_cpu_a.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
Ports/AVR32/AP7000/IAR/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -19,7 +19,7 @@
* ATMEL AVR32 AP7000 Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
Ports/AVR32/UC3/AtmelStudio6/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR32 UC3 Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : Atmel Studios
*********************************************************************************************************
Ports/AVR32/UC3/AtmelStudio6/os_cpu_a.S
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR32 UC3 Port
*
* File : os_cpu_a.S
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : Atmel Studios
*********************************************************************************************************
@@ -318,4 +318,3 @@ OSFastIntISRHandler:
* CPU ASSEMBLY PORT FILE END
*********************************************************************************************************
*/
Ports/AVR32/UC3/AtmelStudio6/os_cpu_c.c
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR32 UC3 Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : Atmel Studios
*********************************************************************************************************
@@ -429,4 +429,3 @@ void OSStartHighRdy (void)
#ifdef __cplusplus
}
#endif
Ports/AVR32/UC3/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR32 UC3 Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
Ports/AVR32/UC3/IAR/os_cpu_a.asm
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR32 UC3 Port
*
* File : os_cpu_a.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
Ports/AVR32/UC3/IAR/os_cpu_c.c
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* ATMEL AVR32 UC3 Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR AVR32
*********************************************************************************************************
@@ -429,4 +429,3 @@ void OSStartHighRdy (void)
#ifdef __cplusplus
}
#endif
Ports/Blackfin/VDSP++/os_cpu.h
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -25,7 +25,7 @@
* development team
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
@@ -176,4 +176,3 @@ void OS_CPU_RegisterHandler(INT8U ivg, FNCT_PTR fn, BOOLEAN nesting); /*
#endif /* _LANGUAGE_C */
#endif /* OS_CPU_H */
Ports/Blackfin/VDSP++/os_cpu_a.asm
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -25,7 +25,7 @@
* development team
*
* File : os_cpu_a.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Ports/Blackfin/VDSP++/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -25,7 +25,7 @@
* development team
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Ports/C28x/Generic/CCS/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* TI C28x Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : TI C28x
* Mode : C28 Object mode
Ports/C28x/Generic/CCS/os_cpu_a.asm
+2 -2
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; TI C28x Port
;
; File : os_cpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : TI C28x
; Mode : C28 Object mode
Ports/C28x/Generic/CCS/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* TI C28x Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* For : TI C28x
* Mode : C28 Object mode
Ports/C28x/Generic/CCS/os_cpu_i.asm
+2 -3
View File
@@ -2,7 +2,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -17,7 +17,7 @@
; TI C28x Port
;
; File : os_cpu_i.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; For : TI C28x
; Mode : C28 Object mode
@@ -105,4 +105,3 @@ OS_CTX_RESTORE .macro
; Restore registers part 2.
POP AR1H:AR0H ; AR1H:AR0H
.endm
Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic Coldfire with EMAC Port for CodeWarrior Compiler
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_a.asm
+2 -3
View File
@@ -3,7 +3,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -20,7 +20,7 @@
; Generic Coldfire with EMAC Port for CodeWarrior Compiler
;
; File : os_cpu_a.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
; Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of
; the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to
@@ -285,4 +285,3 @@ _OS_My_ISR_Handler:
RTS
.end
Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic Coldfire with EMAC Port for CodeWarrior Compiler
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/
Ports/ColdFire-EMAC/Generic/CodeWarrior/os_cpu_i.asm
+2 -2
View File
@@ -3,7 +3,7 @@
; uC/OS-III
; The Real-Time Kernel
;
; Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
; Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
;
; SPDX-License-Identifier: APACHE-2.0
;
@@ -20,7 +20,7 @@
; Generic Coldfire with EMAC Port for CodeWarrior Compiler
;
; File : os_cpu_i.asm
; Version : V3.08.00
; Version : V3.08.01
;********************************************************************************************************
*/
Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu.h
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : CodeWarrior
*********************************************************************************************************
@@ -113,4 +113,3 @@ void OSInitVBR(void);
#endif
#endif
Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_a.asm
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_a.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of
* the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to
Ports/Coldfire/Generic/CW_For_Microcontrollers/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : CodeWarrior
*********************************************************************************************************
Ports/Coldfire/Generic/CodeWarrior/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : CodeWarrior
*********************************************************************************************************
Ports/Coldfire/Generic/CodeWarrior/os_cpu_a.asm
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_a.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of
* the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to
@@ -264,4 +264,3 @@ _OS_My_ISR_Handler:
RTS
.end
Ports/Coldfire/Generic/CodeWarrior/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : CodeWarrior
*********************************************************************************************************
Ports/Coldfire/Generic/CodeWarrior/os_cpu_i.asm
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_i.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : CodeWarrior
*********************************************************************************************************
Ports/Coldfire/Generic/IAR/os_cpu.h
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu.h
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR EWCF
*********************************************************************************************************
Ports/Coldfire/Generic/IAR/os_cpu_a.asm
+2 -3
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_a.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Note(s) : 1) This port uses the MOVEM.L (A7),D0-D7/A0-A6, LEA 60(A7)A7 construct instead of
* the traditional 68xxx MOVEM.L (A7)+,D0-D7/A0-A6. It is perfectly in order to
@@ -263,4 +263,3 @@ OS_My_ISR_Handler:
RTS
END
Ports/Coldfire/Generic/IAR/os_cpu_c.c
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_c.c
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
* Toolchain : IAR EWCF
*********************************************************************************************************
Ports/Coldfire/Generic/IAR/os_cpu_i.asm
+2 -2
View File
@@ -3,7 +3,7 @@
* uC/OS-III
* The Real-Time Kernel
*
* Copyright 2009-2020 Silicon Laboratories Inc. www.silabs.com
* Copyright 2009-2021 Silicon Laboratories Inc. www.silabs.com
*
* SPDX-License-Identifier: APACHE-2.0
*
@@ -20,7 +20,7 @@
* Generic ColdFire Port
*
* File : os_cpu_i.asm
* Version : V3.08.00
* Version : V3.08.01
*********************************************************************************************************
*/

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