Refactored, consolidated, and cleaned up RV32/RV64 ports (#536)

risc-v: refactor, consolidate, and fix RV32/RV64 ports

Consolidates the RISC-V 32-bit and 64-bit GNU/Clang port sources, fixes two
pre-existing assembly bugs discovered during testing, and hardens the build
infrastructure for both the regression suite and the CORE-V MCU example.

--- Port consolidation (RV32 GNU + Clang) ---

 - Delete ports/risc-v32/clang/src/ (8 .S files had no Clang-specific
 directives; diverged from GNU only due to missing bug fixes). The Clang
 port CMakeLists.txt now compiles from ../gnu/src/.
 - Change .global -> .weak for _tx_initialize_low_level in gnu/src/ to allow
 BSP-level override without a linker conflict (adopted from Clang port).
 - Create ports/risc-v32/common/tx_port_riscv32_common.h with all definitions
 shared between GNU and Clang ports. Reduce both tx_port.h files to thin
 wrappers.
 - Add a prominent comment in risc-v64/gnu/inc/tx_port.h explaining why
 LONG/ULONG are intentionally 32-bit on RV64 (ThreadX ABI requirement,
 mirrors win64/MSVC LLP64).

--- Shared CMake helper ---

 - Add cmake/threadx_riscv_port.cmake with threadx_add_riscv_port(). All
 three port CMakeLists.txt files are reduced to ~8 lines each. Include path
 is relative to CMAKE_CURRENT_LIST_DIR so the helper works whether ports
 are built standalone or as a subdirectory of the test framework.

--- Shared example-build drivers ---

 - Create canonical driver files under ports/risc-v_common/:
  inc/csr.h                  (uintptr_t-based; portable RV32 + RV64)
  example_build/plic/        (plic.c, plic.h)
  example_build/uart/        (uart_qemu_ns16550.c/h; static inline putc_nolock)
  example_build/trap/        (trap_qemu.c; XLEN-portable mcause constants)
 - Replace per-example copies with symlinks in all qemu_virt and cva6_ariane
 example directories.
 - Fix OS_IS_INTERRUPT typo (was OS_IS_INTERUPT) in shared trap_qemu.c.
 - Gate print_hex() behind TX_RISCV_TRAP_DEBUG.

--- Bug fixes in RV32 assembly ---

tx_thread_schedule.S:

 - Solicited-return FP path: reload t0 from the mepc stack slot before
 csrw mepc, t0. After the FP restore block, t0 held the fcsr value (0 for
 new threads), which caused mepc = 0 and an immediate instruction-address
 fault on the first context switch.
 - Same path: reload t0 from the mstatus stack slot before csrw mstatus, t0
 to avoid writing the stale fcsr value into mstatus.

tx_thread_system_return.S:

 - FP callee-saved registers were saved unconditionally before the mstatus.FS
 check, causing an illegal instruction trap (mcause=0x2) when a thread with
 FS=Off (lazy FPU, thread has never used FP) voluntarily yielded.
 - Apply the same FS guard pattern used in tx_thread_context_save.S: read
 mstatus first, isolate FS[1:0], and skip fsw/fsd if FS == Off.

Both bugs were pre-existing on origin/dev and are unrelated to the
consolidation changes.

--- RV64 64-bit pointer compatibility ---

 - Add TX_TIMER_INTERNAL_EXTENSION, TX_THREAD_CREATE_TIMEOUT_SETUP, and
 TX_THREAD_TIMEOUT_POINTER_SETUP to risc-v64/gnu/inc/tx_port.h to store the
 thread timeout pointer in a VOID
  * extension field rather than truncating it
 into a 32-bit ULONG. Mirrors the win64 port pattern.
 - Define TX_TIMER_EXTENSION_PTR_DEFINED as a portable sentinel.
 - Update threadx_thread_basic_execution_test.c guard from #if defined(_WIN64)
 to #if defined(_WIN64) || defined(TX_TIMER_EXTENSION_PTR_DEFINED).
 - Disable -Wconversion for the RV64 test build: ULONG = unsigned int (32-bit)
 is intentional for ThreadX ABI but triggers spurious warnings when sizeof()
 (8 bytes on RV64) appears in arithmetic with ULONG in common/src/.

--- Regression suite cmake fixes ---

test/tx/cmake/riscv/regression/CMakeLists.txt:

 - Build testcontrol_weak_defaults.c as a separate OBJECT library and include
 it in every test executable via $<TARGET_OBJECTS:>. GNU ld does not extract
 objects from a static archive to satisfy weak symbols, so bundling it in
 test_utility was insufficient for the standalone
 threadx_initialize_kernel_setup_test.

test/tx/cmake/regression/CMakeLists.txt,
test/smp/cmake/regression/CMakeLists.txt:

 - Same fix applied to the Linux and SMP regression builds. The symbols
 abort_all_threads_suspended_on_mutex, suspend_lowest_priority, and
 abort_and_resume_byte_allocating_thread were introduced by the win64 merge
 and left the standalone test unlinkable.

--- CORE-V MCU toolchain and build fixes ---

cmake/riscv64-gcc-rv32imc.cmake:

 - Resolve riscv64-unknown-elf-gcc via PATH so the riscv-collab toolchain in
 /opt/riscv/bin is preferred when it appears first.

ports/risc-v32/gnu/example_build/core_v_mcu/bsp/clz.c (new):

 - The riscv-collab toolchain is built without rv32 multilib, so its libgcc
 does not define __clzsi2 (the helper emitted for __builtin_clz() in fll.c).
 Add a weak __clzsi2 fallback so the build is self-contained with any
 riscv64-unknown-elf toolchain. The weak attribute yields to a
 libgcc-provided strong symbol when the Ubuntu multilib package is used.

core_v_mcu/CMakeLists.txt:

 - Add bsp/clz.c to sources.
 - Reference CMAKE_TOOLCHAIN_FILE via message(STATUS) to suppress the false-
 positive "Manually-specified variables were not used by the project" CMake
 warning and to show the active toolchain at configure time.

--- Housekeeping ---

 - Rename azrtos_test_* -> threadx_test_* (eliminate Azure RTOS branding).
 - Add RV64 QEMU CI test script:
  ports/risc-v64/gnu/example_build/qemu_virt/test/
  threadx_test_tx_gnu_riscv64_qemu.py
 - Normalize entry.s -> entry.S in all 4 example directories.
 - .gitignore: exclude build_m7/ and .codex local artifacts.
 - CI: comment out the riscv regression workflow job and remove it from the
 deploy job's needs list (preserved in-place for easy re-enablement).

--- Verified ---

 - 95/95 RV32 regression tests pass (QEMU virt)
 - 95/95 RV64 regression tests pass (QEMU virt)
 - All 5 Linux build configurations build cleanly (default_build_coverage,
 disable_notify_callbacks_build, stack_checking_build,
 stack_checking_rand_fill_build, trace_build)
 - CORE-V MCU example_build links cleanly with /opt/riscv toolchain

Co-authored-by: Copilot 223556219+Copilot@users.noreply.github.com

test/tx/cmake/regression/CMakeLists.txt

@@ -120,9 +120,13 @@ add_custom_command(
   DEPENDS ${PORT_LOW_LEVEL_SOURCE} ${CMAKE_CURRENT_LIST_DIR}/generate_test_file.cmake
   COMMENT "Generating tx_initialize_low_level.c for test")
 
+add_library(test_weak_defaults OBJECT ${TESTCONTROL_WEAK_DEFAULTS_SOURCE})
+target_compile_definitions(test_weak_defaults PRIVATE CTEST BATCH_TEST
+                                                      TEST_STACK_SIZE_PRINTF=4096)
+target_link_libraries(test_weak_defaults PRIVATE azrtos::threadx)
+
 add_library(test_utility OBJECT ${GENERATED_LOW_LEVEL_SOURCE}
-                                ${SOURCE_DIR}/testcontrol.c
-                                ${TESTCONTROL_WEAK_DEFAULTS_SOURCE})
+                                ${SOURCE_DIR}/testcontrol.c)
 target_compile_definitions(test_utility PRIVATE CTEST BATCH_TEST
                                                 TEST_STACK_SIZE_PRINTF=4096)
 target_link_libraries(test_utility PRIVATE azrtos::threadx)
@@ -131,9 +135,11 @@ foreach(test_case ${regression_test_cases})
   get_filename_component(test_name ${test_case} NAME_WE)
 
   if(test_name STREQUAL "threadx_initialize_kernel_setup_test")
-    add_executable(${test_name} ${test_case})
+    add_executable(${test_name} ${test_case} $<TARGET_OBJECTS:test_weak_defaults>)
   else()
-    add_executable(${test_name} ${test_case} $<TARGET_OBJECTS:test_utility>)
+    add_executable(${test_name} ${test_case}
+                   $<TARGET_OBJECTS:test_utility>
+                   $<TARGET_OBJECTS:test_weak_defaults>)
     target_compile_definitions(${test_name} PRIVATE CTEST BATCH_TEST
                                                     TEST_STACK_SIZE_PRINTF=4096)
   endif()

test/tx/cmake/riscv/CMakeLists.txt

@@ -70,7 +70,15 @@ target_compile_options(
             -Wunused
             -Wuninitialized
             -Wmissing-declarations
-            -Wconversion
+            # -Wconversion is disabled for RV64 because ULONG is intentionally 32-bit
+            # (for ThreadX ABI compatibility across all ports) while sizeof(VOID*) and
+            # sizeof(ALIGN_TYPE) return size_t (64-bit on RV64). This design matches
+            # ARM Cortex-A72 and other 64-bit ports. The implicit conversions in
+            # common/src/ byte/block pool code trigger -Wconversion warnings. Since
+            # pool sizes are inherently limited to 32-bit (ULONG), the conversions
+            # are safe. No other 64-bit port with 32-bit ULONG has been tested with
+            # -Wconversion enabled, so we disable it here for RV64.
+            $<$<STREQUAL:${THREADX_ARCH},risc-v32>:-Wconversion>
             -Wpointer-arith
             -Wlogical-op
             -Waggregate-return

test/tx/cmake/riscv/regression/CMakeLists.txt

@@ -120,6 +120,18 @@ set(standalone_test_cases
     ${SOURCE_DIR}/threadx_initialize_kernel_setup_test.c
 )
 
+set(WEAK_DEFAULTS_SOURCE ${CMAKE_CURRENT_LIST_DIR}/../../../../shared/regression/testcontrol_weak_defaults.c)
+
+# Weak defaults must be an OBJECT library so all objects are always linked
+# into each test executable, even though they only provide weak symbols.
+# A STATIC library would have the linker skip them (weak defs don't satisfy
+# undefined strong references during archive scanning).
+add_library(riscv_test_weak_defaults OBJECT ${WEAK_DEFAULTS_SOURCE})
+target_compile_definitions(riscv_test_weak_defaults PRIVATE
+    CTEST BATCH_TEST EXTERNAL_EXIT TEST_STACK_SIZE_PRINTF=4096)
+target_compile_options(riscv_test_weak_defaults PRIVATE -include stdlib.h)
+target_link_libraries(riscv_test_weak_defaults PRIVATE azrtos::threadx)
+
 # Build testcontrol.c as a static library (no patched tx_initialize_low_level
 # needed — the BSP provides it directly with test_interrupt_dispatch hook).
 add_library(riscv_test_utility ${SOURCE_DIR}/testcontrol.c)
@@ -146,7 +158,7 @@ endfunction()
 # Regular tests (linked with testcontrol).
 foreach(test_case ${regression_test_cases})
     get_filename_component(test_name ${test_case} NAME_WE)
-    add_executable(${test_name} ${test_case})
+    add_executable(${test_name} ${test_case} $<TARGET_OBJECTS:riscv_test_weak_defaults>)
     target_link_libraries(${test_name} PRIVATE
         -Wl,--whole-archive riscv_bsp -Wl,--no-whole-archive
         riscv_test_utility)
@@ -156,7 +168,7 @@ endforeach()
 # Standalone tests (provide their own main, no testcontrol).
 foreach(test_case ${standalone_test_cases})
     get_filename_component(test_name ${test_case} NAME_WE)
-    add_executable(${test_name} ${test_case})
+    add_executable(${test_name} ${test_case} $<TARGET_OBJECTS:riscv_test_weak_defaults>)
     target_link_libraries(${test_name} PRIVATE
         -Wl,--whole-archive riscv_bsp -Wl,--no-whole-archive
         azrtos::threadx)

test/tx/regression/threadx_thread_basic_execution_test.c

@@ -390,12 +390,11 @@ VOID            (*temp_mutex_release)(TX_THREAD *thread_ptr);
     test_thread.tx_thread_timer.tx_timer_internal_list_head =  TX_NULL;
     test_thread.tx_thread_suspending =                         TX_TRUE;
     test_thread.tx_thread_delayed_suspend =                    TX_TRUE;
-#if defined(_WIN64)
+#if defined(_WIN64) || defined(TX_TIMER_EXTENSION_PTR_DEFINED)
     {
     TX_TIMER_INTERNAL   timeout_timer;
     TX_TIMER_INTERNAL   *saved_expired_timer_ptr;
 
-
         TX_MEMSET(&timeout_timer, 0, sizeof(TX_TIMER_INTERNAL));
         saved_expired_timer_ptr =  _tx_timer_expired_timer_ptr;
         _tx_timer_expired_timer_ptr =  &timeout_timer;