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Fixed private-timer timestamp issue in several ports (A5, A7, A9, R8) (#554)

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* Fixed Cortex-A9 SMP time source

Updated Cortex-A9 SMP timestamp reads to use the global timer low counter instead of the decrementing private timer counter. Applied the change to GNU and AC5 ports.

* Fixed remaining Arm SMP time sources

Updated Cortex-A5, Cortex-A7, and Cortex-R8 SMP timestamp hooks so execution profiling uses incrementing time sources instead of the decrementing private timer count register.

Cortex-A5 and Cortex-R8 now read the global timer count low register, matching the Cortex-A9 fix. Cortex-A7 now reads the generic timer physical count register.

---------

Co-authored-by: Codex <codex@openai.com>
This commit is contained in:
Frédéric Desbiens
2026-06-22 08:07:16 -04:00
committed by GitHub
co-authored by Codex
parent b880ffeada
commit 32a68cc69a
7 changed files with 20 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ports_smp/cortex_a5_smp/ac5/src/tx_thread_smp_time_get.s
+3 -2
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -8,6 +9,7 @@
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
; Some portions generated by Codex (GPT-5).
;
;/**************************************************************************/
;/**************************************************************************/
@@ -69,7 +71,7 @@
_tx_thread_smp_time_get
MRC p15, 4, r0, c15, c0, 0 ; Read periph base address
LDR r0, [r0, #0x604] ; Read count register
LDR r0, [r0, #0x200] ; Read global timer count low register
IF {INTER} = {TRUE}
BX lr ; Return to caller
@@ -78,4 +80,3 @@ _tx_thread_smp_time_get
ENDIF
END
ports_smp/cortex_a5_smp/gnu/src/tx_thread_smp_time_get.S
+3 -2
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -8,6 +9,7 @@
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
@
@ Some portions generated by Codex (GPT-5).
@
@/**************************************************************************/
@/**************************************************************************/
@@ -71,7 +73,7 @@
_tx_thread_smp_time_get:
MRC p15, 4, r0, c15, c0, 0 @ Read periph base address
LDR r0, [r0, #0x604] @ Read count register
LDR r0, [r0, #0x200] @ Read global timer count low register
#ifdef __THUMB_INTERWORK
BX lr @ Return to caller
@@ -79,4 +81,3 @@ _tx_thread_smp_time_get:
MOV pc, lr @ Return to caller
#endif
ports_smp/cortex_a7_smp/ac5/src/tx_thread_smp_time_get.s
+3 -3
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -8,6 +9,7 @@
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
; Some portions generated by Codex (GPT-5).
;
;/**************************************************************************/
;/**************************************************************************/
@@ -68,8 +70,7 @@
EXPORT _tx_thread_smp_time_get
_tx_thread_smp_time_get
MRC p15, 4, r0, c15, c0, 0 ; Read periph base address
LDR r0, [r0, #0x604] ; Read count register
MRRC p15, 0, r0, r1, c14 ; Read generic timer physical count
IF {INTER} = {TRUE}
BX lr ; Return to caller
@@ -78,4 +79,3 @@ _tx_thread_smp_time_get
ENDIF
END
ports_smp/cortex_a7_smp/gnu/src/tx_thread_smp_time_get.S
+3 -3
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -8,6 +9,7 @@
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
@
@ Some portions generated by Codex (GPT-5).
@
@/**************************************************************************/
@/**************************************************************************/
@@ -70,8 +72,7 @@
.type _tx_thread_smp_time_get,function
_tx_thread_smp_time_get:
MRC p15, 4, r0, c15, c0, 0 @ Read periph base address
LDR r0, [r0, #0x604] @ Read count register
MRRC p15, 0, r0, r1, c14 @ Read generic timer physical count
#ifdef __THUMB_INTERWORK
BX lr @ Return to caller
@@ -79,4 +80,3 @@ _tx_thread_smp_time_get:
MOV pc, lr @ Return to caller
#endif
ports_smp/cortex_a9_smp/ac5/src/tx_thread_smp_time_get.s
+3 -2
View File
@@ -1,5 +1,6 @@
;/***************************************************************************
; * Copyright (c) 2024 Microsoft Corporation
; * Copyright (c) 2026-present Eclipse ThreadX contributors
; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
@@ -8,6 +9,7 @@
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
; Some portions generated by Codex (GPT-5).
;
;/**************************************************************************/
;/**************************************************************************/
@@ -69,7 +71,7 @@
_tx_thread_smp_time_get
MRC p15, 4, r0, c15, c0, 0 ; Read periph base address
LDR r0, [r0, #0x604] ; Read count register
LDR r0, [r0, #0x200] ; Read global timer count low register
IF {INTER} = {TRUE}
BX lr ; Return to caller
@@ -78,4 +80,3 @@ _tx_thread_smp_time_get
ENDIF
END
ports_smp/cortex_a9_smp/gnu/src/tx_thread_smp_time_get.S
+3 -3
View File
@@ -1,5 +1,6 @@
@/***************************************************************************
@ * Copyright (c) 2024 Microsoft Corporation
@ * Copyright (c) 2026-present Eclipse ThreadX contributors
@ *
@ * This program and the accompanying materials are made available under the
@ * terms of the MIT License which is available at
@@ -8,6 +9,7 @@
@ * SPDX-License-Identifier: MIT
@ **************************************************************************/
@
@ Some portions generated by Codex (GPT-5).
@
@/**************************************************************************/
@/**************************************************************************/
@@ -71,12 +73,10 @@
_tx_thread_smp_time_get:
MRC p15, 4, r0, c15, c0, 0 @ Read periph base address
LDR r0, [r0, #0x604] @ Read count register
LDR r0, [r0, #0x200] @ Read global timer count low register
#ifdef __THUMB_INTERWORK
BX lr @ Return to caller
#else
MOV pc, lr @ Return to caller
#endif
ports_smp/cortex_r8_smp/ac5/src/tx_thread_smp_time_get.s
+2 -1
View File
@@ -9,6 +9,7 @@
* SPDX-License-Identifier: MIT
**************************************************************************/
// Some portions generated by Codex (GPT-5).
/**************************************************************************/
/**************************************************************************/
@@ -57,7 +58,7 @@
_tx_thread_smp_time_get
MRC p15, 4, r0, c15, c0, 0 // Read periph base address
LDR r0, [r0, #0x604] // Read count register
LDR r0, [r0, #0x200] // Read global timer count low register
IF {INTER} = {TRUE}
BX lr // Return to caller