mirror of
https://github.com/rene-dev/stmbl.git
synced 2026-02-05 18:01:21 +08:00
merge master
This commit is contained in:
27
.clang-format
Normal file
27
.clang-format
Normal file
@@ -0,0 +1,27 @@
|
||||
---
|
||||
BasedOnStyle: LLVM
|
||||
AccessModifierOffset: '2'
|
||||
AlignAfterOpenBracket: Align
|
||||
AlignConsecutiveAssignments: 'true'
|
||||
AlignOperands: 'false'
|
||||
AlignTrailingComments: 'true'
|
||||
SortIncludes: 'false'
|
||||
ColumnLimit: '0'
|
||||
IndentCaseLabels: 'true'
|
||||
IndentWidth: '2'
|
||||
KeepEmptyLinesAtTheStartOfBlocks: 'false'
|
||||
MaxEmptyLinesToKeep: '2'
|
||||
SpaceAfterCStyleCast: 'false'
|
||||
SpaceBeforeAssignmentOperators: 'true'
|
||||
SpaceBeforeParens: Never
|
||||
SpaceInEmptyParentheses: 'false'
|
||||
SpacesBeforeTrailingComments: '2'
|
||||
SpacesInAngles: 'false'
|
||||
SpacesInCStyleCastParentheses: 'false'
|
||||
SpacesInContainerLiterals: 'false'
|
||||
SpacesInParentheses: 'false'
|
||||
SpacesInSquareBrackets: 'false'
|
||||
TabWidth: '2'
|
||||
UseTab: Never
|
||||
|
||||
...
|
||||
3
.gitignore
vendored
3
.gitignore
vendored
@@ -14,6 +14,9 @@
|
||||
*.list
|
||||
*.out
|
||||
*.pyc
|
||||
|
||||
.vscode/*
|
||||
|
||||
tools/pycrc*
|
||||
|
||||
sim/sim
|
||||
|
||||
15
Makefile
15
Makefile
@@ -48,8 +48,11 @@ COMPS += shared/comps/dc.c
|
||||
COMPS += shared/comps/ypid.c
|
||||
COMPS += shared/comps/fault.c
|
||||
COMPS += shared/comps/pid.c
|
||||
COMPS += shared/comps/spid.c
|
||||
COMPS += shared/comps/pe.c
|
||||
COMPS += shared/comps/pmsm_limits.c
|
||||
COMPS += shared/comps/pmsm_ttc.c
|
||||
COMPS += shared/comps/acim_ttc.c
|
||||
COMPS += shared/comps/uvw.c
|
||||
COMPS += shared/comps/fanuc.c
|
||||
COMPS += shared/comps/fb_switch.c
|
||||
@@ -68,7 +71,6 @@ SOURCES += src/version.c
|
||||
SOURCES += src/syscalls.c
|
||||
|
||||
SOURCES += shared/crc8.c
|
||||
SOURCES += shared/crc16.c
|
||||
SOURCES += shared/angle.c
|
||||
SOURCES += shared/hal.c
|
||||
SOURCES += shared/commands.c
|
||||
@@ -253,6 +255,17 @@ boot_btflash: boot
|
||||
hv:
|
||||
$(MAKE) -f stm32f103/Makefile
|
||||
|
||||
f3:
|
||||
$(MAKE) -f stm32f303/Makefile
|
||||
|
||||
f3_flash:
|
||||
$(MAKE) -f stm32f303/Makefile flash
|
||||
|
||||
f3_btflash:
|
||||
$(MAKE) -f stm32f303/Makefile btburn
|
||||
|
||||
format:
|
||||
find src/ f3dfu/ bootloader/ stm32f103/ stm32f303/ shared/ inc/ -iname *.h -o -iname *.c | xargs clang-format -i
|
||||
|
||||
# Display compiler version information
|
||||
#
|
||||
|
||||
@@ -22,63 +22,63 @@
|
||||
#include "version.h"
|
||||
|
||||
#if __GNUC__ < 5
|
||||
#error gcc to old (< 5.0)
|
||||
#error gcc to old (< 5.0)
|
||||
#endif
|
||||
|
||||
#define APP_START 0x08010000
|
||||
#define APP_END 0x08100000
|
||||
#define APP_END 0x08100000
|
||||
#define APP_RANGE_VALID(a, s) (!(((a) | (s)) & 3) && (a) >= APP_START && ((a) + (s)) <= APP_END)
|
||||
#define VERSION_INFO_OFFSET 0x188
|
||||
static volatile const struct version_info *app_info = (void*)(APP_START + VERSION_INFO_OFFSET);
|
||||
static volatile const struct version_info *app_info = (void *)(APP_START + VERSION_INFO_OFFSET);
|
||||
|
||||
static int app_ok(void)
|
||||
{
|
||||
if (!APP_RANGE_VALID(APP_START, app_info->image_size)) {
|
||||
return 0;
|
||||
}
|
||||
CRC_ResetDR();
|
||||
uint32_t crc = CRC_CalcBlockCRC((uint32_t *) APP_START, app_info->image_size / 4);
|
||||
static int app_ok(void) {
|
||||
if(!APP_RANGE_VALID(APP_START, app_info->image_size)) {
|
||||
return 0;
|
||||
}
|
||||
CRC_ResetDR();
|
||||
uint32_t crc = CRC_CalcBlockCRC((uint32_t *)APP_START, app_info->image_size / 4);
|
||||
|
||||
if (crc != 0) {
|
||||
return 0;
|
||||
}
|
||||
if(crc != 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitDef;
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_CRC, ENABLE);
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_13;
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitDef.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitDef.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitDef.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
uint32_t pin = !GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_13);
|
||||
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE); // reset gpio a
|
||||
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, DISABLE);
|
||||
int main(void) {
|
||||
GPIO_InitTypeDef GPIO_InitDef;
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_CRC, ENABLE);
|
||||
GPIO_InitDef.GPIO_Pin = GPIO_Pin_13;
|
||||
GPIO_InitDef.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_InitDef.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitDef.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitDef.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_Init(GPIOA, &GPIO_InitDef);
|
||||
uint32_t pin = !GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_13);
|
||||
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE); // reset gpio a
|
||||
RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, DISABLE);
|
||||
|
||||
void (*SysMemBootJump)(void);
|
||||
if ( (*((unsigned long *)0x2001C000) == 0xDEADBEEF) || pin || !app_ok()) {//Memory map, datasheet
|
||||
*((unsigned long *)0x2001C000) = 0xCAFEFEED; //Reset bootloader trigger
|
||||
__set_MSP(0x20001000);
|
||||
//Point the PC to the System Memory reset vector (+4)
|
||||
//AN2606
|
||||
//Table 64. Bootloader device-dependent parameters
|
||||
SysMemBootJump = (void (*)(void)) (*((uint32_t *) 0x1FFF0004));
|
||||
SysMemBootJump();
|
||||
while (1);
|
||||
} else {
|
||||
uint32_t stack = ((const uint32_t *) APP_START)[0];
|
||||
uint32_t entry = ((const uint32_t *) APP_START)[1];
|
||||
asm volatile(
|
||||
"msr msp, %0 \n\t"
|
||||
"bx %1 \n\t"
|
||||
: : "r" (stack), "r" (entry)
|
||||
);
|
||||
while (1);
|
||||
}
|
||||
void (*SysMemBootJump)(void);
|
||||
if((*((unsigned long *)0x2001C000) == 0xDEADBEEF) || pin || !app_ok()) { //Memory map, datasheet
|
||||
*((unsigned long *)0x2001C000) = 0xCAFEFEED; //Reset bootloader trigger
|
||||
__set_MSP(0x20001000);
|
||||
//Point the PC to the System Memory reset vector (+4)
|
||||
//AN2606
|
||||
//Table 64. Bootloader device-dependent parameters
|
||||
SysMemBootJump = (void (*)(void))(*((uint32_t *)0x1FFF0004));
|
||||
SysMemBootJump();
|
||||
while(1)
|
||||
;
|
||||
} else {
|
||||
uint32_t stack = ((const uint32_t *)APP_START)[0];
|
||||
uint32_t entry = ((const uint32_t *)APP_START)[1];
|
||||
asm volatile(
|
||||
"msr msp, %0 \n\t"
|
||||
"bx %1 \n\t"
|
||||
:
|
||||
: "r"(stack), "r"(entry));
|
||||
while(1)
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -48,8 +48,7 @@
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
void NMI_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -57,11 +56,9 @@ void NMI_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
void HardFault_Handler(void) {
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
while(1) {
|
||||
}
|
||||
}
|
||||
|
||||
@@ -70,11 +67,9 @@ void HardFault_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
void MemManage_Handler(void) {
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
while(1) {
|
||||
}
|
||||
}
|
||||
|
||||
@@ -83,11 +78,9 @@ void MemManage_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
void BusFault_Handler(void) {
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
while(1) {
|
||||
}
|
||||
}
|
||||
|
||||
@@ -96,11 +89,9 @@ void BusFault_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
void UsageFault_Handler(void) {
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
while(1) {
|
||||
}
|
||||
}
|
||||
|
||||
@@ -109,8 +100,7 @@ void UsageFault_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
void SVC_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -118,8 +108,7 @@ void SVC_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
void DebugMon_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -127,8 +116,7 @@ void DebugMon_Handler(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
void PendSV_Handler(void) {
|
||||
}
|
||||
|
||||
/**
|
||||
|
||||
@@ -139,19 +139,19 @@
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. \
|
||||
This value must be a multiple of 0x200. */
|
||||
|
||||
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
|
||||
#define PLL_M 8
|
||||
#define PLL_N 336
|
||||
#define PLL_M 8
|
||||
#define PLL_N 336
|
||||
|
||||
/* SYSCLK = PLL_VCO / PLL_P */
|
||||
#define PLL_P 2
|
||||
#define PLL_P 2
|
||||
|
||||
/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
|
||||
#define PLL_Q 7
|
||||
#define PLL_Q 7
|
||||
|
||||
/**
|
||||
* @}
|
||||
@@ -169,9 +169,9 @@
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint32_t SystemCoreClock = 168000000;
|
||||
uint32_t SystemCoreClock = 168000000;
|
||||
|
||||
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
|
||||
/**
|
||||
* @}
|
||||
@@ -183,7 +183,7 @@
|
||||
|
||||
static void SetSysClock(void);
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
|
||||
/**
|
||||
@@ -201,9 +201,8 @@ static void SetSysClock(void);
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* Set CP10 and CP11 to full access */
|
||||
void SystemInit(void) {
|
||||
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* Set CP10 and CP11 to full access */
|
||||
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set HSION bit */
|
||||
@@ -232,7 +231,7 @@ void SystemInit(void)
|
||||
AHB/APBx prescalers and Flash settings ----------------------------------*/
|
||||
SetSysClock();
|
||||
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||
#else
|
||||
@@ -276,41 +275,36 @@ void SystemInit(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
void SystemCoreClockUpdate(void) {
|
||||
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
switch(tmp) {
|
||||
case 0x00: /* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04: /* HSE used as system clock source */
|
||||
case 0x04: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08: /* PLL P used as system clock source */
|
||||
case 0x08: /* PLL P used as system clock source */
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
||||
SYSCLK = PLL_VCO / PLL_P
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||
|
||||
if (pllsource != 0)
|
||||
{
|
||||
if(pllsource != 0) {
|
||||
/* HSE used as PLL clock source */
|
||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
/* HSI used as PLL clock source */
|
||||
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
}
|
||||
|
||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||
SystemCoreClock = pllvco/pllp;
|
||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> 16) + 1) * 2;
|
||||
SystemCoreClock = pllvco / pllp;
|
||||
break;
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
@@ -331,34 +325,28 @@ void SystemCoreClockUpdate(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
static void SetSysClock(void)
|
||||
{
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSE) used as System clock source */
|
||||
/******************************************************************************/
|
||||
static void SetSysClock(void) {
|
||||
/******************************************************************************/
|
||||
/* PLL (clocked by HSE) used as System clock source */
|
||||
/******************************************************************************/
|
||||
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;
|
||||
|
||||
/* Enable HSE */
|
||||
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
do {
|
||||
HSEStatus = RCC->CR & RCC_CR_HSERDY;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
|
||||
|
||||
if ((RCC->CR & RCC_CR_HSERDY) != RESET)
|
||||
{
|
||||
if((RCC->CR & RCC_CR_HSERDY) != RESET) {
|
||||
HSEStatus = (uint32_t)0x01;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
HSEStatus = (uint32_t)0x00;
|
||||
}
|
||||
|
||||
if (HSEStatus == (uint32_t)0x01)
|
||||
{
|
||||
if(HSEStatus == (uint32_t)0x01) {
|
||||
/* Enable high performance mode, System frequency up to 168 MHz */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
@@ -373,34 +361,31 @@ static void SetSysClock(void)
|
||||
RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
|
||||
|
||||
/* Configure the main PLL */
|
||||
RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
|
||||
(RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
|
||||
RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
|
||||
(RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
|
||||
|
||||
/* Enable the main PLL */
|
||||
RCC->CR |= RCC_CR_PLLON;
|
||||
|
||||
/* Wait till the main PLL is ready */
|
||||
while((RCC->CR & RCC_CR_PLLRDY) == 0)
|
||||
{
|
||||
while((RCC->CR & RCC_CR_PLLRDY) == 0) {
|
||||
}
|
||||
|
||||
/* Configure Flash prefetch, Instruction cache, Data cache and wait state */
|
||||
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_LATENCY_5WS;
|
||||
|
||||
/* Select the main PLL as system clock source */
|
||||
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
|
||||
RCC->CFGR &= (uint32_t)((uint32_t) ~(RCC_CFGR_SW));
|
||||
RCC->CFGR |= RCC_CFGR_SW_PLL;
|
||||
|
||||
/* Wait till the main PLL is used as system clock source */
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
while((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
|
||||
;
|
||||
{
|
||||
}
|
||||
}
|
||||
else
|
||||
{ /* If HSE fails to start-up, the application will have wrong clock
|
||||
} else { /* If HSE fails to start-up, the application will have wrong clock
|
||||
configuration. User can add here some code to deal with this error */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -418,10 +403,9 @@ static void SetSysClock(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||
/*
|
||||
void SystemInit_ExtMemCtl(void) {
|
||||
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||
/*
|
||||
+-------------------+--------------------+------------------+------------------+
|
||||
+ SRAM pins assignment +
|
||||
+-------------------+--------------------+------------------+------------------+
|
||||
@@ -440,66 +424,66 @@ void SystemInit_ExtMemCtl(void)
|
||||
| | PE15 <-> FSMC_D12 |
|
||||
+-------------------+--------------------+
|
||||
*/
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||
RCC->AHB1ENR = 0x00000078;
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||
RCC->AHB1ENR = 0x00000078;
|
||||
|
||||
/* Connect PDx pins to FSMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00cc00cc;
|
||||
GPIOD->AFR[1] = 0xcc0ccccc;
|
||||
GPIOD->AFR[0] = 0x00cc00cc;
|
||||
GPIOD->AFR[1] = 0xcc0ccccc;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xaaaa0a0a;
|
||||
GPIOD->MODER = 0xaaaa0a0a;
|
||||
/* Configure PDx pins speed to 100 MHz */
|
||||
GPIOD->OSPEEDR = 0xffff0f0f;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FSMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xc00cc0cc;
|
||||
GPIOE->AFR[1] = 0xcccccccc;
|
||||
GPIOE->AFR[0] = 0xc00cc0cc;
|
||||
GPIOE->AFR[1] = 0xcccccccc;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xaaaa828a;
|
||||
GPIOE->MODER = 0xaaaa828a;
|
||||
/* Configure PEx pins speed to 100 MHz */
|
||||
GPIOE->OSPEEDR = 0xffffc3cf;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FSMC Alternate function */
|
||||
GPIOF->AFR[0] = 0x00cccccc;
|
||||
GPIOF->AFR[1] = 0xcccc0000;
|
||||
GPIOF->AFR[0] = 0x00cccccc;
|
||||
GPIOF->AFR[1] = 0xcccc0000;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xaa000aaa;
|
||||
GPIOF->MODER = 0xaa000aaa;
|
||||
/* Configure PFx pins speed to 100 MHz */
|
||||
GPIOF->OSPEEDR = 0xff000fff;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FSMC Alternate function */
|
||||
GPIOG->AFR[0] = 0x00cccccc;
|
||||
GPIOG->AFR[1] = 0x000000c0;
|
||||
GPIOG->AFR[0] = 0x00cccccc;
|
||||
GPIOG->AFR[1] = 0x000000c0;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0x00080aaa;
|
||||
GPIOG->MODER = 0x00080aaa;
|
||||
/* Configure PGx pins speed to 100 MHz */
|
||||
GPIOG->OSPEEDR = 0x000c0fff;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
/*-- FSMC Configuration ------------------------------------------------------*/
|
||||
/*-- FSMC Configuration ------------------------------------------------------*/
|
||||
/* Enable the FSMC interface clock */
|
||||
RCC->AHB3ENR = 0x00000001;
|
||||
RCC->AHB3ENR = 0x00000001;
|
||||
|
||||
/* Configure and enable Bank1_SRAM2 */
|
||||
FSMC_Bank1->BTCR[2] = 0x00001015;
|
||||
FSMC_Bank1->BTCR[3] = 0x00010603;//0x00010400;
|
||||
FSMC_Bank1->BTCR[3] = 0x00010603; //0x00010400;
|
||||
FSMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||
/*
|
||||
/*
|
||||
Bank1_SRAM2 is configured as follow:
|
||||
|
||||
p.FSMC_AddressSetupTime = 3;//0;
|
||||
@@ -526,7 +510,6 @@ void SystemInit_ExtMemCtl(void)
|
||||
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
|
||||
*/
|
||||
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
|
||||
|
||||
@@ -1,8 +1,7 @@
|
||||
#include "version.h"
|
||||
|
||||
volatile const struct version_info version_info = {
|
||||
.product_name = "STMBL-Bootloader",
|
||||
.major = 0,
|
||||
.minor = 9,
|
||||
.patch = 0
|
||||
};
|
||||
.product_name = "STMBL-Bootloader",
|
||||
.major = 0,
|
||||
.minor = 9,
|
||||
.patch = 0};
|
||||
|
||||
21
conf/amk.txt
Normal file
21
conf/amk.txt
Normal file
@@ -0,0 +1,21 @@
|
||||
link pid
|
||||
link acim
|
||||
link enc_fb0
|
||||
link misc
|
||||
conf0.r = 1.4
|
||||
conf0.l = 0.0013
|
||||
conf0.j = 0.006
|
||||
conf0.max_force = 9
|
||||
conf0.max_ac_cur = 13
|
||||
conf0.mot_fb_res = 4096
|
||||
conf0.cmd_res = 4096
|
||||
acim_ttc0.slip_n = 3
|
||||
acim_ttc0.cur_n = 6
|
||||
acim_ttc0.torque_n = 9
|
||||
conf0.polecount = 2
|
||||
conf0.vel_p = 1000
|
||||
conf0.vel_i = 1
|
||||
conf0.max_sat = 10
|
||||
conf0.cur_p = 1
|
||||
pe0.cap = 0.00136
|
||||
rev1.in = enc_fb0.ipos
|
||||
@@ -1,53 +1,17 @@
|
||||
conf0.r = 5.400000
|
||||
conf0.l = 0.008200
|
||||
conf0.j = 0.000027
|
||||
conf0.psi = 0.135000
|
||||
conf0.polecount = 1.000000
|
||||
conf0.mot_type = 3.000000
|
||||
conf0.out_rev = 0.000000
|
||||
conf0.high_motor_temp = 80.000000
|
||||
conf0.max_motor_temp = 100.000000
|
||||
conf0.phase_time = 1.000000
|
||||
conf0.phase_cur = 6.000000
|
||||
conf0.max_vel = 837.750000
|
||||
conf0.max_acc = 83775.000000
|
||||
conf0.max_force = 1.700000
|
||||
conf0.max_dc_cur = 10.000000
|
||||
conf0.max_ac_cur = 10.000000
|
||||
conf0.fb_type = 1.000000
|
||||
conf0.fb_polecount = 1.000000
|
||||
conf0.fb_offset = 1.540000
|
||||
conf0.fb_rev = 0.000000
|
||||
conf0.fb_res = 2048.000000
|
||||
conf0.autophase = 0.000000
|
||||
conf0.cmd_type = 1.000000
|
||||
conf0.cmd_unit = 0.000000
|
||||
conf0.cmd_rev = 0.000000
|
||||
conf0.cmd_res = 2000.000000
|
||||
conf0.en_condition = 0.000000
|
||||
conf0.error_out = 0.000000
|
||||
conf0.pos_static = 0.000000
|
||||
conf0.sin_offset = 0.000000
|
||||
conf0.cos_offset = 0.000000
|
||||
conf0.sin_gain = 1.000000
|
||||
conf0.cos_gain = 1.000000
|
||||
conf0.max_dc_volt = 370.000000
|
||||
conf0.max_hv_temp = 90.000000
|
||||
conf0.max_core_temp = 55.000000
|
||||
conf0.max_pos_error = 1.570796
|
||||
conf0.high_dc_volt = 350.000000
|
||||
conf0.low_dc_volt = 12.000000
|
||||
conf0.high_hv_temp = 70.000000
|
||||
conf0.fan_hv_temp = 60.000000
|
||||
conf0.fan_core_temp = 450.000000
|
||||
conf0.fan_motor_temp = 60.000000
|
||||
conf0.p = 1.000000
|
||||
conf0.pos_p = 150.000000
|
||||
conf0.vel_p = 1.000000
|
||||
conf0.acc_p = 0.500000
|
||||
conf0.acc_pi = 50.000000
|
||||
conf0.cur_p = 0.500000
|
||||
conf0.cur_i = 0.001000
|
||||
conf0.cur_ff = 1.000000
|
||||
conf0.cur_ind = 0.900000
|
||||
conf0.max_sat = 0.000000
|
||||
link pid
|
||||
link pmsm
|
||||
link enc_fb0
|
||||
link misc
|
||||
conf0.r = 1.4
|
||||
conf0.l = 0.0013
|
||||
conf0.j = 0.0000268
|
||||
conf0.max_force = 4
|
||||
conf0.max_ac_cur = 13
|
||||
conf0.mot_fb_res = 2048
|
||||
conf0.cmd_res = 2048
|
||||
conf0.mot_fb_rev = 1
|
||||
conf0.polecount = 1
|
||||
hv0.mode = 2
|
||||
hv0.pos = 0
|
||||
conf0.psi = 0.2
|
||||
conf0.cur_p = 0.7
|
||||
53
conf/experimental/e240.txt
Normal file
53
conf/experimental/e240.txt
Normal file
@@ -0,0 +1,53 @@
|
||||
conf0.r = 5.400000
|
||||
conf0.l = 0.008200
|
||||
conf0.j = 0.000027
|
||||
conf0.psi = 0.135000
|
||||
conf0.polecount = 1.000000
|
||||
conf0.mot_type = 3.000000
|
||||
conf0.out_rev = 0.000000
|
||||
conf0.high_motor_temp = 80.000000
|
||||
conf0.max_motor_temp = 100.000000
|
||||
conf0.phase_time = 1.000000
|
||||
conf0.phase_cur = 6.000000
|
||||
conf0.max_vel = 837.750000
|
||||
conf0.max_acc = 83775.000000
|
||||
conf0.max_force = 1.700000
|
||||
conf0.max_dc_cur = 10.000000
|
||||
conf0.max_ac_cur = 10.000000
|
||||
conf0.fb_type = 1.000000
|
||||
conf0.fb_polecount = 1.000000
|
||||
conf0.fb_offset = 1.540000
|
||||
conf0.fb_rev = 0.000000
|
||||
conf0.fb_res = 2048.000000
|
||||
conf0.autophase = 0.000000
|
||||
conf0.cmd_type = 1.000000
|
||||
conf0.cmd_unit = 0.000000
|
||||
conf0.cmd_rev = 0.000000
|
||||
conf0.cmd_res = 2000.000000
|
||||
conf0.en_condition = 0.000000
|
||||
conf0.error_out = 0.000000
|
||||
conf0.pos_static = 0.000000
|
||||
conf0.sin_offset = 0.000000
|
||||
conf0.cos_offset = 0.000000
|
||||
conf0.sin_gain = 1.000000
|
||||
conf0.cos_gain = 1.000000
|
||||
conf0.max_dc_volt = 370.000000
|
||||
conf0.max_hv_temp = 90.000000
|
||||
conf0.max_core_temp = 55.000000
|
||||
conf0.max_pos_error = 1.570796
|
||||
conf0.high_dc_volt = 350.000000
|
||||
conf0.low_dc_volt = 12.000000
|
||||
conf0.high_hv_temp = 70.000000
|
||||
conf0.fan_hv_temp = 60.000000
|
||||
conf0.fan_core_temp = 450.000000
|
||||
conf0.fan_motor_temp = 60.000000
|
||||
conf0.p = 1.000000
|
||||
conf0.pos_p = 150.000000
|
||||
conf0.vel_p = 1.000000
|
||||
conf0.acc_p = 0.500000
|
||||
conf0.acc_pi = 50.000000
|
||||
conf0.cur_p = 0.500000
|
||||
conf0.cur_i = 0.001000
|
||||
conf0.cur_ff = 1.000000
|
||||
conf0.cur_ind = 0.900000
|
||||
conf0.max_sat = 0.000000
|
||||
53
conf/experimental/harmonic.txt
Normal file
53
conf/experimental/harmonic.txt
Normal file
@@ -0,0 +1,53 @@
|
||||
conf0.r = 0.200000
|
||||
conf0.l = 0.005000
|
||||
conf0.j = 0.000500
|
||||
conf0.psi = 0.003427
|
||||
conf0.polecount = 12.000000
|
||||
conf0.mot_type = 0.000000
|
||||
conf0.out_rev = 1.000000
|
||||
conf0.high_motor_temp = 80.000000
|
||||
conf0.max_motor_temp = 100.000000
|
||||
conf0.phase_time = 0.500000
|
||||
conf0.phase_cur = 2.000000
|
||||
conf0.max_vel = 837.750000
|
||||
conf0.max_acc = 83775.000000
|
||||
conf0.max_force = 2.000000
|
||||
conf0.max_dc_cur = 10.000000
|
||||
conf0.max_ac_cur = 6.000000
|
||||
conf0.fb_type = 1.000000
|
||||
conf0.fb_polecount = 1.000000
|
||||
conf0.fb_offset = 1.540000
|
||||
conf0.fb_rev = 1.000000
|
||||
conf0.fb_res = 2000.000000
|
||||
conf0.autophase = 1.000000
|
||||
conf0.cmd_type = 1.000000
|
||||
conf0.cmd_unit = 0.000000
|
||||
conf0.cmd_rev = 0.000000
|
||||
conf0.cmd_res = 2000.000000
|
||||
conf0.en_condition = 0.000000
|
||||
conf0.error_out = 0.000000
|
||||
conf0.pos_static = 0.000000
|
||||
conf0.sin_offset = 0.000000
|
||||
conf0.cos_offset = 0.000000
|
||||
conf0.sin_gain = 1.030000
|
||||
conf0.cos_gain = 1.000000
|
||||
conf0.max_dc_volt = 370.000000
|
||||
conf0.max_hv_temp = 90.000000
|
||||
conf0.max_core_temp = 55.000000
|
||||
conf0.max_pos_error = 1.570796
|
||||
conf0.high_dc_volt = 350.000000
|
||||
conf0.low_dc_volt = 12.000000
|
||||
conf0.high_hv_temp = 70.000000
|
||||
conf0.fan_hv_temp = 60.000000
|
||||
conf0.fan_core_temp = 450.000000
|
||||
conf0.fan_motor_temp = 60.000000
|
||||
conf0.g = 0.990000
|
||||
conf0.pos_p = 100.000000
|
||||
conf0.vel_p = 1000.000000
|
||||
conf0.vel_i = 5.000000
|
||||
conf0.vel_g = 1.000000
|
||||
conf0.cur_p = 0.040000
|
||||
conf0.cur_i = 0.000100
|
||||
conf0.cur_ff = 0.000000
|
||||
conf0.cur_ind = 0.000000
|
||||
conf0.max_sat = 0.200000
|
||||
@@ -1,14 +1,17 @@
|
||||
load psi
|
||||
psi0.rt_prio = 10
|
||||
psi0.dc_volt = hv0.dc_volt
|
||||
psi0.u = hv0.u_fb
|
||||
psi0.v = hv0.v_fb
|
||||
psi0.w = hv0.w_fb
|
||||
psi0.vel = net0.fb_d
|
||||
psi0.vel = vel1.vel
|
||||
psi0.polecount = conf0.polecount
|
||||
net0.enable = 0
|
||||
fault0.en = 0
|
||||
fault0.brake_release = 1
|
||||
vel1.en = 1
|
||||
io0.brake = 1
|
||||
term0.wave0 = psi0.psi
|
||||
term0.wave1 = psi0.max_psi
|
||||
term0.gain0 = 500
|
||||
term0.gain1 = 500
|
||||
stop
|
||||
start
|
||||
17
conf/haas.txt
Normal file
17
conf/haas.txt
Normal file
@@ -0,0 +1,17 @@
|
||||
link pid
|
||||
link pmsm
|
||||
link enc_fb0
|
||||
link misc
|
||||
conf0.r = 1.4
|
||||
conf0.l = 0.0013
|
||||
conf0.j = 0.00124
|
||||
conf0.max_force = 4
|
||||
conf0.max_ac_cur = 13
|
||||
conf0.mot_fb_res = 8000
|
||||
conf0.cmd_res = 8000
|
||||
conf0.mot_fb_rev = 1
|
||||
conf0.polecount = 1
|
||||
hv0.phase_mode = 3
|
||||
hv0.pos = 0
|
||||
conf0.psi = 1.2
|
||||
conf0.cur_p = 0.7
|
||||
@@ -1,53 +1,12 @@
|
||||
conf0.r = 1.200000
|
||||
conf0.l = 0.005000
|
||||
conf0.j = 0.000050
|
||||
conf0.psi = 0.054500
|
||||
conf0.polecount = 2.000000
|
||||
conf0.mot_type = 0.000000
|
||||
conf0.out_rev = 0.000000
|
||||
conf0.high_motor_temp = 80.000000
|
||||
conf0.max_motor_temp = 100.000000
|
||||
conf0.phase_time = 0.500000
|
||||
conf0.phase_cur = 2.000000
|
||||
conf0.max_vel = 837.750000
|
||||
conf0.max_acc = 83775.000000
|
||||
conf0.max_force = 2.000000
|
||||
conf0.max_dc_cur = 10.000000
|
||||
conf0.max_ac_cur = 6.000000
|
||||
conf0.fb_type = 8.000000
|
||||
conf0.fb_polecount = 1.000000
|
||||
conf0.fb_offset = 1.540000
|
||||
conf0.fb_rev = 0.000000
|
||||
conf0.fb_res = 16384.000000
|
||||
conf0.autophase = 0.000000
|
||||
conf0.cmd_type = 1.000000
|
||||
conf0.cmd_unit = 0.000000
|
||||
conf0.cmd_rev = 0.000000
|
||||
conf0.cmd_res = 2000.000000
|
||||
conf0.en_condition = 0.000000
|
||||
conf0.error_out = 0.000000
|
||||
conf0.pos_static = 0.000000
|
||||
conf0.sin_offset = 0.000000
|
||||
conf0.cos_offset = 0.000000
|
||||
conf0.sin_gain = 1.030000
|
||||
conf0.cos_gain = 1.000000
|
||||
conf0.max_dc_volt = 370.000000
|
||||
conf0.max_hv_temp = 90.000000
|
||||
conf0.max_core_temp = 55.000000
|
||||
conf0.max_pos_error = 1.570796
|
||||
conf0.high_dc_volt = 350.000000
|
||||
conf0.low_dc_volt = 12.000000
|
||||
conf0.high_hv_temp = 70.000000
|
||||
conf0.fan_hv_temp = 60.000000
|
||||
conf0.fan_core_temp = 450.000000
|
||||
conf0.fan_motor_temp = 60.000000
|
||||
conf0.p = 1.000000
|
||||
conf0.pos_p = 100.000000
|
||||
conf0.vel_p = 2500.000000
|
||||
conf0.acc_p = 0.500000
|
||||
conf0.acc_pi = 100.000000
|
||||
conf0.cur_p = 0.500000
|
||||
conf0.cur_i = 0.001000
|
||||
conf0.cur_ff = 1.000000
|
||||
conf0.cur_ind = 0.900000
|
||||
conf0.max_sat = 0.200000
|
||||
link pid
|
||||
link pmsm
|
||||
link encm_fb0
|
||||
link misc
|
||||
conf0.r = 1.2
|
||||
conf0.l = 0.005
|
||||
conf0.j = 0.00005
|
||||
conf0.polecount = 2
|
||||
conf0.max_ac_cur = 10
|
||||
conf0.max_force = 4
|
||||
conf0.mot_fb_offset = 1.57
|
||||
conf0.max_vel = 837
|
||||
|
||||
23
conf/sm060.txt
Normal file
23
conf/sm060.txt
Normal file
@@ -0,0 +1,23 @@
|
||||
link pid
|
||||
link pmsm
|
||||
link enc_fb0
|
||||
link uvw_fb1
|
||||
link misc
|
||||
conf0.r = 1.6
|
||||
conf0.l = 0.005
|
||||
conf0.j = 0.000056
|
||||
conf0.max_force = 5.7
|
||||
conf0.max_ac_cur = 5
|
||||
conf0.mot_fb_res = 10000
|
||||
conf0.cmd_res = 10000
|
||||
conf0.mot_fb_rev = 1
|
||||
conf0.polecount = 5
|
||||
conf0.com_polecount = 5
|
||||
uvw0.p0 = 3
|
||||
uvw0.p1 = 2
|
||||
uvw0.p2 = 2
|
||||
uvw0.p3 = 1
|
||||
uvw0.p4 = 4
|
||||
uvw0.p5 = 6
|
||||
uvw0.p6 = 5
|
||||
uvw0.p7 = 0
|
||||
25
conf/template/acim.txt
Normal file
25
conf/template/acim.txt
Normal file
@@ -0,0 +1,25 @@
|
||||
load pmsm_limits
|
||||
load acim_ttc
|
||||
pmsm_limits0.rt_prio = 7
|
||||
acim_ttc0.rt_prio = 9
|
||||
pmsm_limits0.r = conf0.r
|
||||
pmsm_limits0.ld = conf0.l
|
||||
pmsm_limits0.lq = conf0.l
|
||||
pmsm_limits0.psi = conf0.psi
|
||||
pmsm_limits0.j = conf0.j
|
||||
pmsm_limits0.polecount = conf0.polecount
|
||||
pmsm_limits0.ac_volt = hv0.pwm_volt
|
||||
pmsm_limits0.iq = hv0.q_fb
|
||||
pmsm_limits0.id = hv0.d_fb
|
||||
pid0.max_torque = pmsm_limits0.max_torque
|
||||
pid0.min_torque = pmsm_limits0.min_torque
|
||||
pid0.max_vel = pmsm_limits0.abs_max_vel
|
||||
acim_ttc0.torque = pid0.torque_cor_cmd
|
||||
acim_ttc0.polecount = conf0.polecount
|
||||
acim_ttc0.vel = vel1.vel
|
||||
acim_ttc0.mode = 0
|
||||
hv0.q_cmd = acim_ttc0.iq
|
||||
hv0.d_cmd = acim_ttc0.id
|
||||
hv0.cmd_mode = 1
|
||||
hv0.phase_mode = 2
|
||||
hv0.pos = acim_ttc0.pos
|
||||
10
conf/template/encm_fb0.txt
Normal file
10
conf/template/encm_fb0.txt
Normal file
@@ -0,0 +1,10 @@
|
||||
load encm
|
||||
encm0.rt_prio = 2
|
||||
rev1.in = encm0.pos
|
||||
fb_switch0.mot_pos = rev1.out
|
||||
fb_switch0.mot_abs_pos = rev1.out
|
||||
fb_switch0.mot_polecount = conf0.mot_fb_polecount
|
||||
fb_switch0.mot_state = 3
|
||||
fault0.mot_fb_error = encm0.error
|
||||
io0.fb0y = encm0.error
|
||||
io0.fb0g = 1
|
||||
@@ -15,6 +15,7 @@ load iit
|
||||
load sim
|
||||
load stp
|
||||
load io
|
||||
load pe
|
||||
link conf
|
||||
adc0.rt_prio = 1
|
||||
reslimit0.rt_prio = 3
|
||||
@@ -33,7 +34,8 @@ hv0.rt_prio = 11
|
||||
iit0.rt_prio = 12
|
||||
sim0.rt_prio = 13
|
||||
stp0.rt_prio = 14
|
||||
term0.rt_prio = 15
|
||||
pe0.rt_prio = 15
|
||||
term0.rt_prio = 16
|
||||
rev0.rev = conf0.cmd_rev
|
||||
rev1.rev = conf0.mot_fb_rev
|
||||
rev2.rev = conf0.com_fb_rev
|
||||
@@ -118,3 +120,14 @@ hv0.scale = fault0.scale
|
||||
io0.fan = fault0.hv_fan
|
||||
io0.fault = fault0.fault
|
||||
io0.state = fault0.state
|
||||
pe0.udc = hv0.dc_volt
|
||||
pe0.idc = 0
|
||||
pe0.ud = 0
|
||||
pe0.uq = 0
|
||||
pe0.id = hv0.d_fb
|
||||
pe0.iq = hv0.q_fb
|
||||
pe0.torque = pid0.torque_cor_cmd
|
||||
pe0.vel = vel1.vel
|
||||
pe0.r = conf0.r
|
||||
pe0.j = conf0.j
|
||||
pe0.cap = 0.00054
|
||||
@@ -18,4 +18,5 @@ pid0.min_torque = pmsm_limits0.min_torque
|
||||
pid0.max_vel = pmsm_limits0.abs_max_vel
|
||||
pmsm_ttc0.torque = pid0.torque_cor_cmd
|
||||
hv0.q_cmd = pmsm_ttc0.cur
|
||||
hv0.mode = 1
|
||||
hv0.cmd_mode = 1
|
||||
hv0.phase_mode = 2
|
||||
|
||||
@@ -8,3 +8,5 @@ fb_switch0.com_abs_pos = rev2.out
|
||||
fb_switch0.com_state = 3
|
||||
fb_switch0.com_polecount = conf0.com_fb_polecount
|
||||
io0.fb1g = 1
|
||||
io0.fb1y = uvw0.led
|
||||
conf0.com_fb_polecount = conf0.polecount
|
||||
|
||||
@@ -30,14 +30,14 @@
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F3xx_HAL_CONF_H
|
||||
#define __STM32F3xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
@@ -47,8 +47,8 @@
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
|
||||
#define HAL_MODULE_ENABLED
|
||||
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CAN_MODULE_ENABLED */
|
||||
/*#define HAL_CEC_MODULE_ENABLED */
|
||||
@@ -92,16 +92,16 @@
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||
#if !defined(HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
/**
|
||||
* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
|
||||
* Timeout value
|
||||
*/
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
|
||||
#if !defined(HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
@@ -109,38 +109,38 @@
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#if !defined(HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
|
||||
* Timeout value
|
||||
*/
|
||||
#if !defined (HSI_STARTUP_TIMEOUT)
|
||||
#define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */
|
||||
#endif /* HSI_STARTUP_TIMEOUT */
|
||||
#if !defined(HSI_STARTUP_TIMEOUT)
|
||||
#define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */
|
||||
#endif /* HSI_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE ((uint32_t)40000)
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
#if !defined(LSI_VALUE)
|
||||
#define LSI_VALUE ((uint32_t)40000)
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz \
|
||||
The real value may vary depending on the variations \
|
||||
in voltage and temperature. */
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
#if !defined(LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Time out for LSE start up value in ms.
|
||||
*/
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
|
||||
#if !defined(LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
@@ -150,8 +150,8 @@
|
||||
* - External clock generated through external PLL component on EVAL 303 (based on MCO or crystal)
|
||||
* - External clock not generated on EVAL 373
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz*/
|
||||
#if !defined(EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
@@ -160,14 +160,14 @@
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
*/
|
||||
|
||||
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */
|
||||
#define USE_RTOS 0
|
||||
#define PREFETCH_ENABLE 1
|
||||
#define INSTRUCTION_CACHE_ENABLE 0
|
||||
#define DATA_CACHE_ENABLE 0
|
||||
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */
|
||||
#define USE_RTOS 0
|
||||
#define PREFETCH_ENABLE 1
|
||||
#define INSTRUCTION_CACHE_ENABLE 0
|
||||
#define DATA_CACHE_ENABLE 0
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
@@ -182,139 +182,139 @@
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_rcc.h"
|
||||
#include "stm32f3xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_gpio.h"
|
||||
#include "stm32f3xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_dma.h"
|
||||
#include "stm32f3xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_cortex.h"
|
||||
#include "stm32f3xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_adc.h"
|
||||
#include "stm32f3xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_can.h"
|
||||
#include "stm32f3xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_cec.h"
|
||||
#include "stm32f3xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_comp.h"
|
||||
#include "stm32f3xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_crc.h"
|
||||
#include "stm32f3xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_dac.h"
|
||||
#include "stm32f3xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_flash.h"
|
||||
#include "stm32f3xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_sram.h"
|
||||
#include "stm32f3xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_nor.h"
|
||||
#include "stm32f3xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_nand.h"
|
||||
#include "stm32f3xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
#include "stm32f3xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_hrtim.h"
|
||||
#include "stm32f3xx_hal_hrtim.h"
|
||||
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_i2c.h"
|
||||
#include "stm32f3xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_i2s.h"
|
||||
#include "stm32f3xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_irda.h"
|
||||
#include "stm32f3xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_iwdg.h"
|
||||
#include "stm32f3xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_opamp.h"
|
||||
#include "stm32f3xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_pcd.h"
|
||||
#include "stm32f3xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_pwr.h"
|
||||
#include "stm32f3xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_rtc.h"
|
||||
#include "stm32f3xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDADC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_sdadc.h"
|
||||
#include "stm32f3xx_hal_sdadc.h"
|
||||
#endif /* HAL_SDADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_smartcard.h"
|
||||
#include "stm32f3xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_smbus.h"
|
||||
#include "stm32f3xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_spi.h"
|
||||
#include "stm32f3xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_tim.h"
|
||||
#include "stm32f3xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TSC_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_tsc.h"
|
||||
#include "stm32f3xx_hal_tsc.h"
|
||||
#endif /* HAL_TSC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_uart.h"
|
||||
#include "stm32f3xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_usart.h"
|
||||
#include "stm32f3xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f3xx_hal_wwdg.h"
|
||||
#include "stm32f3xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
@@ -323,13 +323,13 @@
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
void assert_failed(uint8_t *file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -36,8 +36,8 @@
|
||||
#define __STM32F3xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user