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stmbltalk update, hv_update fix

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This commit is contained in:
crinq
2018-04-07 00:38:21 +02:00
parent ef41b7f58c
commit 77d77ecaf0
5 changed files with 86 additions and 125 deletions
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f3_boot/src/main.c
+26 -17
View File
@@ -78,8 +78,26 @@ void TIM8_UP_IRQHandler() {
if(rx_buf.header.slave_addr == 255 && rx_buf.header.len == (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4 && rx_buf.header.crc == HAL_CRC_Calculate(&hcrc, (uint32_t *)&(rx_buf.header.slave_addr), sizeof(packet_bootloader_t) / 4 - 1)){
//do stuff
//tx_buf.state = do_stuff();
switch(rx_buf.header.flags.cmd){
case NO_CMD:
break;
case WRITE_CONF:
break;
case READ_CONF:
break;
case DO_RESET:
HAL_FLASH_Lock();
HAL_NVIC_SystemReset();
break;
case BOOTLOADER:
break;
}
HAL_StatusTypeDef status = HAL_OK;
switch(rx_buf.cmd){
case BOOTLOADER_OPCODE_NOP:
break;
case BOOTLOADER_OPCODE_READ:
tx_buf.value = *(uint32_t *)rx_buf.addr;
tx_buf.addr = rx_buf.addr;
@@ -113,11 +131,6 @@ void TIM8_UP_IRQHandler() {
status = HAL_FLASHEx_Erase(&eraseinitstruct, &PageError);
break;
case BOOTLOADER_OPCODE_RESET:
HAL_FLASH_Lock();
HAL_NVIC_SystemReset();
break;
case BOOTLOADER_OPCODE_CRCCHECK:
if(app_ok()){
status = HAL_OK;
@@ -128,22 +141,20 @@ void TIM8_UP_IRQHandler() {
break;
}
if(status != HAL_OK){
tx_buf.header.flags.error = 1;
}
else{
tx_buf.header.flags.error = 0;
}
// if(status != HAL_OK){
// tx_buf.header.flags.conf_addr = 1;
// }
// else{
// tx_buf.header.flags.error = 0;
// }
tx_buf.cmd = rx_buf.cmd;
tx_buf.header.flags.counter = rx_buf.header.flags.counter;
tx_buf.header.slave_addr = 255;
tx_buf.header.len = (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4;
tx_buf.header.flags.packet_to_master = 1;
tx_buf.header.conf_addr = 0;
tx_buf.header.config.u32 = 0;
tx_buf.header.flags.read_same_addr = 0;
tx_buf.header.flags.write_to_conf = 0;
tx_buf.header.flags.cmd = NO_CMD;
tx_buf.header.crc = HAL_CRC_Calculate(&hcrc, (uint32_t *)&(tx_buf.header.slave_addr), sizeof(packet_bootloader_t) / 4 - 1);
rx_buf.header.crc = 0;
@@ -300,11 +311,9 @@ int main(void) {
tx_buf.header.slave_addr = 255;
tx_buf.header.len = (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4;
tx_buf.header.flags.packet_to_master = 1;
tx_buf.header.conf_addr = 0;
tx_buf.header.config.u32 = 0;
tx_buf.header.flags.read_same_addr = 0;
tx_buf.header.flags.write_to_conf = 0;
tx_buf.header.flags.cmd = NO_CMD;
// start rx DMA
DMA1_Channel3->CCR &= (uint16_t)(~DMA_CCR_EN);
shared/common.h
+3 -8
View File
@@ -34,10 +34,10 @@ typedef struct {
uint32_t addr;
uint32_t value;
enum{
BOOTLOADER_OPCODE_READ = 0,
BOOTLOADER_OPCODE_NOP = 0,
BOOTLOADER_OPCODE_READ,
BOOTLOADER_OPCODE_WRITE, // MEM[addr] = value
BOOTLOADER_OPCODE_PAGEERASE, // clear PAGE[addr]
BOOTLOADER_OPCODE_RESET,
BOOTLOADER_OPCODE_CRCCHECK, // CRC(APP) == 0
} cmd : 8;
enum {
@@ -67,6 +67,7 @@ typedef struct {
float vel;
union {
struct {
uint8_t buf;
uint8_t enable : 1;
enum packet_to_hv_cmd_type_t {
VOLT_MODE = 0,
@@ -79,12 +80,6 @@ typedef struct {
PHASE_180_2PH,
PHASE_180_3PH,
} phase_type : 3;
enum packet_to_hv_opcode_t {
PACKET_TO_HV_OPCODE_NOP = 0,
PACKET_TO_HV_OPCODE_RESET,
PACKET_TO_HV_OPCODE_BOOTLOADER,
} opcode : 3;
uint8_t buf;
} flags;
uint32_t padding;
};
shared/stmbl_talk.h
+9 -64
View File
@@ -8,10 +8,15 @@ typedef struct{
uint8_t len; // #data in byte
uint8_t conf_addr;
struct {
uint8_t read_same_addr : 1;
uint8_t write_to_conf : 1;
uint8_t packet_to_master : 1;
uint8_t error : 1;
enum stmbl_talk_cmd_t {
NO_CMD,
WRITE_CONF, // conf[rx.header.conf_addr] = rx.header.config.u32, tx.header.config.u32 = conf[tx.header.conf_addr++]
READ_CONF, // tx.header.config.u32 = conf[rx.header.conf_addr]
DO_RESET,
BOOTLOADER,
// ENABLE,
// DISABLE, // proc / conf data = default
} cmd : 4;
uint8_t counter : 4; // packet counter, mosi: ++, miso: same as request
} flags;
union{
@@ -21,63 +26,3 @@ typedef struct{
} config;
} stmbl_talk_header_t;
#pragma pack(pop)
/*
conf[0]
.
.
.
conf[] uint32_t protocol_features {
}
conf[] uint32_t api_key = hash(descr)
conf[] uint32_t *descr = {
enum {
FLOAT = "f",
UINT = "u",
INT = "i",
} type : 8;
enum {
SIZE_32 = "5",
SIZE_16 = "4",
SIZE_8 = "3",
SIZE_4 = "2",
SIZE_2 = "1",
SIZE_1 = "0",
} size : 8;
enum {
COUNT_32 = "5",
COUNT_16 = "4",
COUNT_8 = "3",
COUNT_4 = "2",
COUNT_2 = "1",
COUNT_1 = "0",
} count : 8;
enum {
READ = "r",
WRITE = "w",
} read_write : 8;
char name[32];
}
conf[] uint32_t conf {
uint8_t min_addr;
uint8_t max_addr;
uint4_t reply_div;
uint4_t reply_phase;
uint8_t max_reply_len;
}
conf[] uint32_t error {
enum {
NO_ERROR,
API_KEY_MISMATCH,
LEN_MISMATCH,
FW_ERROR,
} error_type : 8;
uint16_t fw_error;
}
conf[] = cmd{
RESET,
START_BOOTLOADER,
}
*/
src/comps/hv.c
+22 -26
View File
@@ -268,7 +268,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
ctx->timeout = 0;
if(ctx->from_hv.packet_from_hv.buf != 0xff){
if(ctx->from_hv.packet_from_hv.buf != 0x0){
rb_write(&hv_rx_buf, (void*)&(ctx->from_hv.packet_from_hv.buf), 1);
}
}
@@ -282,7 +282,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
case ERASE_FLASH:
if(ctx->from_hv.packet_from_hv.header.slave_addr == 255 && ctx->from_hv.packet_from_hv.header.len == (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4){
// from f3 bootloader
if(ctx->from_hv.packet_from_hv_bootloader.header.flags.error == 0 && ctx->from_hv.packet_from_hv_bootloader.cmd == BOOTLOADER_OPCODE_PAGEERASE){
if(/*ctx->from_hv.packet_from_hv_bootloader.header.flags.error == 0 && */ctx->from_hv.packet_from_hv_bootloader.cmd == BOOTLOADER_OPCODE_PAGEERASE){
ctx->timeout = 0;
flash_state = SEND_APP;
}
@@ -295,7 +295,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
case SEND_APP:
if(ctx->from_hv.packet_from_hv.header.slave_addr == 255 && ctx->from_hv.packet_from_hv.header.len == (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4){
// from f3 bootloader
if(ctx->from_hv.packet_from_hv_bootloader.header.flags.error == 0 && ctx->from_hv.packet_from_hv_bootloader.cmd == BOOTLOADER_OPCODE_WRITE && ctx->from_hv.packet_from_hv_bootloader.addr == 0x08004000 + ctx->addr * 4 && ctx->from_hv.packet_from_hv_bootloader.value == ((uint32_t *)&(_binary_obj_hvf3_hvf3_bin_start))[ctx->addr]){
if(/*ctx->from_hv.packet_from_hv_bootloader.header.flags.error == 0 && */ctx->from_hv.packet_from_hv_bootloader.cmd == BOOTLOADER_OPCODE_WRITE && ctx->from_hv.packet_from_hv_bootloader.addr == 0x08004000 + ctx->addr * 4 && ctx->from_hv.packet_from_hv_bootloader.value == ((uint32_t *)&(_binary_obj_hvf3_hvf3_bin_start))[ctx->addr]){
ctx->timeout = 0;
ctx->addr++;
}
@@ -311,7 +311,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
case CRC_CHECK:
if(ctx->from_hv.packet_from_hv.header.slave_addr == 255 && ctx->from_hv.packet_from_hv.header.len == (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4){
// from f3 bootloader
if(ctx->from_hv.packet_from_hv_bootloader.header.flags.error == 0 && ctx->from_hv.packet_from_hv_bootloader.cmd == BOOTLOADER_OPCODE_CRCCHECK){
if(/*ctx->from_hv.packet_from_hv_bootloader.header.flags.error == 0 && */ctx->from_hv.packet_from_hv_bootloader.cmd == BOOTLOADER_OPCODE_CRCCHECK){
ctx->timeout = 0;
flash_state = SEND_TO_APP;
}
@@ -374,10 +374,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
ctx->to_hv.packet_to_hv.vel = vel;
ctx->to_hv.packet_to_hv.header.slave_addr = 0;
ctx->to_hv.packet_to_hv.header.flags.packet_to_master = 0;
ctx->to_hv.packet_to_hv.header.flags.error = 0;
ctx->to_hv.packet_to_hv.header.flags.read_same_addr = 0;
ctx->to_hv.packet_to_hv.header.flags.write_to_conf = 1;
ctx->to_hv.packet_to_hv.header.flags.cmd = WRITE_CONF;
ctx->to_hv.packet_to_hv.header.flags.counter++;
ctx->to_hv.packet_to_hv.header.len = (sizeof(packet_to_hv_t) - sizeof(stmbl_talk_header_t)) / 4;
ctx->to_hv.packet_to_hv.header.conf_addr = ctx->conf_addr;
@@ -387,7 +384,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
if(rb_read(&hv_tx_buf, buf, 1)){
ctx->to_hv.packet_to_hv.flags.buf = buf[0];
}else{
ctx->to_hv.packet_to_hv.flags.buf = 0xff;
ctx->to_hv.packet_to_hv.flags.buf = 0x0;
}
tx_size = sizeof(packet_to_hv_t);
@@ -403,14 +400,14 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
break;
case SEND_TO_BOOTLOADER: // fix
ctx->to_hv.packet_to_hv.header.flags.cmd = BOOTLOADER;
ctx->to_hv.packet_to_hv.flags.buf = 0x0;
ctx->to_hv.packet_to_hv.header.flags.counter++;
ctx->to_hv.packet_to_hv.header.conf_addr = 255;
ctx->to_hv.packet_to_hv.header.config.f32 = 1;//START_BOOTLOADER;
ctx->to_hv.packet_to_hv.d_cmd = 0.0;
ctx->to_hv.packet_to_hv.q_cmd = 0.0;
ctx->to_hv.packet_to_hv.flags.enable = 0;
tx_size = sizeof(packet_bootloader_t);
tx_size = sizeof(packet_to_hv_t);
if(ctx->timeout > 10){
ctx->timeout = 0;
@@ -420,10 +417,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
case ERASE_FLASH:
ctx->to_hv.packet_to_hv.header.slave_addr = 255;
ctx->to_hv.packet_to_hv.header.flags.packet_to_master = 0;
ctx->to_hv.packet_to_hv.header.flags.read_same_addr = 0;
ctx->to_hv.packet_to_hv.header.flags.write_to_conf = 0;
ctx->to_hv.packet_to_hv.header.flags.error = 0;
ctx->to_hv.packet_to_hv.header.flags.cmd = NO_CMD;
ctx->to_hv.packet_to_hv.header.flags.counter++;
ctx->to_hv.packet_to_hv.header.len = (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4;
ctx->to_hv.packet_to_hv.header.conf_addr = 0;
@@ -472,9 +466,10 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
}
break;
case SEND_TO_APP:
ctx->to_hv.packet_to_hv.header.flags.cmd = DO_RESET;
ctx->to_hv.packet_to_hv.header.flags.counter++;
ctx->to_hv.packet_to_hv.header.len = (sizeof(packet_bootloader_t) - sizeof(stmbl_talk_header_t)) / 4;
ctx->to_hv.packet_to_hv_bootloader.cmd = BOOTLOADER_OPCODE_RESET;
ctx->to_hv.packet_to_hv_bootloader.cmd = BOOTLOADER_OPCODE_NOP;
tx_size = sizeof(packet_bootloader_t);
@@ -535,29 +530,29 @@ static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
if(last_flash_state != flash_state){
switch(flash_state){
case SLAVE_IN_APP:
printf("hv: SLAVE_IN_APP addr: %lu\n", ctx->addr * 4);
printf("hv_update: SLAVE_IN_APP\n");
break;
case SEND_TO_BOOTLOADER:
printf("hv: SEND_TO_BOOTLOADER addr: %lu\n", ctx->addr * 4);
printf("hv_update: SEND_TO_BOOTLOADER\n");
last_addr = 0;
break;
case ERASE_FLASH:
printf("hv: ERASE_FLASH addr: %lu\n", ctx->addr * 4);
printf("hv_update: ERASE_FLASH\n");
last_addr = 0;
break;
case SEND_APP:
printf("hv: SEND_APP addr: %lu\n", ctx->addr * 4);
printf("hv_update: SEND_APP\n");
break;
case CRC_CHECK:
printf("hv: CRC_CHECK addr: %lu\n", ctx->addr * 4);
printf("hv_update: CRC_CHECK\n");
last_addr = 0;
break;
case SEND_TO_APP:
printf("hv: SEND_TO_APP addr: %lu\n", ctx->addr * 4);
printf("hv_update: SEND_TO_APP\n");
last_addr = 0;
break;
case FLASH_FAILED:
printf("hv: FLASH_FAILED addr: %lu\n", ctx->addr * 4);
printf("hv_update: FLASH_FAILED\n");
last_addr = 0;
break;
}
@@ -565,8 +560,9 @@ static void nrt_func(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
}
if(ctx->addr >= last_addr + 1024 / 4){
printf("hv: addr: %lu\n", ctx->addr * 4);
if(ctx->addr >= last_addr + 1024){
printf("hv_update: status: %i%%\n", (int)(100.0 * ctx->addr * 4. / (float)((uint32_t)&(_binary_obj_hvf3_hvf3_bin_size))));
last_addr = ctx->addr;
}
}
stm32f303/src/comps/ls.c
+26 -10
View File
@@ -147,10 +147,7 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
USART3->ICR |= USART_ICR_RTOCF; // timeout clear flag
ctx->packet_from_hv.header.len = (sizeof(packet_from_hv_t) - sizeof(stmbl_talk_header_t)) / 4;
ctx->packet_from_hv.header.flags.write_to_conf = 1;
ctx->packet_from_hv.header.flags.read_same_addr = 1;
ctx->packet_from_hv.header.flags.packet_to_master = 1;
ctx->packet_from_hv.header.flags.error = 0;
ctx->packet_from_hv.header.flags.cmd = WRITE_CONF;
ctx->packet_from_hv.header.slave_addr = 0;
}
@@ -192,7 +189,28 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
if(dma_pos == sizeof(packet_to_hv_t)) {
uint32_t crc = HAL_CRC_Calculate(&hcrc, (uint32_t *)&(ctx->packet_to_hv.header.slave_addr), sizeof(packet_to_hv_t) / 4 - 1);
if(ctx->packet_to_hv.header.slave_addr == 0 && ctx->packet_to_hv.header.len == (sizeof(packet_to_hv_t) - sizeof(stmbl_talk_header_t)) / 4 && crc == ctx->packet_to_hv.header.crc) {
//
//
uint8_t a = ctx->packet_to_hv.header.conf_addr;
a = CLAMP(a, 0, sizeof(config) / 4);
switch(ctx->packet_to_hv.header.flags.cmd){
case NO_CMD:
break;
case WRITE_CONF:
config.data[a] = ctx->packet_to_hv.header.config.f32; // TODO: first enable after complete update
break;
case READ_CONF:
ctx->tx_addr = a;
break;
case DO_RESET:
NVIC_SystemReset();
break;
case BOOTLOADER:
RTC->BKP0R = 0xDEADBEEF;
NVIC_SystemReset();
break;
}
PIN(en) = ctx->packet_to_hv.flags.enable;
PIN(phase_mode) = ctx->packet_to_hv.flags.phase_type;
PIN(cmd_mode) = ctx->packet_to_hv.flags.cmd_type;
@@ -200,10 +218,8 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
PIN(q_cmd) = ctx->packet_to_hv.q_cmd;
PIN(pos) = ctx->packet_to_hv.pos;
PIN(vel) = ctx->packet_to_hv.vel;
uint8_t a = ctx->packet_to_hv.header.conf_addr;
a = CLAMP(a, 0, sizeof(config) / 4);
config.data[a] = ctx->packet_to_hv.header.config.f32; // TODO: first enable after complete update
if(ctx->packet_to_hv.flags.buf != 0xff){
if(ctx->packet_to_hv.flags.buf != 0x0){
extern struct ringbuf rx_buf;
rb_write(&rx_buf, (void*)&(ctx->packet_to_hv.flags.buf), 1);
}
@@ -281,7 +297,7 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
if(rb_read(&tx_buf, buf, 1)){
ctx->packet_from_hv.buf = buf[0];
}else{
ctx->packet_from_hv.buf = 0xff;
ctx->packet_from_hv.buf = 0x0;
}
ctx->packet_from_hv.header.crc = HAL_CRC_Calculate(&hcrc, (uint32_t *)&(ctx->packet_from_hv.header.slave_addr), sizeof(packet_from_hv_t) / 4 - 1);