hv bootloader, 3rd try...

This commit is contained in:
Rene Hopf
2016-10-24 04:32:51 +02:00
parent a4d500f5f7
commit 6828423fc3
5 changed files with 10055 additions and 0 deletions

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CROSS_COMPILE ?= arm-none-eabi-
CC = $(CROSS_COMPILE)gcc
CPPC = $(CROSS_COMPILE)g++
LD = $(CROSS_COMPILE)ld
OBJCOPY = $(CROSS_COMPILE)objcopy
SIZE = $(CROSS_COMPILE)size
TARGET = main
#CFLAGS += -ffunction-sections -fdata-sections -fno-common -Os -g3 -mcpu=cortex-m0 -mthumb
CPU = -mthumb -mcpu=cortex-m3
#OPT = -O3 -flto
OPT = -Os
CFLAGS += -DHSE_VALUE=8000000
CFLAGS += -DSTM32F103R6
LDSCRIPT = stm32f103.ld
CFLAGS += $(CPU)
CFLAGS += $(OPT)
CFLAGS += -fno-common
CFLAGS += -std=gnu11
CFLAGS += -ffunction-sections
CFLAGS += -fdata-sections
CFLAGS += -Wall
CFLAGS += -fno-builtin
CFLAGS += -nostartfiles
CFLAGS += -Wfatal-errors
CFLAGS += -fno-strict-aliasing
CFLAGS += -fwrapv
CFLAGS += -fsingle-precision-constant
CFLAGS += -g3
CPPFLAGS += $(CFLAGS)
CPPFLAGS += -fno-exceptions
CPPFLAGS += -fno-rtti
CPPFLAGS += -std=c++11
LDFLAGS = -nostartfiles
LDFLAGS += $(OPT)
LDFLAGS += $(CPU)
LDFLAGS += -lm
LDFLAGS += -Wl,-Map=$(TARGET).map,--cref
#LDFLAGS += -Wl,--gc-sections
all: $(TARGET).elf
$(TARGET).elf: main.c Makefile $(LDSCRIPT)
$(CC) -I. -c $(CFLAGS) main.c -o $(TARGET).o
#$(CPPC) -I. -c $(CPPFLAGS) main.c -o $(TARGET).o
#$(LD) $(LDFLAGS) -T$(LDSCRIPT) -o $(TARGET).elf $(TARGET).o
$(CC) $(LDFLAGS) -T$(LDSCRIPT) -o $(TARGET).elf $(TARGET).o
$(OBJCOPY) -O binary $(TARGET).elf $(TARGET).bin
size: $(TARGET).elf
$(SIZE) $<
flash: $(TARGET).elf
st-flash --reset write $(TARGET).bin 0x8000000
clean:
rm -f $(TARGET).elf $(TARGET).bin $(TARGET).o $(TARGET).map

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stm32f103/bootloader/f103.h Normal file

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stm32f103/bootloader/main.c Normal file
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#include "f103.h"
#define STACK_TOP 0x20002000 // just a tiny stack for demo
static void nmi_handler(void);
static void hardfault_handler(void);
int main(void);
// Define the vector table
uint32_t *myvectors[4]
__attribute__ ((section("vectors"))) = {
(uint32_t *) STACK_TOP, // stack pointer
(uint32_t *) main, // code entry point
(uint32_t *) nmi_handler, // NMI handler (not really)
(uint32_t *) hardfault_handler // hard fault handler
};
void clock_setup(){ // 8MHz HSE -> 72MHz
FLASH->ACR.LATENCY = 2; // flash latency = 2 wait states
RCC->CR.HSEON = 1; // enable HSE
RCC->CFGR.PLLXTPRE = 0; // HSE prediv = 1
while(RCC->CR.HSERDY == 0){} // wait for HSE startup
RCC->CFGR.PLLSRC = 1; // pll input = HSE
RCC->CFGR.PLLMUL = 7; // pll multiplicator = 9
RCC->CR.PLLON = 1; // enable pll
while(RCC->CR.PLLRDY == 0){} // wait for pll startup
RCC->CFGR.HPRE = 0; // HCLK prescaler = 1
RCC->CFGR.SW = 2; // SYSCLK = PLL
while(RCC->CFGR.SWS != 2){} // wait for SYSCLK switch
RCC->CFGR.PPRE1 = 4; // APB1 prescaler = 2
RCC->CFGR.PPRE2 = 0; // APB2 prescaler = 1
RCC->CFGR.ADCPRE = 2; // ADC prescaler = 6
}
void gpio_setup(){
RCC->APB2ENR.IOPCEN = 1; // enable GPIOC
GPIOC->CRL.MODE0 = 2; // PC0 = output 2MHz
GPIOC->CRL.CNF0 = 0; // PC0 = push pull
GPIOC->CRL.MODE1 = 2; // PC1 = output 2MHz
GPIOC->CRL.CNF1 = 0; // PC1 = push pull
GPIOC->CRL.MODE2 = 2; // PC2 = output 2MHz
GPIOC->CRL.CNF2 = 0; // PC2 = push pull
//RCC->AHBENR.IOPAEN = 1; // enable GPIOA
}
void uart_setup(){
RCC->APB1ENR.USART2EN = 1; // usart2 en
RCC->APB2ENR.AFIOEN = 1; // afio en
RCC->APB2ENR.IOPAEN = 1; // enable GPIOA
GPIOA->CRL.MODE2 = 1; // PA2 = output 10MHz
GPIOA->CRL.CNF2 = 2; // PA2 = afio push pull
GPIOA->CRL.MODE3 = 0; // PA2 = input
GPIOA->CRL.CNF3 = 1; // PA2 = floating input
uint32_t div = 72000000 / 2 / 2250000 + 0.5;
USART2->BRR.DIV_Mantissa = div / 16;
USART2->BRR.DIV_Fraction = div & 0x000F;
// USART2->BRR.w = div;
// USART2->BRR.w = 16;
USART2->CR1.RE = 1; // rx en
USART2->CR1.TE = 1; // tx en
USART2->CR1.UE = 1; // usart en
}
void flash_unlock(){
FLASH->KEYR.KEY = 0x45670123;
FLASH->KEYR.KEY = 0xCDEF89AB;
FLASH->CR.PG = 1;
}
void flash_clear(uint32_t page){
while(FLASH->SR.BSY == 1){}
FLASH->CR.PER = 1;
FLASH->AR.FAR = page;
FLASH->CR.STRT = 1;
while(FLASH->SR.BSY == 1){}
FLASH->CR.PER = 0;// only lib, not in docs
//TODO: verify
}
void flash_write(uint32_t addr, uint16_t data){
while(FLASH->SR.BSY == 1){}
FLASH->CR.PG = 1;
*(volatile uint16_t*)addr = data;
while(FLASH->SR.BSY == 1){}
FLASH->CR.PG = 0;// only lib, not in docs
//TODO: verify
}
int main(void)
{
uint32_t i=0;
gpio_setup();
clock_setup();
uart_setup();
flash_unlock();
for(int i = 1024;i<2048*2;i+=2){
flash_write(0x8000000+i,0x5555);
}
flash_clear(0x8000000+1024);
for(;;){
if(USART2->SR.RXNE == 1 && USART2->SR.TXE == 1){
USART2->DR.DR = USART2->DR.DR;
}
i++;
if(i > 100000){
GPIOC->ODR.ODR0 = 0; // reset PC0
//USART2->DR.DR = 0x55;
}
if(i > 200000){ // read PA0
GPIOC->ODR.ODR0 = 1; // set PC0
// USART2->DR.DR = 0xAA;
i = 0;
}
}
}
void nmi_handler(void)
{
for(;;);
}
void hardfault_handler(void)
{
for(;;);
}

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/*
*****************************************************************************
**
** File : stm32_flash.ld
**
** Abstract : Linker script for STM32F100VB Device with
** 128KByte FLASH, 8KByte RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
** Environment : Atollic TrueSTUDIO(R)
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
** (c)Copyright Atollic AB.
** You may use this file as-is or modify it according to the needs of your
** project. Distribution of this file (unmodified or modified) is not
** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
** rights to distribute the assembled, compiled & linked contents of this
** file as part of an application binary file, provided that it is built
** using the Atollic TrueSTUDIO(R) toolchain.
**
*****************************************************************************
*/
/* umgebaut auf stm32f103r6t flash,ram, estack*/
/* Entry Point */
ENTRY(main)
/* Highest address of the user mode stack */
_estack = 0x20002800; /* end of 4K RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0; /* required amount of heap */
_Min_Stack_Size = 0x100; /* required amount of stack */
/* STM32F103R6T Low-density performance line 32kb flash 10kb ram */
/* flash layout: 32x1 */
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K
MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* version info needs to have a section, so the bootloader and python script can find it */
.version_info :
{
. = ALIGN(4);
KEEP(*(.version_info))
. = ALIGN(4);
} >FLASH
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.ARM.attributes : { *(.ARM.attributes) } > FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = .;
/* Initialized data sections goes into RAM, load LMA copy after code */
.data : AT ( _sidata )
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
PROVIDE ( end = _ebss );
PROVIDE ( _end = _ebss );
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(4);
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(4);
} >RAM
/* MEMORY_bank1 section, code must be located here explicitly */
/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
.memory_b1_text :
{
*(.mb1text) /* .mb1text sections (code) */
*(.mb1text*) /* .mb1text* sections (code) */
*(.mb1rodata) /* read-only data (constants) */
*(.mb1rodata*)
} >MEMORY_B1
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
}

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MEMORY
{
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K
}
ENTRY(main)
SECTIONS
{
. = 0x0; /* From 0x00000000 */
.text :
{
*(vectors) /* Vector table */
*(.text) /* Program code */
*(.rodata) /* Read only data */
} >FLASH
. = 0x20000000; /* From 0x20000000 */
.data :
{
*(.data) /* Data memory */
} >RAM AT > FLASH
.bss :
{
*(.bss) /* Zero-filled run time allocate data memory */
} >RAM AT > FLASH
}