mirror of
https://github.com/rene-dev/stmbl.git
synced 2026-02-05 18:01:21 +08:00
hv bootloader, 3rd try...
This commit is contained in:
62
stm32f103/bootloader/Makefile
Normal file
62
stm32f103/bootloader/Makefile
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@@ -0,0 +1,62 @@
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CROSS_COMPILE ?= arm-none-eabi-
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CC = $(CROSS_COMPILE)gcc
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CPPC = $(CROSS_COMPILE)g++
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LD = $(CROSS_COMPILE)ld
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OBJCOPY = $(CROSS_COMPILE)objcopy
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SIZE = $(CROSS_COMPILE)size
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TARGET = main
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#CFLAGS += -ffunction-sections -fdata-sections -fno-common -Os -g3 -mcpu=cortex-m0 -mthumb
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CPU = -mthumb -mcpu=cortex-m3
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#OPT = -O3 -flto
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OPT = -Os
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CFLAGS += -DHSE_VALUE=8000000
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CFLAGS += -DSTM32F103R6
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LDSCRIPT = stm32f103.ld
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CFLAGS += $(CPU)
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CFLAGS += $(OPT)
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CFLAGS += -fno-common
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CFLAGS += -std=gnu11
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CFLAGS += -ffunction-sections
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CFLAGS += -fdata-sections
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CFLAGS += -Wall
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CFLAGS += -fno-builtin
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CFLAGS += -nostartfiles
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CFLAGS += -Wfatal-errors
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CFLAGS += -fno-strict-aliasing
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CFLAGS += -fwrapv
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CFLAGS += -fsingle-precision-constant
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CFLAGS += -g3
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CPPFLAGS += $(CFLAGS)
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CPPFLAGS += -fno-exceptions
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CPPFLAGS += -fno-rtti
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CPPFLAGS += -std=c++11
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LDFLAGS = -nostartfiles
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LDFLAGS += $(OPT)
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LDFLAGS += $(CPU)
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LDFLAGS += -lm
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LDFLAGS += -Wl,-Map=$(TARGET).map,--cref
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#LDFLAGS += -Wl,--gc-sections
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all: $(TARGET).elf
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$(TARGET).elf: main.c Makefile $(LDSCRIPT)
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$(CC) -I. -c $(CFLAGS) main.c -o $(TARGET).o
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#$(CPPC) -I. -c $(CPPFLAGS) main.c -o $(TARGET).o
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#$(LD) $(LDFLAGS) -T$(LDSCRIPT) -o $(TARGET).elf $(TARGET).o
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$(CC) $(LDFLAGS) -T$(LDSCRIPT) -o $(TARGET).elf $(TARGET).o
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$(OBJCOPY) -O binary $(TARGET).elf $(TARGET).bin
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size: $(TARGET).elf
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$(SIZE) $<
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flash: $(TARGET).elf
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st-flash --reset write $(TARGET).bin 0x8000000
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clean:
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rm -f $(TARGET).elf $(TARGET).bin $(TARGET).o $(TARGET).map
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9651
stm32f103/bootloader/f103.h
Normal file
9651
stm32f103/bootloader/f103.h
Normal file
File diff suppressed because it is too large
Load Diff
133
stm32f103/bootloader/main.c
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133
stm32f103/bootloader/main.c
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@@ -0,0 +1,133 @@
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#include "f103.h"
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#define STACK_TOP 0x20002000 // just a tiny stack for demo
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static void nmi_handler(void);
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static void hardfault_handler(void);
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int main(void);
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// Define the vector table
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uint32_t *myvectors[4]
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__attribute__ ((section("vectors"))) = {
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(uint32_t *) STACK_TOP, // stack pointer
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(uint32_t *) main, // code entry point
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(uint32_t *) nmi_handler, // NMI handler (not really)
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(uint32_t *) hardfault_handler // hard fault handler
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};
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void clock_setup(){ // 8MHz HSE -> 72MHz
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FLASH->ACR.LATENCY = 2; // flash latency = 2 wait states
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RCC->CR.HSEON = 1; // enable HSE
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RCC->CFGR.PLLXTPRE = 0; // HSE prediv = 1
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while(RCC->CR.HSERDY == 0){} // wait for HSE startup
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RCC->CFGR.PLLSRC = 1; // pll input = HSE
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RCC->CFGR.PLLMUL = 7; // pll multiplicator = 9
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RCC->CR.PLLON = 1; // enable pll
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while(RCC->CR.PLLRDY == 0){} // wait for pll startup
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RCC->CFGR.HPRE = 0; // HCLK prescaler = 1
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RCC->CFGR.SW = 2; // SYSCLK = PLL
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while(RCC->CFGR.SWS != 2){} // wait for SYSCLK switch
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RCC->CFGR.PPRE1 = 4; // APB1 prescaler = 2
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RCC->CFGR.PPRE2 = 0; // APB2 prescaler = 1
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RCC->CFGR.ADCPRE = 2; // ADC prescaler = 6
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}
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void gpio_setup(){
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RCC->APB2ENR.IOPCEN = 1; // enable GPIOC
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GPIOC->CRL.MODE0 = 2; // PC0 = output 2MHz
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GPIOC->CRL.CNF0 = 0; // PC0 = push pull
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GPIOC->CRL.MODE1 = 2; // PC1 = output 2MHz
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GPIOC->CRL.CNF1 = 0; // PC1 = push pull
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GPIOC->CRL.MODE2 = 2; // PC2 = output 2MHz
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GPIOC->CRL.CNF2 = 0; // PC2 = push pull
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//RCC->AHBENR.IOPAEN = 1; // enable GPIOA
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}
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void uart_setup(){
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RCC->APB1ENR.USART2EN = 1; // usart2 en
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RCC->APB2ENR.AFIOEN = 1; // afio en
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RCC->APB2ENR.IOPAEN = 1; // enable GPIOA
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GPIOA->CRL.MODE2 = 1; // PA2 = output 10MHz
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GPIOA->CRL.CNF2 = 2; // PA2 = afio push pull
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GPIOA->CRL.MODE3 = 0; // PA2 = input
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GPIOA->CRL.CNF3 = 1; // PA2 = floating input
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uint32_t div = 72000000 / 2 / 2250000 + 0.5;
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USART2->BRR.DIV_Mantissa = div / 16;
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USART2->BRR.DIV_Fraction = div & 0x000F;
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// USART2->BRR.w = div;
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// USART2->BRR.w = 16;
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USART2->CR1.RE = 1; // rx en
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USART2->CR1.TE = 1; // tx en
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USART2->CR1.UE = 1; // usart en
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}
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void flash_unlock(){
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FLASH->KEYR.KEY = 0x45670123;
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FLASH->KEYR.KEY = 0xCDEF89AB;
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FLASH->CR.PG = 1;
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}
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void flash_clear(uint32_t page){
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while(FLASH->SR.BSY == 1){}
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FLASH->CR.PER = 1;
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FLASH->AR.FAR = page;
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FLASH->CR.STRT = 1;
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while(FLASH->SR.BSY == 1){}
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FLASH->CR.PER = 0;// only lib, not in docs
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//TODO: verify
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}
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void flash_write(uint32_t addr, uint16_t data){
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while(FLASH->SR.BSY == 1){}
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FLASH->CR.PG = 1;
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*(volatile uint16_t*)addr = data;
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while(FLASH->SR.BSY == 1){}
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FLASH->CR.PG = 0;// only lib, not in docs
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//TODO: verify
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}
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int main(void)
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{
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uint32_t i=0;
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gpio_setup();
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clock_setup();
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uart_setup();
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flash_unlock();
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for(int i = 1024;i<2048*2;i+=2){
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flash_write(0x8000000+i,0x5555);
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}
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flash_clear(0x8000000+1024);
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for(;;){
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if(USART2->SR.RXNE == 1 && USART2->SR.TXE == 1){
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USART2->DR.DR = USART2->DR.DR;
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}
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i++;
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if(i > 100000){
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GPIOC->ODR.ODR0 = 0; // reset PC0
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//USART2->DR.DR = 0x55;
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}
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if(i > 200000){ // read PA0
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GPIOC->ODR.ODR0 = 1; // set PC0
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// USART2->DR.DR = 0xAA;
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i = 0;
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}
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}
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}
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void nmi_handler(void)
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{
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for(;;);
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}
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void hardfault_handler(void)
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{
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for(;;);
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}
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180
stm32f103/bootloader/stm32_flash.ld
Executable file
180
stm32f103/bootloader/stm32_flash.ld
Executable file
@@ -0,0 +1,180 @@
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/*
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*****************************************************************************
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**
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** File : stm32_flash.ld
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**
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** Abstract : Linker script for STM32F100VB Device with
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** 128KByte FLASH, 8KByte RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
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**
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** Environment : Atollic TrueSTUDIO(R)
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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** (c)Copyright Atollic AB.
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** You may use this file as-is or modify it according to the needs of your
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** project. Distribution of this file (unmodified or modified) is not
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** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
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** rights to distribute the assembled, compiled & linked contents of this
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** file as part of an application binary file, provided that it is built
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** using the Atollic TrueSTUDIO(R) toolchain.
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**
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*****************************************************************************
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*/
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/* umgebaut auf stm32f103r6t flash,ram, estack*/
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/* Entry Point */
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ENTRY(main)
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/* Highest address of the user mode stack */
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_estack = 0x20002800; /* end of 4K RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0; /* required amount of heap */
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_Min_Stack_Size = 0x100; /* required amount of stack */
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/* STM32F103R6T Low-density performance line 32kb flash 10kb ram */
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/* flash layout: 32x1 */
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 32K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K
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MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* version info needs to have a section, so the bootloader and python script can find it */
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.version_info :
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{
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. = ALIGN(4);
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KEEP(*(.version_info))
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.ARM.attributes : { *(.ARM.attributes) } > FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(.fini_array*))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = .;
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data : AT ( _sidata )
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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PROVIDE ( end = _ebss );
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PROVIDE ( _end = _ebss );
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(4);
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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} >RAM
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/* MEMORY_bank1 section, code must be located here explicitly */
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/* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
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.memory_b1_text :
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{
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*(.mb1text) /* .mb1text sections (code) */
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*(.mb1text*) /* .mb1text* sections (code) */
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*(.mb1rodata) /* read-only data (constants) */
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*(.mb1rodata*)
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} >MEMORY_B1
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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}
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29
stm32f103/bootloader/stm32f103.ld
Normal file
29
stm32f103/bootloader/stm32f103.ld
Normal file
@@ -0,0 +1,29 @@
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 32K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 10K
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}
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ENTRY(main)
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SECTIONS
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{
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. = 0x0; /* From 0x00000000 */
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.text :
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{
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*(vectors) /* Vector table */
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*(.text) /* Program code */
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*(.rodata) /* Read only data */
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} >FLASH
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. = 0x20000000; /* From 0x20000000 */
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.data :
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{
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*(.data) /* Data memory */
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} >RAM AT > FLASH
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.bss :
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{
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*(.bss) /* Zero-filled run time allocate data memory */
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} >RAM AT > FLASH
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}
|
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