removed input, param, and system

This commit is contained in:
Rene Hopf
2014-11-25 01:57:21 +01:00
parent 63538c0bf1
commit 5348ef0ef2
12 changed files with 27 additions and 510 deletions
+1 -1
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@@ -1,6 +1,6 @@
# put your *.o targets here, make should handle the rest!
SRCS = main.c stm32f4xx_it.c system_stm32f4xx.c printf.c scanf.c param.c setup.c hal.c misc.c
SRCS = main.c stm32f4xx_it.c system_stm32f4xx.c printf.c scanf.c setup.c hal.c misc.c
#USB
SRCS += ub_lib/stm32_ub_usb_cdc.c ub_lib/usb_cdc_lolevel/usb_core.c ub_lib/usb_cdc_lolevel/usb_dcd_int.c ub_lib/usb_cdc_lolevel/usbd_req.c ub_lib/usb_cdc_lolevel/usbd_cdc_core.c ub_lib/usb_cdc_lolevel/usbd_core.c ub_lib/usb_cdc_lolevel/usb_dcd.c ub_lib/usb_cdc_lolevel/usbd_cdc_vcp.c ub_lib/usb_cdc_lolevel/usbd_desc.c ub_lib/usb_cdc_lolevel/usbd_ioreq.c ub_lib/usb_cdc_lolevel/usb_bsp.c ub_lib/usb_cdc_lolevel/usbd_usr.c
#SRCS = main.c system.c
+1
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@@ -19,6 +19,7 @@
*/
#include "hal.h"
#include "misc.h"
void init_hal(){
hal.comp_type_count = 0;
-1
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@@ -18,7 +18,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "param.h"
#include "scanf.h"
#include "printf.h"
-58
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@@ -1,58 +0,0 @@
#include "input.h"
#include <stm32f4xx_tim.h>
int i_init(input* i){
i->state = DISABLED;
i->reset(i);
return(1);
}
int i_reset(input* i){
if(i->state == DISABLED || i->state == ENABLED || i->state == FERROR){
i->state = DISABLED;
return(1);
}
return(0);
}
int i_enable(input* i){
if(i->state == DISABLED || i->state == ENABLED){
i->state = ENABLED;
return(1);
}
return(0);
}
int i_disable(input* i){
if(i->state == DISABLED || i->state == ENABLED){
i->state = DISABLED;
return(1);
}
return(0);
}
void do_rt_stuff(input* i, float period){
}
float get_pos(input* i){
return(i->pos);
}
float get_vel(input* i){
return(i->vel);
}
float get_acc(input* i){
return(i->acc);
}
float get_force(input* i){
return(i->force);
}
// quad enc tim3
void read_enc_tim3(input* i, float period){
i->pos = TIM_GetCounter(TIM3) * i->scale;
}
-57
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@@ -1,57 +0,0 @@
#pragma once
struct input_{
//name_ name;
enum{
QUAD,
RES,
GMS,
//STEP_DIR,
//ETHERNET,
//RS232,
SIM,
MISC
} type;
enum{
POS,
POS_VEL,
POS_VEL_ACC,
VEL,
VEL_ACC,
ACC,
FORCE
} type2;
enum{
PRE_INIT,
DISABLED,
STARTING,
ENABLED,
FERROR
} state;
int num;
float scale;
float pos;
float vel;
float acc;
float force;
char info[32];
int (*init)(struct input_* i);
int (*enable)(struct input_* i);
int (*disable)(struct input_* i);
int (*reset)(struct input_* i);
float (*get_pos)(struct input_* i);
float (*get_vel)(struct input_* i);
float (*get_acc)(struct input_* i);
float (*get_force)(struct input_* i);
void (*do_rt_stuff)(struct input_* i, float period);
};
typedef struct input_ input;
-1
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@@ -22,7 +22,6 @@
#include <stm32f4xx_conf.h>
#include "printf.h"
#include "scanf.h"
#include "param.h"
#include "hal.h"
#include "setup.h"
#include <math.h>
+22
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@@ -41,3 +41,25 @@ float mod(float a){
}
return(a);
}
int strcmp(const char* s1, const char* s2){
while(*s1 && (*s1 == *s2)){
s1++;
s2++;
}
return(*(const unsigned char*)s1 - *(const unsigned char*)s2);
}
void strncpy(char* dst, char* src, int n){
while (n-- && (*dst++ = *src++));
}
char* strncat(char *dest, const char *src, int n){
char *rdest = dest;
while (n-- && *dest)
dest++;
while (n-- && (*dest++ = *src++))
;
rdest[n] = '\0';
return rdest;
}
+3
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@@ -36,6 +36,9 @@ extern "C" {
float minus(float a, float b);
float mod(float a);
int strcmp(const char* s1, const char* s2);
void strncpy(char* dst, char* src, int n);
char* strncat(char *dest, const char *src, int n);
#ifdef __cplusplus
}
-153
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@@ -1,153 +0,0 @@
//
// param.c
// test
//
// Created by crinq on 07.12.13.
// Copyright (c) 2013 Rene Hopf. All rights reserved.
//
#include "param.h"
#include "printf.h"
void default_callback(float f){
}
int strcmp(const char* s1, const char* s2){
while(*s1 && (*s1 == *s2)){
s1++;
s2++;
}
return(*(const unsigned char*)s1 - *(const unsigned char*)s2);
}
void strncpy(char* dst, char* src, int n){
while (n-- && (*dst++ = *src++));
}
char* strncat(char *dest, const char *src, int n){
char *rdest = dest;
while (n-- && *dest)
dest++;
while (n-- && (*dest++ = *src++))
;
rdest[n] = '\0';
return rdest;
}
void param_init(){
PARAMS.param_count = 0;
}
//TODO: check name length
int register_float(char* name, volatile float *f){
if(PARAMS.param_count == MAX_PARAMS){
return(0);
}
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
return(0);
}
}
strncpy(PARAMS.names[PARAMS.param_count], name, MAX_PNAME);
PARAMS.types[PARAMS.param_count] = FLOAT;
PARAMS.floats[PARAMS.param_count] = f;
PARAMS.read_callbacks[PARAMS.param_count] = default_callback;
PARAMS.write_callbacks[PARAMS.param_count] = default_callback;
PARAMS.param_count++;
return(1);
}
int register_int(char* name, volatile int *i){
if(PARAMS.param_count == MAX_PARAMS){
return(0);
}
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
return(0);
}
}
strncpy(PARAMS.names[PARAMS.param_count], name, MAX_PNAME);
PARAMS.types[PARAMS.param_count] = INT;
PARAMS.ints[PARAMS.param_count] = i;
PARAMS.read_callbacks[PARAMS.param_count] = default_callback;
PARAMS.write_callbacks[PARAMS.param_count] = default_callback;
PARAMS.param_count++;
return(1);
}
int register_read_callback(char* name, void (*cb)(float v)){
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
PARAMS.read_callbacks[i] = cb;
return(1);
}
}
return(0);
}
int register_write_callback(char* name, void (*cb)(float v)){
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
PARAMS.write_callbacks[i] = cb;
return(1);
}
}
return(0);
}
int is_param(char* name){
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
return(1);
}
}
return(0);
}
void list_param(){
for(int i = 0; i < PARAMS.param_count; i++){
if(PARAMS.types[i] == FLOAT){
printf_("float %s = %f\n",PARAMS.names[i],*PARAMS.floats[i],i);
}
else{
printf_("int %s = %i\n",PARAMS.names[i],*PARAMS.ints[i],i);
}
}
}
float get_param(char* name){
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
if(PARAMS.types[i] == FLOAT){
PARAMS.read_callbacks[i](*PARAMS.floats[i]);
return(*PARAMS.floats[i]);
}
else{
PARAMS.read_callbacks[i]((float)*PARAMS.ints[i]);
return((float)*PARAMS.ints[i]);
}
}
}
return(0);
}
int set_param(char* name, volatile float f){
for(int i = 0; i < PARAMS.param_count; i++){
if(!strcmp(PARAMS.names[i], name)){
if(PARAMS.types[i] == FLOAT){
*PARAMS.floats[i] = f;
PARAMS.write_callbacks[i](f);
}
else{
*PARAMS.ints[i] = (int)f;
PARAMS.write_callbacks[i](f);
}
return(1);
}
}
return(0);
}
-52
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@@ -1,52 +0,0 @@
//
// param.c
// test
//
// Created by crinq on 07.12.13.
// Copyright (c) 2013 Rene Hopf. All rights reserved.
//
#pragma once
#define MAX_PARAMS 64
#define MAX_PNAME 8
typedef char PNAME[MAX_PNAME];
struct param{
PNAME names[MAX_PARAMS];
enum {
FLOAT,
INT
} types[MAX_PARAMS];
union{
volatile float *floats[MAX_PARAMS];
volatile int *ints[MAX_PARAMS];
};
void (*read_callbacks[MAX_PARAMS])(float v);
void (*write_callbacks[MAX_PARAMS])(float v);
int param_count;
} PARAMS;
int strcmp(const char* s1, const char* s2);
void strncpy(char* dst, char* src, int n);
char* strncat(char *dest, const char *src, int n);
void param_init();
int is_param(char* name);
int register_float(char* name,volatile float *f);
int register_int(char* name,volatile int *i);
int register_read_callback(char* name, void (*db)(float v));
int register_write_callback(char* name, void (*db)(float v));
float get_param(char* name);
int set_param(char* name,volatile float f);
void list_param();
-160
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@@ -1,160 +0,0 @@
/* Michael Pratt <michael@pratt.im> */
/* Generic system call library for STM32F4-DISCOVERY
* Eliminates need for the huge STM libraries */
#include "system.h"
static void SetSysClock(void);
/* Options */
#define VECT_TAB_OFFSET 0x00 /* Vector Table Offset (multiple of 0x200) */
/* PLL Options - See RM0090 Reference Manual pg. 95 */
#define PLL_M 8 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
#define PLL_N 336
#define PLL_P 2 /* SYSCLK = PLL_VCO / PLL_P */
#define PLL_Q 7 /* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */
/* System Initialization Functions */
void SystemInit(void) {
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* Set CP10 and CP11 to full access */
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x24003010;
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Disable all interrupts */
RCC->CIR = 0x00000000;
/* Configure the System clock source, PLL Multiplier and Divider factors,
AHB/APBx prescalers and Flash settings ----------------------------------*/
SetSysClock();
/* Configure the Vector Table location add offset address ------------------*/
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
}
/* PLL (clocked by HSE) used as System clock source */
static void SetSysClock(void) {
volatile uint32_t StartUpCounter = 0, HSEStatus = 0;
/* Enable HSE */
RCC->CR |= ((uint32_t)RCC_CR_HSEON);
/* Wait till HSE is ready and if Time out is reached exit */
do {
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
if ((RCC->CR & RCC_CR_HSERDY) != 0) {
HSEStatus = (uint32_t)0x01;
}
else {
HSEStatus = (uint32_t)0x00;
}
if (HSEStatus == (uint32_t)0x01) {
/* Enable high performance mode, System frequency up to 168 MHz */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR |= PWR_CR_VOS;
/* HCLK = SYSCLK / 1*/
RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
/* PCLK2 = HCLK / 2*/
RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
/* PCLK1 = HCLK / 4*/
RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
/* Configure the main PLL */
/* PLL Options - See RM0090 Reference Manual pg. 95 */
RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
(RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
/* Enable the main PLL */
RCC->CR |= RCC_CR_PLLON;
/* Wait till the main PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0) {
}
/* Configure Flash prefetch, Instruction cache, Data cache and wait state */
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
/* Select the main PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= RCC_CFGR_SW_PLL;
/* Wait till the main PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL); {
}
}
else {
/* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}
/* Exception Handlers */
void NMI_Handler(void) {
/* Do nothing on NMI exception */
}
void HardFault_Handler(void) {
/* Go to infinite loop when Hard Fault exception occurs */
while (1) {
}
}
void MemManage_Handler(void) {
/* Go to infinite loop when Memory Manage exception occurs */
while (1) {
}
}
void BusFault_Handler(void) {
/* Go to infinite loop when Bus Fault exception occurs */
while (1) {
}
}
void UsageFault_Handler(void) {
/* Go to infinite loop when Usage Fault exception occurs */
while (1) {
}
}
void SVC_Handler(void) {
/* Do nothing on SVCall exception */
}
void DebugMon_Handler(void) {
/* Do nothing on Debug Monitor exception */
}
void PendSV_Handler(void) {
/* Do nothing on PendSVC exception */
}
void SysTick_Handler(void) {
/* Do nothing on SysTick */
}
-27
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@@ -1,27 +0,0 @@
/* Michael Pratt <michael@pratt.im> */
/* Generic system call library for STM32F4-DISCOVERY
* Eliminates need for the huge STM libraries */
#include <stm32f4_discovery.h>
#ifndef SYSTEM_H_INCLUDED
#define SYSTEM_H_INCLUDED
/* We will be wanting some typedefs */
typedef unsigned short uint16_t;
typedef unsigned long uint32_t;
/* System Initialization */
extern void SystemInit(void);
/* Exception Handlers */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#endif /* SYSTEM_H_INCLUDED */