Mirrors_Framework/stmbl
1
0
Fork 0
mirror of https://github.com/rene-dev/stmbl.git synced 2026-08-20 23:50:02 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity

boot loader checks crc

Browse Source
This commit is contained in:
Rene Hopf
2015-12-03 11:24:30 +01:00
parent 6e4477d086
commit 4f320baec8
6 changed files with 52 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Makefile
+5 -5
View File
@@ -4,7 +4,7 @@
#ld gcollection
#komische flags
SRCS = main.c stm32f4xx_it.c system_stm32f4xx.c printf.c scanf.c setup.c hal.c misc.c eeprom.c link.c version.c syscalls.c shared/crc8.c shared/common.c
SRCS = main.c stm32f4xx_it.c system_stm32f4xx.c printf.c scanf.c setup.c hal.c misc.c eeprom.c link.c version.c syscalls.c shared/crc8.c shared/crc32.c shared/common.c
#USB
SRCS += ub_lib/stm32_ub_usb_cdc.c ub_lib/usb_cdc_lolevel/usb_core.c ub_lib/usb_cdc_lolevel/usb_dcd_int.c ub_lib/usb_cdc_lolevel/usbd_req.c ub_lib/usb_cdc_lolevel/usbd_cdc_core.c ub_lib/usb_cdc_lolevel/usbd_core.c ub_lib/usb_cdc_lolevel/usb_dcd.c ub_lib/usb_cdc_lolevel/usbd_cdc_vcp.c ub_lib/usb_cdc_lolevel/usbd_desc.c ub_lib/usb_cdc_lolevel/usbd_ioreq.c ub_lib/usb_cdc_lolevel/usb_bsp.c ub_lib/usb_cdc_lolevel/usbd_usr.c
#SRCS = main.c system.c
@@ -83,10 +83,10 @@ stm32f103/main.bin:
$(PROJ_NAME).elf: $(SRCS) hv_firmware.o
$(CC) $(CFLAGS) $^ -o $@ -Llib -lstm32f4 -Wl,--gc-sections -Wl,-Map -Wl,$(PROJ_NAME).map
tools/add_version_info.py main.elf
$(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
$(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
arm-none-eabi-size main.elf
tools/add_version_info.py $(PROJ_NAME).elf
$(OBJCOPY) -O binary --gap-fill 0xFF $(PROJ_NAME).elf $(PROJ_NAME).bin
tools/checkcrc.py $(PROJ_NAME).bin
arm-none-eabi-size $(PROJ_NAME).elf
clean:
rm -f *.o *.i
bootloader/Makefile
+5 -5
View File
@@ -4,7 +4,7 @@
#ld gcollection
#komische flags
SRCS = main.c stm32f4xx_it.c system_stm32f4xx.c version.c
SRCS = main.c stm32f4xx_it.c system_stm32f4xx.c version.c ../shared/crc32.c
# all the files will be generated with this name (main.elf, main.bin, main.hex, etc)
@@ -27,7 +27,7 @@ CFLAGS += -mlittle-endian -mthumb -mcpu=cortex-m4 -mthumb-interwork -nostartfile
CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16 -nostartfiles -fsingle-precision-constant
CFLAGS += -ffunction-sections -fdata-sections -O1
CFLAGS += -I../lib/inc/core -I../lib/inc/peripherals
CFLAGS += -I../lib/inc/core -I../lib/inc/peripherals -I../shared
###################################################
@@ -74,9 +74,9 @@ proj: $(PROJ_NAME).elf
$(PROJ_NAME).elf: $(SRCS)
$(CC) $(CFLAGS) $^ -o $@ -L../lib -lstm32f4 -Wl,--gc-sections -Wl,-Map -Wl,$(PROJ_NAME).map
../tools/add_version_info.py main.elf
$(OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex
$(OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin
../tools/add_version_info.py $(PROJ_NAME).elf
$(OBJCOPY) -O binary --gap-fill 0xFF $(PROJ_NAME).elf $(PROJ_NAME).bin
../tools/checkcrc.py $(PROJ_NAME).bin
arm-none-eabi-size main.elf
clean:
bootloader/src/main.c
+20 -4
View File
@@ -20,12 +20,30 @@
#include "stm32f4xx_conf.h"
#include "version.h"
#include "crc32.h"
#define APP_START 0x08010000
#define APP_END 0x08100000
#define APP_RANGE_VALID(a, s) (!(((a) | (s)) & 3) && (a) >= APP_START && ((a) + (s)) <= APP_END)
#define VERSION_INFO_OFFSET 0x188
static volatile const struct version_info *app_info = (void*)(APP_START + VERSION_INFO_OFFSET);
int app_ok(){
if (!APP_RANGE_VALID(APP_START, app_info->image_size)) {
return 0;
}
uint32_t crc = crc32_init();
crc = crc32_update(crc, (void*)APP_START, app_info->image_size);
crc = crc32_finalize(crc);
if (crc != 0) {
return 0;
}
return 1;
}
int main(void){
GPIO_InitTypeDef GPIO_InitDef;
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
@@ -35,15 +53,13 @@ int main(void){
GPIO_InitDef.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitDef.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_Init(GPIOA, &GPIO_InitDef);
uint32_t pin = !GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_13);
GPIO_InitDef.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, &GPIO_InitDef);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, DISABLE);
void (*SysMemBootJump)(void);
if ( (*((unsigned long *)0x2001C000) == 0xDEADBEEF) || pin) {//Memory map, datasheet
if ( (*((unsigned long *)0x2001C000) == 0xDEADBEEF) || pin || !app_ok()) {//Memory map, datasheet
*((unsigned long *)0x2001C000) = 0xCAFEFEED; //Reset bootloader trigger
__set_MSP(0x20001000);
//Point the PC to the System Memory reset vector (+4)
src/comps/term.comp
+9
View File
@@ -300,6 +300,15 @@ NRT(
printf_("newlib %s\n",_NEWLIB_VERSION);
printf_("CMSIS %i.%i\n",__CM4_CMSIS_VERSION_MAIN,__CM4_CMSIS_VERSION_SUB);
printf_("StdPeriph %i.%i.%i\n",__STM32F4XX_STDPERIPH_VERSION_MAIN,__STM32F4XX_STDPERIPH_VERSION_SUB1,__STM32F4XX_STDPERIPH_VERSION_SUB2);
uint32_t crc = crc32_init();
crc = crc32_update(crc, (void*)0x08010000, version_info.image_size);
crc = crc32_finalize(crc);
printf_("size: %u crc:%x\n",version_info.image_size,version_info.image_crc);
if(crc == 0)
printf_("crc ok!\n");
else
printf_("crc error!:%x\n",crc);
printf_("######## Bootloader info ########\n");
printf_(
"%s v%i.%i.%i %s\n",
src/main.c
+1
View File
@@ -26,6 +26,7 @@
#include "eeprom.h"
#include "link.h"
#include "crc8.h"
#include "crc32.h"
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
tools/checkcrc.py
Executable
+12
View File
@@ -0,0 +1,12 @@
#!/usr/bin/env python
import binascii
import sys
buf = open(sys.argv[1],'rb').read()
buf = (binascii.crc32(buf) & 0xFFFFFFFF)
if buf == 0:
print "crc ok!"
sys.exit(0)
else:
print "This should not happen. Please report a bug."
sys.exit(-1)