mirror of
https://github.com/rene-dev/stmbl.git
synced 2026-08-20 23:59:43 +08:00
format
This commit is contained in:
+20
-21
@@ -1,26 +1,25 @@
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#include "common_f1.h"
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void buff_packet(packet_header_t* p, uint8_t size){
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uint8_t nonkey_count = 0;
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uint8_t* buf = ((uint8_t*)p) + sizeof(packet_header_t);
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for(int i = size - 1; i >= 0; i--){
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if(buf[i] == p->start){
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buf[i] = nonkey_count;
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nonkey_count = 0;
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}
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else{
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nonkey_count++;
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}
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}
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p->key = nonkey_count;
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void buff_packet(packet_header_t *p, uint8_t size) {
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uint8_t nonkey_count = 0;
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uint8_t *buf = ((uint8_t *)p) + sizeof(packet_header_t);
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for(int i = size - 1; i >= 0; i--) {
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if(buf[i] == p->start) {
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buf[i] = nonkey_count;
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nonkey_count = 0;
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} else {
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nonkey_count++;
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}
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}
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p->key = nonkey_count;
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}
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void unbuff_packet(packet_header_t* p, uint8_t size){
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uint8_t temp;
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uint8_t* buf = ((uint8_t*)p) + sizeof(packet_header_t);
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for(int j = p->key; j < size;){
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temp = buf[j];
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buf[j] = p->start;
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j += temp + 1;
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}
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void unbuff_packet(packet_header_t *p, uint8_t size) {
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uint8_t temp;
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uint8_t *buf = ((uint8_t *)p) + sizeof(packet_header_t);
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for(int j = p->key; j < size;) {
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temp = buf[j];
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buf[j] = p->start;
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j += temp + 1;
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}
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}
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+28
-28
@@ -2,66 +2,66 @@
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#include <stdint.h>
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#if __GNUC__ < 5
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#error gcc to old (< 5.0)
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#error gcc to old (< 5.0)
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#endif
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//#define TROLLER
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#define DATABAUD 2250000 //baudrate used for communication
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#define DATABAUD 2250000 //baudrate used for communication
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//fixed point calculations signed bit, 9 bit predecimal, 6 bit decimal
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#define TOFIXED(a) ((int16_t)((a) * 64))
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#define TOFIXED(a) ((int16_t)((a)*64))
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#define TOFLOAT(a) ((float)((a) / 64.0))
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#define PWM_RES 2400
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//TODO: CRC
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typedef struct {
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uint8_t start; // 255
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uint8_t key;
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uint8_t start; // 255
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uint8_t key;
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} packet_header_t;
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//data from f1 to f4
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#pragma pack(1)
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typedef struct {
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int16_t dc_cur;
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int16_t dc_volt;
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int16_t hv_temp;
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uint8_t high_volt : 1;//hardware hi limit
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uint8_t low_volt : 1;//hardware low limit
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uint8_t over_cur : 1;//hardware cur limit
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uint8_t over_temp : 1;//hardware temp limit
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uint8_t hv_fault : 1;//iramx fault
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uint8_t sys_fault : 1;//sys fault, crc error, clock error, watchdog bit, startup failure...
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uint8_t padding : 2;
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int16_t dc_cur;
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int16_t dc_volt;
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int16_t hv_temp;
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uint8_t high_volt : 1; //hardware hi limit
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uint8_t low_volt : 1; //hardware low limit
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uint8_t over_cur : 1; //hardware cur limit
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uint8_t over_temp : 1; //hardware temp limit
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uint8_t hv_fault : 1; //iramx fault
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uint8_t sys_fault : 1; //sys fault, crc error, clock error, watchdog bit, startup failure...
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uint8_t padding : 2;
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#ifdef TROLLER
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int16_t a;
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int16_t b;
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int16_t c;
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int16_t a;
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int16_t b;
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int16_t c;
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#endif
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} from_hv_t;
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//data from f4 to f1
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#pragma pack(1)
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typedef struct {
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float a;
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float b;
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float pos;
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uint8_t mode : 4;//TODO: change to enum
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uint8_t enable : 1;
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uint8_t padding : 3;
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float a;
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float b;
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float pos;
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uint8_t mode : 4; //TODO: change to enum
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uint8_t enable : 1;
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uint8_t padding : 3;
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} to_hv_t;
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#pragma pack(1)
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typedef struct {
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packet_header_t head;
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to_hv_t data;
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packet_header_t head;
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to_hv_t data;
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} packet_to_hv_t;
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#pragma pack(1)
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typedef struct {
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packet_header_t head;
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from_hv_t data;
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packet_header_t head;
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from_hv_t data;
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} packet_from_hv_t;
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void buff_packet(packet_header_t *p, uint8_t size);
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+10
-10
@@ -64,11 +64,11 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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float co0[PID_WAVES * ADC_OVER_FB0];
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uint32_t sii0, coi0;
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#ifdef FB1
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#ifdef FB1
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float co1[PID_WAVES * ADC_OVER_FB1];
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float si1[PID_WAVES * ADC_OVER_FB1];
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uint32_t sii1, coi1;
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#endif
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#endif
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float s_o = PIN(sin_offset);
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float c_o = PIN(cos_offset);
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@@ -88,22 +88,22 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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for(int i = 0; i < PID_WAVES; i++) {
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sii0 = 0;
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coi0 = 0;
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#ifdef FB1
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#ifdef FB1
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sii1 = 0;
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coi1 = 0;
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#endif
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#endif
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for(int j = 0; j < ADC_TR_COUNT; j++) {
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//ADC dual mode puts both channels in one word, right aligned.
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for(int k = 0; k < ADC_OVER_FB0; k++) {
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sii0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff;
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coi0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16;
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}
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#ifdef FB1
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#ifdef FB1
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for(int k = ADC_OVER_FB0; k < ADC_OVER_FB0 + ADC_OVER_FB1; k++) {
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sii1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff;
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coi1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16;
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}
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#endif
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#endif
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// if(ctx->send == 0) { // TODO: move V_DIFF2 to nrt, this is too slow
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// ctx->txbuf[0][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ADC_DMA_Buffer[i * ADC_ANZ + j] & 0x0000ffff);
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// ctx->txbuf[1][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ADC_DMA_Buffer[i * ADC_ANZ + j] >> 16);
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@@ -112,10 +112,10 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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}
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si0[i] = s_g * V_DIFF(sii0, ADC_TR_COUNT * ADC_OVER_FB0) + s_o;
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co0[i] = c_g * V_DIFF(coi0, ADC_TR_COUNT * ADC_OVER_FB0) + c_o;
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#ifdef FB1
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#ifdef FB1
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si1[i] = s_g * V_DIFF(sii1, ADC_TR_COUNT * ADC_OVER_FB1) + s_o;
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co1[i] = c_g * V_DIFF(coi1, ADC_TR_COUNT * ADC_OVER_FB1) + c_o;
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#endif
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#endif
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}
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// if(ctx->send == 0) {
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// ctx->send = 1;
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@@ -124,10 +124,10 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
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PIN(sin3) = si0[3];
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PIN(cos3) = co0[3];
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#ifdef FB1
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#ifdef FB1
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PIN(sin1) = si1[3];
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PIN(cos1) = co1[3];
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#endif
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#endif
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if(PIN(res_en) > 0.0) {
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s = (si0[3] - si0[2] + si0[1] - si0[0]) / 4.0;
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c = (co0[3] - co0[2] + co0[1] - co0[0]) / 4.0;
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+99
-101
@@ -18,7 +18,7 @@ HAL_PIN(enable);
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HAL_PIN(error);
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HAL_PIN(over_cur);
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HAL_PIN(over_temp);
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HAL_PIN(hv_fault);
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HAL_PIN(hv_fault);
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HAL_PIN(dc_cur);
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HAL_PIN(dc_volt);
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@@ -40,62 +40,62 @@ static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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struct hv_ctx_t *ctx = (struct hv_ctx_t *)ctx_ptr;
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struct hv_pin_ctx_t *pins = (struct hv_pin_ctx_t *)pin_ptr;
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//setup uart to f1. uses DMA to transfer to_hv struct.
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GPIO_InitTypeDef GPIO_InitStruct;
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USART_InitTypeDef USART_InitStruct;
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UART_DRV_CLOCK_COMMAND(UART_DRV_RCC, ENABLE);
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//setup uart to f1. uses DMA to transfer to_hv struct.
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GPIO_InitTypeDef GPIO_InitStruct;
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USART_InitTypeDef USART_InitStruct;
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UART_DRV_CLOCK_COMMAND(UART_DRV_RCC, ENABLE);
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//USART TX
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GPIO_PinAFConfig(UART_DRV_TX_PORT, UART_DRV_TX_PIN_SOURCE, UART_DRV_TX_AF_SOURCE);
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GPIO_InitStruct.GPIO_Pin = UART_DRV_TX_PIN;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP ;
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GPIO_Init(UART_DRV_TX_PORT, &GPIO_InitStruct);
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//USART TX
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GPIO_PinAFConfig(UART_DRV_TX_PORT, UART_DRV_TX_PIN_SOURCE, UART_DRV_TX_AF_SOURCE);
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GPIO_InitStruct.GPIO_Pin = UART_DRV_TX_PIN;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(UART_DRV_TX_PORT, &GPIO_InitStruct);
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//USART RX
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GPIO_PinAFConfig(UART_DRV_RX_PORT, UART_DRV_RX_PIN_SOURCE, UART_DRV_RX_AF_SOURCE);
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GPIO_InitStruct.GPIO_Pin = UART_DRV_RX_PIN;
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GPIO_Init(UART_DRV_RX_PORT, &GPIO_InitStruct);
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//USART RX
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GPIO_PinAFConfig(UART_DRV_RX_PORT, UART_DRV_RX_PIN_SOURCE, UART_DRV_RX_AF_SOURCE);
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GPIO_InitStruct.GPIO_Pin = UART_DRV_RX_PIN;
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GPIO_Init(UART_DRV_RX_PORT, &GPIO_InitStruct);
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USART_InitStruct.USART_BaudRate = DATABAUD;
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USART_InitStruct.USART_WordLength = USART_WordLength_8b;
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USART_InitStruct.USART_StopBits = USART_StopBits_1;
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USART_InitStruct.USART_Parity = USART_Parity_No;
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USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(UART_DRV, &USART_InitStruct);
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USART_InitStruct.USART_BaudRate = DATABAUD;
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USART_InitStruct.USART_WordLength = USART_WordLength_8b;
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USART_InitStruct.USART_StopBits = USART_StopBits_1;
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USART_InitStruct.USART_Parity = USART_Parity_No;
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USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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USART_Init(UART_DRV, &USART_InitStruct);
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/* Enable the USART */
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USART_Cmd(UART_DRV, ENABLE);
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/* Enable the USART */
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USART_Cmd(UART_DRV, ENABLE);
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// DMA-Disable
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DMA_Cmd(UART_DRV_TX_DMA, DISABLE);
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DMA_DeInit(UART_DRV_TX_DMA);
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// DMA-Disable
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DMA_Cmd(UART_DRV_TX_DMA, DISABLE);
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DMA_DeInit(UART_DRV_TX_DMA);
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// DMA2-Config
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DMA_InitTypeDef DMA_InitStructure;
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DMA_InitStructure.DMA_Channel = UART_DRV_TX_DMA_CHAN;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(UART_DRV->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &(ctx->packet_to_hv);
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_BufferSize = sizeof(packet_to_hv_t);
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(UART_DRV_TX_DMA, &DMA_InitStructure);
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// DMA2-Config
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DMA_InitTypeDef DMA_InitStructure;
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DMA_InitStructure.DMA_Channel = UART_DRV_TX_DMA_CHAN;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) & (UART_DRV->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) & (ctx->packet_to_hv);
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DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
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DMA_InitStructure.DMA_BufferSize = sizeof(packet_to_hv_t);
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(UART_DRV_TX_DMA, &DMA_InitStructure);
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//DMA_Cmd(UART_DRV_TX_DMA, ENABLE);
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//DMA_Cmd(UART_DRV_TX_DMA, ENABLE);
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USART_DMACmd(UART_DRV, USART_DMAReq_Tx, ENABLE);
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USART_DMACmd(UART_DRV, USART_DMAReq_Tx, ENABLE);
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// DMA-Disable
|
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@@ -103,82 +103,80 @@ static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
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DMA_DeInit(UART_DRV_RX_DMA);
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// DMA2-Config
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DMA_InitStructure.DMA_Channel = UART_DRV_RX_DMA_CHAN;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(UART_DRV->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &(ctx->packet_from_hv);
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStructure.DMA_BufferSize = sizeof(packet_from_hv_t);
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_Channel = UART_DRV_RX_DMA_CHAN;
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DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) & (UART_DRV->DR);
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DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) & (ctx->packet_from_hv);
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
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DMA_InitStructure.DMA_BufferSize = sizeof(packet_from_hv_t);
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_High;
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DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
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||||
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
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DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
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||||
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
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DMA_Init(UART_DRV_RX_DMA, &DMA_InitStructure);
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USART_DMACmd(UART_DRV, USART_DMAReq_Rx, ENABLE);
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|
||||
ctx->packet_to_hv.head.start = 255;
|
||||
ctx->packet_to_hv.head.key = 0;
|
||||
ctx->packet_to_hv.head.start = 255;
|
||||
ctx->packet_to_hv.head.key = 0;
|
||||
ctx->packet_from_hv.head.start = 0;
|
||||
ctx->packet_from_hv.head.key = 0;
|
||||
ctx->packet_from_hv.head.key = 0;
|
||||
}
|
||||
|
||||
static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
|
||||
struct hv_ctx_t *ctx = (struct hv_ctx_t *) ctx_ptr;
|
||||
struct hv_pin_ctx_t *pins = (struct hv_pin_ctx_t *) pin_ptr;
|
||||
|
||||
struct hv_ctx_t *ctx = (struct hv_ctx_t *)ctx_ptr;
|
||||
struct hv_pin_ctx_t *pins = (struct hv_pin_ctx_t *)pin_ptr;
|
||||
|
||||
float e = PIN(enable);
|
||||
|
||||
if(ctx->packet_from_hv.head.start == 255) {
|
||||
unbuff_packet((packet_header_t *) &(ctx->packet_from_hv), sizeof(from_hv_t));
|
||||
unbuff_packet((packet_header_t *)&(ctx->packet_from_hv), sizeof(from_hv_t));
|
||||
ctx->packet_from_hv.head.start = 0;
|
||||
PIN(dc_cur) = TOFLOAT(ctx->packet_from_hv.data.dc_cur)*0.5 + PIN(dc_cur)*0.5;
|
||||
PIN(dc_volt) = TOFLOAT(ctx->packet_from_hv.data.dc_volt);
|
||||
if(PIN(mode) == 0) {//AC
|
||||
PIN(pwm_volt) = PIN(dc_volt) / 2.0 * 0.95 * 1.15;
|
||||
} else if(PIN(mode) == 1) {//DC
|
||||
PIN(pwm_volt) = PIN(dc_volt) * 0.95;
|
||||
} else if(PIN(mode) == 2) {//2phase ac
|
||||
PIN(pwm_volt) = PIN(dc_volt) * 0.7 * 0.95;
|
||||
PIN(dc_cur) = TOFLOAT(ctx->packet_from_hv.data.dc_cur) * 0.5 + PIN(dc_cur) * 0.5;
|
||||
PIN(dc_volt) = TOFLOAT(ctx->packet_from_hv.data.dc_volt);
|
||||
if(PIN(mode) == 0) { //AC
|
||||
PIN(pwm_volt) = PIN(dc_volt) / 2.0 * 0.95 * 1.15;
|
||||
} else if(PIN(mode) == 1) { //DC
|
||||
PIN(pwm_volt) = PIN(dc_volt) * 0.95;
|
||||
} else if(PIN(mode) == 2) { //2phase ac
|
||||
PIN(pwm_volt) = PIN(dc_volt) * 0.7 * 0.95;
|
||||
} else {
|
||||
PIN(pwm_volt) = 0.0;
|
||||
PIN(pwm_volt) = 0.0;
|
||||
}
|
||||
PIN(hv_temp) = TOFLOAT(ctx->packet_from_hv.data.hv_temp);
|
||||
PIN(over_cur) = ctx->packet_from_hv.data.over_cur;//hardware cur limit
|
||||
PIN(over_temp) = ctx->packet_from_hv.data.over_temp;//hardware temp limit
|
||||
PIN(hv_fault) = ctx->packet_from_hv.data.hv_fault;//iramx fault
|
||||
|
||||
PIN(error) = 0.0;//TODO: link to fault
|
||||
}
|
||||
else {
|
||||
PIN(hv_temp) = TOFLOAT(ctx->packet_from_hv.data.hv_temp);
|
||||
PIN(over_cur) = ctx->packet_from_hv.data.over_cur; //hardware cur limit
|
||||
PIN(over_temp) = ctx->packet_from_hv.data.over_temp; //hardware temp limit
|
||||
PIN(hv_fault) = ctx->packet_from_hv.data.hv_fault; //iramx fault
|
||||
|
||||
PIN(error) = 0.0; //TODO: link to fault
|
||||
} else {
|
||||
PIN(error) = 1.0;
|
||||
}
|
||||
|
||||
float a = PIN(a);
|
||||
float b = PIN(b);
|
||||
|
||||
if(PIN(rev) > 0.0) {//TODO: rev DC
|
||||
if(PIN(rev) > 0.0) { //TODO: rev DC
|
||||
b *= -1.0;
|
||||
}
|
||||
|
||||
ctx->packet_to_hv.data.mode = CLAMP(PIN(mode),0,16);
|
||||
|
||||
ctx->packet_to_hv.data.mode = CLAMP(PIN(mode), 0, 16);
|
||||
if(e > 0.0) {
|
||||
ctx->packet_to_hv.data.a = a;
|
||||
ctx->packet_to_hv.data.b = b;
|
||||
ctx->packet_to_hv.data.a = a;
|
||||
ctx->packet_to_hv.data.b = b;
|
||||
ctx->packet_to_hv.data.enable = 1;
|
||||
}
|
||||
else {
|
||||
ctx->packet_to_hv.data.a = 0;
|
||||
ctx->packet_to_hv.data.b = 0;
|
||||
} else {
|
||||
ctx->packet_to_hv.data.a = 0;
|
||||
ctx->packet_to_hv.data.b = 0;
|
||||
ctx->packet_to_hv.data.enable = 0;
|
||||
}
|
||||
buff_packet((packet_header_t *) &(ctx->packet_to_hv), sizeof(to_hv_t));
|
||||
buff_packet((packet_header_t *)&(ctx->packet_to_hv), sizeof(to_hv_t));
|
||||
|
||||
//start DMA TX transfer
|
||||
DMA_Cmd(UART_DRV_TX_DMA, DISABLE);
|
||||
@@ -191,11 +189,11 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
|
||||
DMA_Cmd(UART_DRV_RX_DMA, ENABLE);
|
||||
|
||||
PIN(power) = PIN(dc_cur) * PIN(dc_volt);
|
||||
if(PIN(pwm_volt) > 0.0){
|
||||
PIN(dc_cur_sim) = ABS(PIN(iq)) / PIN(pwm_volt) * sqrtf(a*a + b*b)*0.5 + PIN(dc_cur_sim)*0.5;
|
||||
if(PIN(pwm_volt) > 0.0) {
|
||||
PIN(dc_cur_sim) = ABS(PIN(iq)) / PIN(pwm_volt) * sqrtf(a * a + b * b) * 0.5 + PIN(dc_cur_sim) * 0.5;
|
||||
}
|
||||
if(ABS(a*b) > 0.01){
|
||||
PIN(ac_cur_sim) = PIN(dc_cur) / sqrtf(a*a+b*b) * PIN(pwm_volt);
|
||||
if(ABS(a * b) > 0.01) {
|
||||
PIN(ac_cur_sim) = PIN(dc_cur) / sqrtf(a * a + b * b) * PIN(pwm_volt);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
+82
-83
@@ -30,103 +30,102 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
|
||||
// struct io_ctx_t * ctx = (struct io_ctx_t *)ctx_ptr;
|
||||
struct io_pin_ctx_t *pins = (struct io_pin_ctx_t *)pin_ptr;
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
|
||||
//fan
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_10 | GPIO_Pin_11;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
|
||||
//brake
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_OCInitTypeDef TIM_OCInitStructure;
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV4;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseStructure.TIM_Period = 8400; // 168e6 / 8400 = 20kHz
|
||||
TIM_TimeBaseStructure.TIM_Prescaler = 0;
|
||||
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
|
||||
TIM_ARRPreloadConfig(TIM8,ENABLE);
|
||||
TIM_Cmd(TIM8, ENABLE);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_TIM8);
|
||||
|
||||
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
||||
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
|
||||
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
|
||||
TIM_OCInitStructure.TIM_Pulse = 0;
|
||||
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
|
||||
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
|
||||
//fan
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_10 | GPIO_Pin_11;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
TIM_OC4Init(TIM8, &TIM_OCInitStructure);
|
||||
TIM_OC4PreloadConfig(TIM8, TIM_OCPreload_Enable);
|
||||
TIM_CtrlPWMOutputs(TIM8, ENABLE);
|
||||
|
||||
//brake
|
||||
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
||||
TIM_OCInitTypeDef TIM_OCInitStructure;
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
|
||||
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV4;
|
||||
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
TIM_TimeBaseStructure.TIM_Period = 8400; // 168e6 / 8400 = 20kHz
|
||||
TIM_TimeBaseStructure.TIM_Prescaler = 0;
|
||||
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
|
||||
TIM_ARRPreloadConfig(TIM8, ENABLE);
|
||||
TIM_Cmd(TIM8, ENABLE);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_TIM8);
|
||||
|
||||
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
|
||||
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
|
||||
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
|
||||
TIM_OCInitStructure.TIM_Pulse = 0;
|
||||
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
|
||||
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
|
||||
|
||||
TIM_OC4Init(TIM8, &TIM_OCInitStructure);
|
||||
TIM_OC4PreloadConfig(TIM8, TIM_OCPreload_Enable);
|
||||
TIM_CtrlPWMOutputs(TIM8, ENABLE);
|
||||
}
|
||||
|
||||
static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
|
||||
// struct io_ctx_t * ctx = (struct io_ctx_t *)ctx_ptr;
|
||||
struct io_pin_ctx_t *pins = (struct io_pin_ctx_t *)pin_ptr;
|
||||
if(PIN(fan) > 0)
|
||||
GPIO_SetBits(GPIOC, GPIO_Pin_8);
|
||||
else
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pin_8);
|
||||
if(PIN(fan) > 0)
|
||||
GPIO_SetBits(GPIOC, GPIO_Pin_8);
|
||||
else
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pin_8);
|
||||
|
||||
TIM8->CCR4 = (int)CLAMP(PIN(brake) * 8400, 0, TIM8->ARR - 1);
|
||||
TIM8->CCR4 = (int)CLAMP(PIN(brake) * 8400, 0, TIM8->ARR - 1);
|
||||
|
||||
uint32_t red = 0;
|
||||
uint32_t green = 0;
|
||||
|
||||
switch((state_t)PIN(state)){
|
||||
case DISABLED:
|
||||
green = BLINK(1);
|
||||
red = 0;
|
||||
break;
|
||||
|
||||
case ENABLED:
|
||||
green = 1;
|
||||
red = 0;
|
||||
break;
|
||||
|
||||
case PHASING:
|
||||
green = 1;
|
||||
red = 1;
|
||||
break;
|
||||
|
||||
case SOFT_FAULT:
|
||||
green = 0;
|
||||
red = BLINK((int)PIN(fault));
|
||||
break;
|
||||
|
||||
case HARD_FAULT:
|
||||
red = BLINK((int)PIN(fault));
|
||||
green = BLINK((int)PIN(fault));
|
||||
break;
|
||||
}
|
||||
uint32_t red = 0;
|
||||
uint32_t green = 0;
|
||||
|
||||
if(red > 0)
|
||||
GPIO_SetBits(GPIOC, GPIO_Pin_10);
|
||||
else
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pin_10);
|
||||
switch((state_t)PIN(state)) {
|
||||
case DISABLED:
|
||||
green = BLINK(1);
|
||||
red = 0;
|
||||
break;
|
||||
|
||||
if(green > 0)
|
||||
GPIO_SetBits(GPIOC, GPIO_Pin_11);
|
||||
else
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pin_11);
|
||||
case ENABLED:
|
||||
green = 1;
|
||||
red = 0;
|
||||
break;
|
||||
|
||||
case PHASING:
|
||||
green = 1;
|
||||
red = 1;
|
||||
break;
|
||||
|
||||
case SOFT_FAULT:
|
||||
green = 0;
|
||||
red = BLINK((int)PIN(fault));
|
||||
break;
|
||||
|
||||
case HARD_FAULT:
|
||||
red = BLINK((int)PIN(fault));
|
||||
green = BLINK((int)PIN(fault));
|
||||
break;
|
||||
}
|
||||
|
||||
hal_comp_t io_comp_struct = {
|
||||
if(red > 0)
|
||||
GPIO_SetBits(GPIOC, GPIO_Pin_10);
|
||||
else
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pin_10);
|
||||
|
||||
if(green > 0)
|
||||
GPIO_SetBits(GPIOC, GPIO_Pin_11);
|
||||
else
|
||||
GPIO_ResetBits(GPIOC, GPIO_Pin_11);
|
||||
}
|
||||
|
||||
hal_comp_t io_comp_struct = {
|
||||
.name = "io",
|
||||
.nrt = 0,
|
||||
.rt = rt_func,
|
||||
|
||||
+7
-7
@@ -332,7 +332,7 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
|
||||
//bytes to wait before expected end of transmission to prevent timeouts
|
||||
block_bytes = 2;
|
||||
//calculate timeout in systicks for block_bytes
|
||||
max_waste_ticks = (1.0/2500000.0) * 11.0 * (float)block_bytes / (1.0f/(float)hal_get_systick_freq());
|
||||
max_waste_ticks = (1.0 / 2500000.0) * 11.0 * (float)block_bytes / (1.0f / (float)hal_get_systick_freq());
|
||||
}
|
||||
|
||||
|
||||
@@ -400,20 +400,20 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
|
||||
send(sizeof(discovery), 1);
|
||||
rxpos += 2;
|
||||
} else if(lbp.byte == ProcessDataRPC && available >= discovery.output + 2 - block_bytes) { //process data, requires cmd+output bytes+crc
|
||||
uint32_t t1 = hal_get_systick_value();
|
||||
uint32_t t1 = hal_get_systick_value();
|
||||
uint32_t wait_ticks = 0;
|
||||
//wait with timeout until rest of process data is received
|
||||
do{
|
||||
do {
|
||||
uint32_t t2 = hal_get_systick_value();
|
||||
if(t1 < t2) {
|
||||
t1 += hal_get_systick_reload();
|
||||
}
|
||||
wait_ticks = t1-t2;
|
||||
wait_ticks = t1 - t2;
|
||||
//next received packet will be written to bufferpos
|
||||
bufferpos = sizeof(rxbuf) - DMA_GetCurrDataCounter(DMA2_Stream5);
|
||||
//how many packets we have the the rx buffer for processing
|
||||
available = (bufferpos - rxpos + sizeof(rxbuf)) % sizeof(rxbuf);
|
||||
}while(available < discovery.output + 2 && wait_ticks <= max_waste_ticks);
|
||||
} while(available < discovery.output + 2 && wait_ticks <= max_waste_ticks);
|
||||
//TODO: fault handling on timeout...
|
||||
//set input pins
|
||||
data_in.pos_fb = PIN(pos_fb) + PIN(vel_fb) * PIN(pos_advance);
|
||||
@@ -448,7 +448,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
|
||||
//send(discovery.input, 1);
|
||||
|
||||
//we cannot send the reply based on crc, as this causes timeouts TODO: still valid?
|
||||
if(crc_reuest(discovery.output + 1)){
|
||||
if(crc_reuest(discovery.output + 1)) {
|
||||
timeout = 0;
|
||||
//set output pins
|
||||
PIN(pos_cmd) = data_out.pos_cmd;
|
||||
@@ -458,7 +458,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
|
||||
PIN(out2) = data_out.output_pins_2;
|
||||
PIN(out3) = data_out.output_pins_3;
|
||||
PIN(enable) = data_out.enable;
|
||||
}else{
|
||||
} else {
|
||||
PIN(crc_error)
|
||||
++;
|
||||
PIN(connected) = 0;
|
||||
|
||||
Reference in New Issue
Block a user