This commit is contained in:
Rene Hopf
2017-11-01 23:56:47 +01:00
parent 6182736817
commit 3f289d11fc
6 changed files with 246 additions and 250 deletions
+20 -21
View File
@@ -1,26 +1,25 @@
#include "common_f1.h"
void buff_packet(packet_header_t* p, uint8_t size){
uint8_t nonkey_count = 0;
uint8_t* buf = ((uint8_t*)p) + sizeof(packet_header_t);
for(int i = size - 1; i >= 0; i--){
if(buf[i] == p->start){
buf[i] = nonkey_count;
nonkey_count = 0;
}
else{
nonkey_count++;
}
}
p->key = nonkey_count;
void buff_packet(packet_header_t *p, uint8_t size) {
uint8_t nonkey_count = 0;
uint8_t *buf = ((uint8_t *)p) + sizeof(packet_header_t);
for(int i = size - 1; i >= 0; i--) {
if(buf[i] == p->start) {
buf[i] = nonkey_count;
nonkey_count = 0;
} else {
nonkey_count++;
}
}
p->key = nonkey_count;
}
void unbuff_packet(packet_header_t* p, uint8_t size){
uint8_t temp;
uint8_t* buf = ((uint8_t*)p) + sizeof(packet_header_t);
for(int j = p->key; j < size;){
temp = buf[j];
buf[j] = p->start;
j += temp + 1;
}
void unbuff_packet(packet_header_t *p, uint8_t size) {
uint8_t temp;
uint8_t *buf = ((uint8_t *)p) + sizeof(packet_header_t);
for(int j = p->key; j < size;) {
temp = buf[j];
buf[j] = p->start;
j += temp + 1;
}
}
+28 -28
View File
@@ -2,66 +2,66 @@
#include <stdint.h>
#if __GNUC__ < 5
#error gcc to old (< 5.0)
#error gcc to old (< 5.0)
#endif
//#define TROLLER
#define DATABAUD 2250000 //baudrate used for communication
#define DATABAUD 2250000 //baudrate used for communication
//fixed point calculations signed bit, 9 bit predecimal, 6 bit decimal
#define TOFIXED(a) ((int16_t)((a) * 64))
#define TOFIXED(a) ((int16_t)((a)*64))
#define TOFLOAT(a) ((float)((a) / 64.0))
#define PWM_RES 2400
//TODO: CRC
typedef struct {
uint8_t start; // 255
uint8_t key;
uint8_t start; // 255
uint8_t key;
} packet_header_t;
//data from f1 to f4
#pragma pack(1)
typedef struct {
int16_t dc_cur;
int16_t dc_volt;
int16_t hv_temp;
uint8_t high_volt : 1;//hardware hi limit
uint8_t low_volt : 1;//hardware low limit
uint8_t over_cur : 1;//hardware cur limit
uint8_t over_temp : 1;//hardware temp limit
uint8_t hv_fault : 1;//iramx fault
uint8_t sys_fault : 1;//sys fault, crc error, clock error, watchdog bit, startup failure...
uint8_t padding : 2;
int16_t dc_cur;
int16_t dc_volt;
int16_t hv_temp;
uint8_t high_volt : 1; //hardware hi limit
uint8_t low_volt : 1; //hardware low limit
uint8_t over_cur : 1; //hardware cur limit
uint8_t over_temp : 1; //hardware temp limit
uint8_t hv_fault : 1; //iramx fault
uint8_t sys_fault : 1; //sys fault, crc error, clock error, watchdog bit, startup failure...
uint8_t padding : 2;
#ifdef TROLLER
int16_t a;
int16_t b;
int16_t c;
int16_t a;
int16_t b;
int16_t c;
#endif
} from_hv_t;
//data from f4 to f1
#pragma pack(1)
typedef struct {
float a;
float b;
float pos;
uint8_t mode : 4;//TODO: change to enum
uint8_t enable : 1;
uint8_t padding : 3;
float a;
float b;
float pos;
uint8_t mode : 4; //TODO: change to enum
uint8_t enable : 1;
uint8_t padding : 3;
} to_hv_t;
#pragma pack(1)
typedef struct {
packet_header_t head;
to_hv_t data;
packet_header_t head;
to_hv_t data;
} packet_to_hv_t;
#pragma pack(1)
typedef struct {
packet_header_t head;
from_hv_t data;
packet_header_t head;
from_hv_t data;
} packet_from_hv_t;
void buff_packet(packet_header_t *p, uint8_t size);
+10 -10
View File
@@ -64,11 +64,11 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
float co0[PID_WAVES * ADC_OVER_FB0];
uint32_t sii0, coi0;
#ifdef FB1
#ifdef FB1
float co1[PID_WAVES * ADC_OVER_FB1];
float si1[PID_WAVES * ADC_OVER_FB1];
uint32_t sii1, coi1;
#endif
#endif
float s_o = PIN(sin_offset);
float c_o = PIN(cos_offset);
@@ -88,22 +88,22 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
for(int i = 0; i < PID_WAVES; i++) {
sii0 = 0;
coi0 = 0;
#ifdef FB1
#ifdef FB1
sii1 = 0;
coi1 = 0;
#endif
#endif
for(int j = 0; j < ADC_TR_COUNT; j++) {
//ADC dual mode puts both channels in one word, right aligned.
for(int k = 0; k < ADC_OVER_FB0; k++) {
sii0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff;
coi0 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16;
}
#ifdef FB1
#ifdef FB1
for(int k = ADC_OVER_FB0; k < ADC_OVER_FB0 + ADC_OVER_FB1; k++) {
sii1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] & 0x0000ffff;
coi1 += ADC_DMA_Buffer[i * ADC_TR_COUNT * (ADC_OVER_FB0 + ADC_OVER_FB1) + j * (ADC_OVER_FB0 + ADC_OVER_FB1) + k] >> 16;
}
#endif
#endif
// if(ctx->send == 0) { // TODO: move V_DIFF2 to nrt, this is too slow
// ctx->txbuf[0][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ADC_DMA_Buffer[i * ADC_ANZ + j] & 0x0000ffff);
// ctx->txbuf[1][ctx->txpos] = (((i == 0 || i == 2) && (PIN(res_en) > 0.0)) ? -1.0 : 1.0) * V_DIFF2(ADC_DMA_Buffer[i * ADC_ANZ + j] >> 16);
@@ -112,10 +112,10 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
}
si0[i] = s_g * V_DIFF(sii0, ADC_TR_COUNT * ADC_OVER_FB0) + s_o;
co0[i] = c_g * V_DIFF(coi0, ADC_TR_COUNT * ADC_OVER_FB0) + c_o;
#ifdef FB1
#ifdef FB1
si1[i] = s_g * V_DIFF(sii1, ADC_TR_COUNT * ADC_OVER_FB1) + s_o;
co1[i] = c_g * V_DIFF(coi1, ADC_TR_COUNT * ADC_OVER_FB1) + c_o;
#endif
#endif
}
// if(ctx->send == 0) {
// ctx->send = 1;
@@ -124,10 +124,10 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
PIN(sin3) = si0[3];
PIN(cos3) = co0[3];
#ifdef FB1
#ifdef FB1
PIN(sin1) = si1[3];
PIN(cos1) = co1[3];
#endif
#endif
if(PIN(res_en) > 0.0) {
s = (si0[3] - si0[2] + si0[1] - si0[0]) / 4.0;
c = (co0[3] - co0[2] + co0[1] - co0[0]) / 4.0;
+99 -101
View File
@@ -18,7 +18,7 @@ HAL_PIN(enable);
HAL_PIN(error);
HAL_PIN(over_cur);
HAL_PIN(over_temp);
HAL_PIN(hv_fault);
HAL_PIN(hv_fault);
HAL_PIN(dc_cur);
HAL_PIN(dc_volt);
@@ -40,62 +40,62 @@ static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
struct hv_ctx_t *ctx = (struct hv_ctx_t *)ctx_ptr;
struct hv_pin_ctx_t *pins = (struct hv_pin_ctx_t *)pin_ptr;
//setup uart to f1. uses DMA to transfer to_hv struct.
GPIO_InitTypeDef GPIO_InitStruct;
USART_InitTypeDef USART_InitStruct;
UART_DRV_CLOCK_COMMAND(UART_DRV_RCC, ENABLE);
//setup uart to f1. uses DMA to transfer to_hv struct.
GPIO_InitTypeDef GPIO_InitStruct;
USART_InitTypeDef USART_InitStruct;
UART_DRV_CLOCK_COMMAND(UART_DRV_RCC, ENABLE);
//USART TX
GPIO_PinAFConfig(UART_DRV_TX_PORT, UART_DRV_TX_PIN_SOURCE, UART_DRV_TX_AF_SOURCE);
GPIO_InitStruct.GPIO_Pin = UART_DRV_TX_PIN;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP ;
GPIO_Init(UART_DRV_TX_PORT, &GPIO_InitStruct);
//USART TX
GPIO_PinAFConfig(UART_DRV_TX_PORT, UART_DRV_TX_PIN_SOURCE, UART_DRV_TX_AF_SOURCE);
GPIO_InitStruct.GPIO_Pin = UART_DRV_TX_PIN;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(UART_DRV_TX_PORT, &GPIO_InitStruct);
//USART RX
GPIO_PinAFConfig(UART_DRV_RX_PORT, UART_DRV_RX_PIN_SOURCE, UART_DRV_RX_AF_SOURCE);
GPIO_InitStruct.GPIO_Pin = UART_DRV_RX_PIN;
GPIO_Init(UART_DRV_RX_PORT, &GPIO_InitStruct);
//USART RX
GPIO_PinAFConfig(UART_DRV_RX_PORT, UART_DRV_RX_PIN_SOURCE, UART_DRV_RX_AF_SOURCE);
GPIO_InitStruct.GPIO_Pin = UART_DRV_RX_PIN;
GPIO_Init(UART_DRV_RX_PORT, &GPIO_InitStruct);
USART_InitStruct.USART_BaudRate = DATABAUD;
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
USART_InitStruct.USART_StopBits = USART_StopBits_1;
USART_InitStruct.USART_Parity = USART_Parity_No;
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(UART_DRV, &USART_InitStruct);
USART_InitStruct.USART_BaudRate = DATABAUD;
USART_InitStruct.USART_WordLength = USART_WordLength_8b;
USART_InitStruct.USART_StopBits = USART_StopBits_1;
USART_InitStruct.USART_Parity = USART_Parity_No;
USART_InitStruct.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStruct.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(UART_DRV, &USART_InitStruct);
/* Enable the USART */
USART_Cmd(UART_DRV, ENABLE);
/* Enable the USART */
USART_Cmd(UART_DRV, ENABLE);
// DMA-Disable
DMA_Cmd(UART_DRV_TX_DMA, DISABLE);
DMA_DeInit(UART_DRV_TX_DMA);
// DMA-Disable
DMA_Cmd(UART_DRV_TX_DMA, DISABLE);
DMA_DeInit(UART_DRV_TX_DMA);
// DMA2-Config
DMA_InitTypeDef DMA_InitStructure;
DMA_InitStructure.DMA_Channel = UART_DRV_TX_DMA_CHAN;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(UART_DRV->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &(ctx->packet_to_hv);
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = sizeof(packet_to_hv_t);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(UART_DRV_TX_DMA, &DMA_InitStructure);
// DMA2-Config
DMA_InitTypeDef DMA_InitStructure;
DMA_InitStructure.DMA_Channel = UART_DRV_TX_DMA_CHAN;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) & (UART_DRV->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) & (ctx->packet_to_hv);
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
DMA_InitStructure.DMA_BufferSize = sizeof(packet_to_hv_t);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(UART_DRV_TX_DMA, &DMA_InitStructure);
//DMA_Cmd(UART_DRV_TX_DMA, ENABLE);
//DMA_Cmd(UART_DRV_TX_DMA, ENABLE);
USART_DMACmd(UART_DRV, USART_DMAReq_Tx, ENABLE);
USART_DMACmd(UART_DRV, USART_DMAReq_Tx, ENABLE);
// DMA-Disable
@@ -103,82 +103,80 @@ static void nrt_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
DMA_DeInit(UART_DRV_RX_DMA);
// DMA2-Config
DMA_InitStructure.DMA_Channel = UART_DRV_RX_DMA_CHAN;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(UART_DRV->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) &(ctx->packet_from_hv);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = sizeof(packet_from_hv_t);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_Channel = UART_DRV_RX_DMA_CHAN;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) & (UART_DRV->DR);
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t) & (ctx->packet_from_hv);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = sizeof(packet_from_hv_t);
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(UART_DRV_RX_DMA, &DMA_InitStructure);
USART_DMACmd(UART_DRV, USART_DMAReq_Rx, ENABLE);
ctx->packet_to_hv.head.start = 255;
ctx->packet_to_hv.head.key = 0;
ctx->packet_to_hv.head.start = 255;
ctx->packet_to_hv.head.key = 0;
ctx->packet_from_hv.head.start = 0;
ctx->packet_from_hv.head.key = 0;
ctx->packet_from_hv.head.key = 0;
}
static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
struct hv_ctx_t *ctx = (struct hv_ctx_t *) ctx_ptr;
struct hv_pin_ctx_t *pins = (struct hv_pin_ctx_t *) pin_ptr;
struct hv_ctx_t *ctx = (struct hv_ctx_t *)ctx_ptr;
struct hv_pin_ctx_t *pins = (struct hv_pin_ctx_t *)pin_ptr;
float e = PIN(enable);
if(ctx->packet_from_hv.head.start == 255) {
unbuff_packet((packet_header_t *) &(ctx->packet_from_hv), sizeof(from_hv_t));
unbuff_packet((packet_header_t *)&(ctx->packet_from_hv), sizeof(from_hv_t));
ctx->packet_from_hv.head.start = 0;
PIN(dc_cur) = TOFLOAT(ctx->packet_from_hv.data.dc_cur)*0.5 + PIN(dc_cur)*0.5;
PIN(dc_volt) = TOFLOAT(ctx->packet_from_hv.data.dc_volt);
if(PIN(mode) == 0) {//AC
PIN(pwm_volt) = PIN(dc_volt) / 2.0 * 0.95 * 1.15;
} else if(PIN(mode) == 1) {//DC
PIN(pwm_volt) = PIN(dc_volt) * 0.95;
} else if(PIN(mode) == 2) {//2phase ac
PIN(pwm_volt) = PIN(dc_volt) * 0.7 * 0.95;
PIN(dc_cur) = TOFLOAT(ctx->packet_from_hv.data.dc_cur) * 0.5 + PIN(dc_cur) * 0.5;
PIN(dc_volt) = TOFLOAT(ctx->packet_from_hv.data.dc_volt);
if(PIN(mode) == 0) { //AC
PIN(pwm_volt) = PIN(dc_volt) / 2.0 * 0.95 * 1.15;
} else if(PIN(mode) == 1) { //DC
PIN(pwm_volt) = PIN(dc_volt) * 0.95;
} else if(PIN(mode) == 2) { //2phase ac
PIN(pwm_volt) = PIN(dc_volt) * 0.7 * 0.95;
} else {
PIN(pwm_volt) = 0.0;
PIN(pwm_volt) = 0.0;
}
PIN(hv_temp) = TOFLOAT(ctx->packet_from_hv.data.hv_temp);
PIN(over_cur) = ctx->packet_from_hv.data.over_cur;//hardware cur limit
PIN(over_temp) = ctx->packet_from_hv.data.over_temp;//hardware temp limit
PIN(hv_fault) = ctx->packet_from_hv.data.hv_fault;//iramx fault
PIN(error) = 0.0;//TODO: link to fault
}
else {
PIN(hv_temp) = TOFLOAT(ctx->packet_from_hv.data.hv_temp);
PIN(over_cur) = ctx->packet_from_hv.data.over_cur; //hardware cur limit
PIN(over_temp) = ctx->packet_from_hv.data.over_temp; //hardware temp limit
PIN(hv_fault) = ctx->packet_from_hv.data.hv_fault; //iramx fault
PIN(error) = 0.0; //TODO: link to fault
} else {
PIN(error) = 1.0;
}
float a = PIN(a);
float b = PIN(b);
if(PIN(rev) > 0.0) {//TODO: rev DC
if(PIN(rev) > 0.0) { //TODO: rev DC
b *= -1.0;
}
ctx->packet_to_hv.data.mode = CLAMP(PIN(mode),0,16);
ctx->packet_to_hv.data.mode = CLAMP(PIN(mode), 0, 16);
if(e > 0.0) {
ctx->packet_to_hv.data.a = a;
ctx->packet_to_hv.data.b = b;
ctx->packet_to_hv.data.a = a;
ctx->packet_to_hv.data.b = b;
ctx->packet_to_hv.data.enable = 1;
}
else {
ctx->packet_to_hv.data.a = 0;
ctx->packet_to_hv.data.b = 0;
} else {
ctx->packet_to_hv.data.a = 0;
ctx->packet_to_hv.data.b = 0;
ctx->packet_to_hv.data.enable = 0;
}
buff_packet((packet_header_t *) &(ctx->packet_to_hv), sizeof(to_hv_t));
buff_packet((packet_header_t *)&(ctx->packet_to_hv), sizeof(to_hv_t));
//start DMA TX transfer
DMA_Cmd(UART_DRV_TX_DMA, DISABLE);
@@ -191,11 +189,11 @@ static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_
DMA_Cmd(UART_DRV_RX_DMA, ENABLE);
PIN(power) = PIN(dc_cur) * PIN(dc_volt);
if(PIN(pwm_volt) > 0.0){
PIN(dc_cur_sim) = ABS(PIN(iq)) / PIN(pwm_volt) * sqrtf(a*a + b*b)*0.5 + PIN(dc_cur_sim)*0.5;
if(PIN(pwm_volt) > 0.0) {
PIN(dc_cur_sim) = ABS(PIN(iq)) / PIN(pwm_volt) * sqrtf(a * a + b * b) * 0.5 + PIN(dc_cur_sim) * 0.5;
}
if(ABS(a*b) > 0.01){
PIN(ac_cur_sim) = PIN(dc_cur) / sqrtf(a*a+b*b) * PIN(pwm_volt);
if(ABS(a * b) > 0.01) {
PIN(ac_cur_sim) = PIN(dc_cur) / sqrtf(a * a + b * b) * PIN(pwm_volt);
}
}
+82 -83
View File
@@ -30,103 +30,102 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
// struct io_ctx_t * ctx = (struct io_ctx_t *)ctx_ptr;
struct io_pin_ctx_t *pins = (struct io_pin_ctx_t *)pin_ptr;
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
//fan
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_10 | GPIO_Pin_11;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
//brake
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV4;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 8400; // 168e6 / 8400 = 20kHz
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
TIM_ARRPreloadConfig(TIM8,ENABLE);
TIM_Cmd(TIM8, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_TIM8);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
TIM_OCInitStructure.TIM_Pulse = 0;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
//fan
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_10 | GPIO_Pin_11;
GPIO_Init(GPIOC, &GPIO_InitStructure);
TIM_OC4Init(TIM8, &TIM_OCInitStructure);
TIM_OC4PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_CtrlPWMOutputs(TIM8, ENABLE);
//brake
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV4;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 8400; // 168e6 / 8400 = 20kHz
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
TIM_ARRPreloadConfig(TIM8, ENABLE);
TIM_Cmd(TIM8, ENABLE);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_TIM8);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
TIM_OCInitStructure.TIM_Pulse = 0;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OC4Init(TIM8, &TIM_OCInitStructure);
TIM_OC4PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_CtrlPWMOutputs(TIM8, ENABLE);
}
static void rt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
// struct io_ctx_t * ctx = (struct io_ctx_t *)ctx_ptr;
struct io_pin_ctx_t *pins = (struct io_pin_ctx_t *)pin_ptr;
if(PIN(fan) > 0)
GPIO_SetBits(GPIOC, GPIO_Pin_8);
else
GPIO_ResetBits(GPIOC, GPIO_Pin_8);
if(PIN(fan) > 0)
GPIO_SetBits(GPIOC, GPIO_Pin_8);
else
GPIO_ResetBits(GPIOC, GPIO_Pin_8);
TIM8->CCR4 = (int)CLAMP(PIN(brake) * 8400, 0, TIM8->ARR - 1);
TIM8->CCR4 = (int)CLAMP(PIN(brake) * 8400, 0, TIM8->ARR - 1);
uint32_t red = 0;
uint32_t green = 0;
switch((state_t)PIN(state)){
case DISABLED:
green = BLINK(1);
red = 0;
break;
case ENABLED:
green = 1;
red = 0;
break;
case PHASING:
green = 1;
red = 1;
break;
case SOFT_FAULT:
green = 0;
red = BLINK((int)PIN(fault));
break;
case HARD_FAULT:
red = BLINK((int)PIN(fault));
green = BLINK((int)PIN(fault));
break;
}
uint32_t red = 0;
uint32_t green = 0;
if(red > 0)
GPIO_SetBits(GPIOC, GPIO_Pin_10);
else
GPIO_ResetBits(GPIOC, GPIO_Pin_10);
switch((state_t)PIN(state)) {
case DISABLED:
green = BLINK(1);
red = 0;
break;
if(green > 0)
GPIO_SetBits(GPIOC, GPIO_Pin_11);
else
GPIO_ResetBits(GPIOC, GPIO_Pin_11);
case ENABLED:
green = 1;
red = 0;
break;
case PHASING:
green = 1;
red = 1;
break;
case SOFT_FAULT:
green = 0;
red = BLINK((int)PIN(fault));
break;
case HARD_FAULT:
red = BLINK((int)PIN(fault));
green = BLINK((int)PIN(fault));
break;
}
hal_comp_t io_comp_struct = {
if(red > 0)
GPIO_SetBits(GPIOC, GPIO_Pin_10);
else
GPIO_ResetBits(GPIOC, GPIO_Pin_10);
if(green > 0)
GPIO_SetBits(GPIOC, GPIO_Pin_11);
else
GPIO_ResetBits(GPIOC, GPIO_Pin_11);
}
hal_comp_t io_comp_struct = {
.name = "io",
.nrt = 0,
.rt = rt_func,
+7 -7
View File
@@ -332,7 +332,7 @@ static void hw_init(volatile void *ctx_ptr, volatile hal_pin_inst_t *pin_ptr) {
//bytes to wait before expected end of transmission to prevent timeouts
block_bytes = 2;
//calculate timeout in systicks for block_bytes
max_waste_ticks = (1.0/2500000.0) * 11.0 * (float)block_bytes / (1.0f/(float)hal_get_systick_freq());
max_waste_ticks = (1.0 / 2500000.0) * 11.0 * (float)block_bytes / (1.0f / (float)hal_get_systick_freq());
}
@@ -400,20 +400,20 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
send(sizeof(discovery), 1);
rxpos += 2;
} else if(lbp.byte == ProcessDataRPC && available >= discovery.output + 2 - block_bytes) { //process data, requires cmd+output bytes+crc
uint32_t t1 = hal_get_systick_value();
uint32_t t1 = hal_get_systick_value();
uint32_t wait_ticks = 0;
//wait with timeout until rest of process data is received
do{
do {
uint32_t t2 = hal_get_systick_value();
if(t1 < t2) {
t1 += hal_get_systick_reload();
}
wait_ticks = t1-t2;
wait_ticks = t1 - t2;
//next received packet will be written to bufferpos
bufferpos = sizeof(rxbuf) - DMA_GetCurrDataCounter(DMA2_Stream5);
//how many packets we have the the rx buffer for processing
available = (bufferpos - rxpos + sizeof(rxbuf)) % sizeof(rxbuf);
}while(available < discovery.output + 2 && wait_ticks <= max_waste_ticks);
} while(available < discovery.output + 2 && wait_ticks <= max_waste_ticks);
//TODO: fault handling on timeout...
//set input pins
data_in.pos_fb = PIN(pos_fb) + PIN(vel_fb) * PIN(pos_advance);
@@ -448,7 +448,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
//send(discovery.input, 1);
//we cannot send the reply based on crc, as this causes timeouts TODO: still valid?
if(crc_reuest(discovery.output + 1)){
if(crc_reuest(discovery.output + 1)) {
timeout = 0;
//set output pins
PIN(pos_cmd) = data_out.pos_cmd;
@@ -458,7 +458,7 @@ static void frt_func(float period, volatile void *ctx_ptr, volatile hal_pin_inst
PIN(out2) = data_out.output_pins_2;
PIN(out3) = data_out.output_pins_3;
PIN(enable) = data_out.enable;
}else{
} else {
PIN(crc_error)
++;
PIN(connected) = 0;