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v4.0

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crinq
2016-11-24 02:06:54 +01:00
parent a328fe3be5
commit 0936f3eee3
1 changed files with 69 additions and 80 deletions
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hw/kicad/v4.0/stmbl_4.0.kicad_pcb
+69 -80
View File
@@ -6,7 +6,7 @@
(area 81.186905 44.6925 215.075001 153.70332)
(thickness 1.6)
(drawings 115)
(tracks 4047)
(tracks 4036)
(zones 0)
(modules 422)
(nets 226)
@@ -1816,7 +1816,7 @@
)
(module Socket_Strips:Socket_Strip_Straight_1x04 (layer B.Cu) (tedit 583614D5) (tstamp 57AC0BF0)
(at 161 108.25 180)
(at 161 108.46 180)
(descr "Through hole socket strip")
(tags "socket strip")
(path /5659094D/57AEC939)
@@ -14873,13 +14873,13 @@
(gr_text "RST DIO - CK\n" (at 182.75 109.5) (layer B.SilkS) (tstamp 583C35EA)
(effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
)
(gr_text "STMBL 4.0 (HASH)\ngithub.com/rene-dev/stmbl" (at 157.25 112) (layer F.SilkS) (tstamp 5835E9D3)
(gr_text "STMBL 4.0 (a328fe3)\ngithub.com/rene-dev/stmbl" (at 157.25 112) (layer F.SilkS) (tstamp 5835E9D3)
(effects (font (size 1 1) (thickness 0.2)))
)
(gr_text "STMBL 4.0 (HASH)\ngithub.com/rene-dev/stmbl" (at 185 146.5) (layer B.SilkS) (tstamp 5835E9D0)
(gr_text "STMBL 4.0 (a328fe3)\ngithub.com/rene-dev/stmbl" (at 185 146.5) (layer B.SilkS) (tstamp 5835E9D0)
(effects (font (size 1 1) (thickness 0.2)) (justify mirror))
)
(gr_text "STMBL 4.0 (HASH)\ngithub.com/rene-dev/stmbl" (at 138.75 96.25) (layer F.SilkS) (tstamp 5835E8F3)
(gr_text "STMBL 4.0 (a328fe3)\ngithub.com/rene-dev/stmbl" (at 138.75 96.25) (layer F.SilkS) (tstamp 5835E8F3)
(effects (font (size 1 1) (thickness 0.2)))
)
(gr_text "RX+\nRX-\nCK+\nTX-\nTX+\nCK-\nVCC\nGND" (at 161.25 76) (layer B.SilkS) (tstamp 5853AB0E)
@@ -14903,7 +14903,7 @@
(gr_text BOOT (at 176 111.25) (layer B.SilkS) (tstamp 58504E66)
(effects (font (size 0.8 0.8) (thickness 0.15)) (justify mirror))
)
(gr_text "STMBL 4.0 (HASH)\ngithub.com/rene-dev/stmbl" (at 150.25 91) (layer B.SilkS)
(gr_text "STMBL 4.0 (a328fe3)\ngithub.com/rene-dev/stmbl" (at 150.25 91) (layer B.SilkS)
(effects (font (size 3 3) (thickness 0.6)) (justify mirror))
)
(gr_text "V U D W" (at 175.75 127) (layer B.SilkS) (tstamp 583C3668)
@@ -15002,34 +15002,34 @@
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(gr_line (start 112 109.75) (end 112 111.25) (layer Dwgs.User) (width 0.15))
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@@ -15042,17 +15042,14 @@
(gr_line (start 111 149.75) (end 197 149.75) (layer Edge.Cuts) (width 0.15))
(gr_line (start 110 105.5) (end 110 148.75) (layer Edge.Cuts) (width 0.15))
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(segment (start 161 108.25) (end 161 105.75) (width 0.2) (layer F.Cu) (net 2))
(via (at 161 105.75) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 2))
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@@ -16501,17 +16498,18 @@
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@@ -16536,10 +16534,6 @@
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@@ -16632,9 +16626,6 @@
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@@ -17045,9 +17036,17 @@
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@@ -18207,7 +18197,6 @@
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