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Pavel Pisa
edb1a8bdcd
The previous fix has exposed more breakage if internal
SRAM self-tests is run when code starts from Flash
or external memory. The previous negated option has
disabled SRAM self-test in these cases and enabled
it for code running from SRAM which lead to code
self-clear.
But when code is running from Flash and full safety
should be achieved then then SRAM test run through
nested function
/* ESRAM Single Port PBIST */
tms570_pbist_run_and_check( 0x08300020U,
(uint32_t) PBIST_March13N_SP )
lead to situation when lr and r3 could not be
restored in return from this function.
Memory content has been overwritten by tests.
When this problem has been solved then next
problem is that memory with enabled ECC has
been unsynchronized and attempt to load already
overwritten lr and r3 in tms570_start_hook_0
has led to data-abort and fatal error with error
pin set till next power cycle.
The solution is to synchronize, reinitialize
internal SRAM after PBIST test.
Yer another problem is run of ECC failure detection
tms570_check_tcram_ecc
It fails with unrecoverable data abort as well
because for proper function it requires special
support in data-abort exception handler which
is not present on RTEMS.
Closes rtems/rtos/rtems#5547
Signed-off-by: Pavel Pisa <ppisa@pikron.com>