The imx-gpio driver used in i.MX and i.MXRT BSPs generates a name based
on a fixed string. The original code only used one digit for the
controller. With the 13 GPIO controllers of the i.MXRT1166, that isn't
enough any more. This patch extends the name to two digits which should
be enough for the next controller generations.
On most i.MX* the upper bits in SW_PAD_CTL are reserved. On some chips,
like the i.MXRT1166, they are a domain write protection. Setting them to
1 can have unexpected side effects.
The device tree uses these bits for some flags. Make sure that they are
not accidentally written to some value.
- see ARM DUI 0646C Arm Cortex-M7 Devices Generic User Guide
"The RELOAD value is calculated according to its use.
For example, to generate a multi-shot timer with a period
of N processor clock cycles, use a RELOAD value of N-1.
If the SysTick interrupt is required every 100 clock pulses,
set RELOAD to 99."
- see routines used in CMSIS project for reference
Close#4746.
Sort the .noinit* input sections by name first, then by alignment if two
sections have the same name. This allows the placement of begin/end symbols to
initialize some areas with a special value.
Update #4678.
REGION_WORK may be backed by external RAM which may not be initialized
in a time we need stack to work well. E.g. code loaded in flash,
stack allocated on in-cpu SRAM and data (REGION_WORK) on external SDRAM.
Sponsored-By: Precidata
Do not return a status code in bsp_interrupt_facility_initialize() since this
leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG
assertions in bsp_interrupt_facility_initialize() if necessary.
Add rtems_interrupt_raise_on() and rtems_interrupt_clear().
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
Skip the data cache initialization if we are a secondary processor.
The bug was introduced by e164df5e33 and
did not show up in tests using Qemu since the data cache behaviour is
not emulated.
Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.
The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.
Update #3269.
Set the Main Stack Pointer (MSP) to the ISR stack area end just in case
we run using the Process Stack Pointer (PSP). This helps if
applications are started by a boot loader.
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
Use the targets parameter to determine the targets of the SGI. Change
targets parameter type to 32-bit to ease the parameter passing. GICv3
supports up to 16 targets.
Update #4202.
Christian Mauderer
Sebastian Huber
Dariusz Sabala
Joel Sherrill
Chris Johns
Karel Gardas
Pranav Dangi
Vijay Kumar Banerjee