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Author SHA1 Message Date
Joel Sherrill 614fefecf8 dummy_printk_support.c: Comment clean up 2014-04-22 08:37:01 -05:00
Joel Sherrill a531683ae9 shsim: Add printk() support and move all code to console subdirectory 2014-04-22 08:37:01 -05:00
Sebastian Huber d60e760e80 bsps: Fix TLS support in linker command files 
The TLS section symbols had wrong values in case of an empty TLS data
section and a nonempty TLS BSS section.
 2014-04-22 09:51:17 +02:00
Sebastian Huber e2782684f2 bsp/mbx8xx: Fix Makefile.am and bsp_specs 2014-04-22 09:36:48 +02:00
Sebastian Huber e10574a4c2 bsps/powerpc: Fix linker command files 2014-04-22 08:34:46 +02:00
Sebastian Huber 3380ee8194 score: Use common names for per-CPU variables 
Use "cpu" for an arbitrary Per_CPU_Control variable.

Use "cpu_self" for the Per_CPU_Control of the current processor.

Use "cpu_index" for an arbitrary processor index.

Use "cpu_index_self" for the processor index of the current processor.

Use "cpu_count" for the processor count obtained via
_SMP_Get_processor_count().

Use "cpu_max" for the processor maximum obtained by
rtems_configuration_get_maximum_processors().
 2014-04-22 08:34:45 +02:00
Sebastian Huber f17e171687 score: Fix warning 2014-04-22 08:34:45 +02:00
Sebastian Huber 861346d18e score: Delete superfluous assignments 
These values are already zero initialized by C run-time setup.
 2014-04-22 08:34:45 +02:00
Sebastian Huber 4c23fa4b7d score: Simplify Giant lock 2014-04-22 08:34:45 +02:00
Sebastian Huber 774edf2c9b score: Use _Per_CPU_Get_snapshot() 2014-04-22 08:34:45 +02:00
Sebastian Huber fab2f1885c doc: Setting Affinity to a Single Processor 2014-04-22 08:34:45 +02:00
Ralf Kirchner d98eea06dc bsp/arm: Cleanup L2 cache handling 2014-04-17 13:25:12 +02:00
Ralf Kirchner 127634c358 bsp/arm: Correct L2 cache enable method 2014-04-17 13:25:12 +02:00
Ralf Kirchner 62fa1ea25e bsp/arm: Add cache size methods 
Add new methods which deliver the cache sizes of for supported cache levels.
 2014-04-17 13:25:12 +02:00
Ralf Kirchner 1c62f74d22 bsp/arm: Add L2 cache locking 
This level 2 cache is a shared data and instruction cache and thus needs locking.
 2014-04-17 13:25:12 +02:00
Ralf Kirchner bebcfa57a8 bsp/arm: Remove unused cache store methods 2014-04-17 13:25:12 +02:00
Ralf Kirchner db5a84d0ad bsp/arm: Correct cache misalignment handling 
Correct misalignment handling and prepare for locking.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner 92e2757b0b bsp/arm: Correct L2 cache flushing 
Correct misalignment handling and prepare for locking.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner cbd9e634ee bsp/arm: Remove arm erratum 764369 from L2 cache 
Arm erratum 764369 only applies to the level 1 cache.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner 9ee2ec56b5 bsp/arm: Consistenly same handling for flushing 
It is importeant to consistently apply the same handling for flushing within
level 2 and level 1 cache handling. In this case now both handling use clean and invalidate.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner e331e69a47 bsp/arm: RTEMS_SMP to arm erratum 764369 detection 
Move the RTEMS_SMP conditional compilation to the detection method of arm erratum 764369
 2014-04-17 13:25:11 +02:00
Ralf Kirchner 707b617294 bsp/arm: Erratum 764369 after enabling SCU 
Execute the SCU part of the workaround of arm erratum 764368 after the SCU was enabled.
 2014-04-17 13:25:11 +02:00
Ralf Kirchner d9e7d1e414 bsp/arm: Correct detection of arm erratum 764368 2014-04-17 13:25:10 +02:00
Ralf Kirchner 924b47a548 bsp/arm: Cleanup L1 cache 2014-04-17 13:25:10 +02:00
Ralf Kirchner a38d4a37bc libchip: Correct error handling in dwmac driver 
By fault an rtems_status_code has been expected instead of an errno error number.
 2014-04-17 13:24:08 +02:00
Ralf Kirchner 1613a01bb0 libchip: Reduce tx interrupts 
Reduce number of packet transmitted interrupts by using the interrupt mechanism only
if we run out of DMA descriptors.
Under normal conditions regaining DMA descriptors, mbufs and clusters is handled
via a counter.
 2014-04-17 13:24:07 +02:00
Ralf Kirchner f28b8d4595 libchip: Cleanup 2014-04-17 13:24:07 +02:00
Ralf Kirchner 18fe64a2ca libchip: Improve handling of DMA suspends 
Reset the corresponding DMA status bit
 2014-04-17 13:24:07 +02:00
Ralf Kirchner 6ac39691a2 bsp/altera-cyclone-v: Cleanup 2014-04-17 13:24:07 +02:00
Ralf Kirchner 782182eba4 bsp/altera-cyclone-v: Change console baud rate 
The baud rate of the altera cyclone-V U-Boot can not be changed at the
u-Boot console prompt. Thus we use the same baud rate as the U-Boot for
the BSP.
 2014-04-17 13:24:07 +02:00
Sebastian Huber 320faf8e68 score: Clarify TLS support 2014-04-17 08:06:40 +02:00
Sebastian Huber 10e613ba52 doc: Typo 2014-04-17 08:06:39 +02:00
Sebastian Huber f8300293ae doc: rtems_task_set_scheduler() 2014-04-17 08:06:39 +02:00
Sebastian Huber babb1a2ce8 doc: rtems_task_get_scheduler() 2014-04-17 08:06:39 +02:00
Sebastian Huber d1f2f222d2 doc: rtems_scheduler_get_processor_set() 2014-04-17 08:06:39 +02:00
Sebastian Huber 89c1a21f9c doc: rtems_scheduler_ident() 2014-04-17 08:06:38 +02:00
Sebastian Huber ed859d514a doc: rtems_task_set_affinity() 2014-04-17 08:06:38 +02:00
Sebastian Huber 2be51ccf6e doc: rtems_task_get_affinity() 2014-04-17 08:06:38 +02:00
Sebastian Huber 4a93980a14 doc: rtems_get_current_processor() 2014-04-17 08:06:38 +02:00
Sebastian Huber 6809383d76 doc: rtems_get_processor_count() 2014-04-17 08:06:38 +02:00
Sebastian Huber 0e98970264 sapi: Fix CONFIGURE_UNLIMITED_OBJECTS 
POSIX keys and key value pairs support now the unlimited option.
 2014-04-17 08:06:37 +02:00
Sebastian Huber 2c1e7ffbcb sapi: Error case for CONFIGURE_UNLIMITED_OBJECTS 2014-04-17 08:06:37 +02:00
Sebastian Huber 561c7b2cfe rtems: Add const qualifier 2014-04-16 15:36:40 +02:00
Sebastian Huber b3613c3a37 smptests/smpload01: Reduce timeout value 
Use events instead of suspend/resume.
 2014-04-16 12:34:07 +02:00
Sebastian Huber 2e06be4d4f score: Documentation 2014-04-16 09:10:52 +02:00
Sebastian Huber 33d0666d02 score: Critical fix for SMP 
The _Scheduler_SMP_Allocate_processor() and _Thread_Dispatch() exchange
information without locks.  Make sure we use the right load/store
ordering.
 2014-04-16 09:07:33 +02:00
Sebastian Huber b80f920860 bsp/qoriq: SMP support for IRQ support 2014-04-16 09:07:33 +02:00
Sebastian Huber 487b94e7ad bsps/powerpc: SMP support for SPR functions 
These registers are local to a processor, there is no need to use SMP
locks here.
 2014-04-16 09:07:33 +02:00
Sebastian Huber 598f39cd87 libchip: SMP support for NS16550 2014-04-16 09:07:33 +02:00
Sebastian Huber 509040f0af bsps/powerpc: SMP support for one TSEC driver 2014-04-15 10:43:05 +02:00