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cpukit/score/cpu/mips: Fix the frame indices

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iregdef.h gives the position of every register in the interrupt frame
and the exception frame.  R_F13 to R_F17 read 41 to 45, where the run of
the floating point registers wants 51 to 55.  R_F18 continues at 56, so
the five values alias R_F3 to R_F7.

No assembly of the tree uses them today, so nothing is broken yet.  A
save or a restore of the floating point registers through these names
would overwrite five integer slots and lose five floating point ones.

Give the five names the position which the run wants.

Update #5754.

Assisted-by: Claude:claude-opus-5 claude-code
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
This commit is contained in:
Sebastian Huber
2026-09-21 20:02:55 -05:00
committed by Kinsey Moore
parent ff6d3df84a
commit f9b2069a51
1 changed files with 5 additions and 5 deletions
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cpukit/score/cpu/mips/include/rtems/mips/iregdef.h
+5 -5
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@@ -211,11 +211,11 @@
#define R_F10 48
#define R_F11 49
#define R_F12 50
#define R_F13 41
#define R_F14 42
#define R_F15 43
#define R_F16 44
#define R_F17 45
#define R_F13 51
#define R_F14 52
#define R_F15 53
#define R_F16 54
#define R_F17 55
#define R_F18 56
#define R_F19 57
#define R_F20 58