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bsp/lpc24xx: Simplify EMC configuration
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@@ -34,6 +34,20 @@
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extern "C" {
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#endif /* __cplusplus */
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/**
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* @brief Pico seconds @a ps to clock ticks for clock frequency @a f.
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*/
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#define LPC24XX_PS_TO_CLK(ps, f) \
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(((((uint64_t) (ps)) * ((uint64_t) (f))) + 1000000000000ULL - 1ULL) \
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/ 1000000000000ULL)
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/**
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* @brief Pico seconds @a ps to EMCCLK clock ticks adjusted by @a m.
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*/
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#define LPC24XX_PS_TO_EMCCLK(ps, m) \
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(LPC24XX_PS_TO_CLK(ps, LPC24XX_EMCCLK) > (m) ? \
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LPC24XX_PS_TO_CLK(ps, LPC24XX_EMCCLK) - (m) : 0)
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typedef struct {
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uint32_t refresh;
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uint32_t readconfig;
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File diff suppressed because it is too large.
Load diff
@@ -65,7 +65,7 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
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}
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}
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#elif defined(LPC24XX_EMC_M29W320E70)
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/* Static Memory 0: M29W320E70 at 51612800Hz (tCK = 19.4ns) */
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/* Static Memory 0: M29W320E70 */
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{
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.chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0,
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.config = {
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@@ -75,27 +75,27 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
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*/
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.config = 0x81,
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/* (n + 1) clock cycles -> 38.8ns >= 30ns (tWHWL) */
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.waitwen = 1,
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/* 30ns (tWHWL) */
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.waitwen = LPC24XX_PS_TO_EMCCLK(30000, 1),
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/* (n + 1) clock cycles -> 19.4ns >= 0ns */
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.waitoen = 0,
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/* 0ns */
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.waitoen = LPC24XX_PS_TO_EMCCLK(0, 1),
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/* (n + 1) clock cycles -> 77.5ns >= 70ns (tAVQV, tELQV) */
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.waitrd = 3,
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/* 70ns (tAVQV, tELQV) */
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.waitrd = LPC24XX_PS_TO_EMCCLK(70000, 1),
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/* (n + 1) clock cycles -> 77.5ns >= 70ns (tAVQV, tELQV) */
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.waitpage = 3,
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/* 70ns (tAVQV, tELQV) */
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.waitpage = LPC24XX_PS_TO_EMCCLK(70000, 1),
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/* (n + 2) clock cycles -> 58.1ns >= 45ns (tWLWH) */
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.waitwr = 1,
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/* 45ns (tWLWH) */
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.waitwr = LPC24XX_PS_TO_EMCCLK(45000, 2),
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/* (n + 1) clock cycles -> 38.8ns >= 25ns (tEHQZ) */
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.waitrun = 1
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/* 25ns (tEHQZ) */
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.waitrun = LPC24XX_PS_TO_EMCCLK(25000, 1)
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}
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}
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#elif defined(LPC24XX_EMC_SST39VF3201)
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/* Static Memory 0: SST39VF3201 at 51612800Hz (tCK = 19.4ns) */
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/* Static Memory 0: SST39VF3201 */
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{
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.chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0,
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.config = {
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@@ -105,23 +105,23 @@ BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
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*/
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.config = 0x81,
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/* (n + 1) clock cycles -> 19.4ns >= 0ns (tCS, tAS) */
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.waitwen = 0,
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/* 0ns (tCS, tAS) */
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.waitwen = LPC24XX_PS_TO_EMCCLK(0, 1),
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/* (n + 1) clock cycles -> 19.4ns >= 0ns (tOES) */
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.waitoen = 0,
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/* 0ns (tOES) */
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.waitoen = LPC24XX_PS_TO_EMCCLK(0, 1),
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/* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */
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.waitrd = 2,
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/* 70ns (tRC) */
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.waitrd = LPC24XX_PS_TO_EMCCLK(70000, 1),
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/* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */
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.waitpage = 2,
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/* 70ns (tRC) */
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.waitpage = LPC24XX_PS_TO_EMCCLK(70000, 1),
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/* (n + 2) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */
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.waitwr = 0,
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/* 20ns (tCHZ, TOHZ) */
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.waitwr = LPC24XX_PS_TO_EMCCLK(20000, 2),
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/* (n + 1) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */
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.waitrun = 1
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/* 20ns (tCHZ, TOHZ) */
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.waitrun = LPC24XX_PS_TO_EMCCLK(20000, 1)
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}
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}
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#endif
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