mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-09-26 00:14:03 +08:00
Joel Sherrill
committed by
Joel Sherrill
Joel Sherrill
parent
f5201df0dc
commit
f6a8663ec5
+2
-7
@@ -150,9 +150,8 @@ The following persons/organizations have made contributions:
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it easier to support external interrupt controllers.
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+ Joel Sherrill <joel@OARcorp.com> for the BSPs that work with
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numerous simulators including psim, c4xsim, h8sim, armulator,
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sim68000, and simcpu32. Most of these BSPs work with instruction
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set simulators in gdb.
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numerous simulators. Many work with instruction set simulators
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in gdb.
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+ Darlene Stewart <Darlene.Stewart@nrc.ca> and Charles Gauthier
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<Charles.Gauthier@nrc.ca> of the Institute for Information Technology
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@@ -165,10 +164,6 @@ The following persons/organizations have made contributions:
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Technology for the National Research Council of Canada
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submitted the RTEMS Cache Manager.
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+ Philip Quaife <philip@qs.co.nz> of Q Solutions ported
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RTEMS to the Hitachi H8300H. This effort was sponsored by
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Comnet Technologies Ltd.
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+ Joel Sherrill <joel@OARcorp.com> and Jennifer Averett <jennifer@OARcorp.com>
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for the Texas Instruments C3x/C4x port and c4xsim BSP that works
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with the C3x/C4X instruction set simulator in gdb.
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@@ -7,9 +7,6 @@ arm:
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c4x:
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c4x-rtems COFF Requires patches
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h8300:
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h8300-rtems COFF
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i386:
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i386-rtems ELF
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@@ -8,7 +8,7 @@ AC_CACHE_CHECK([whether BSP supports networking],
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[dnl
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case "$RTEMS_CPU" in
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# do not have address space to hold BSD TCP/IP stack
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avr*|h8300*|m32c*)
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avr*|m32c*)
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rtems_cv_HAS_NETWORKING="no"
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;;
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*)
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@@ -14,7 +14,6 @@ _RTEMS_CPU_SUBDIR([arm],[$1]);;
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_RTEMS_CPU_SUBDIR([bfin],[$1]);;
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_RTEMS_CPU_SUBDIR([epiphany],[$1]);;
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_RTEMS_CPU_SUBDIR([avr],[$1]);;
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_RTEMS_CPU_SUBDIR([h8300],[$1]);;
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_RTEMS_CPU_SUBDIR([i386],[$1]);;
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_RTEMS_CPU_SUBDIR([lm32],[$1]);;
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_RTEMS_CPU_SUBDIR([m32c],[$1]);;
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@@ -1,7 +0,0 @@
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ACLOCAL_AMFLAGS = -I ../../../aclocal
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# Descend into the @RTEMS_BSP_FAMILY@ directory
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SUBDIRS = @RTEMS_BSP_FAMILY@
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include $(top_srcdir)/../../../automake/subdirs.am
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include $(top_srcdir)/../../../automake/local.am
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@@ -1,8 +0,0 @@
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# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)
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AC_DEFUN([RTEMS_CHECK_BSPDIR],
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[
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case "$1" in
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*)
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AC_MSG_ERROR([Invalid BSP]);;
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esac
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])
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@@ -1,19 +0,0 @@
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## Process this file with autoconf to produce a configure script.
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AC_PREREQ([2.69])
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AC_INIT([rtems-c-src-lib-libbsp-h8300],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
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AC_CONFIG_SRCDIR([Makefile.am])
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RTEMS_TOP(../../../../..)
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RTEMS_CANONICAL_TARGET_CPU
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AM_INIT_AUTOMAKE([no-define foreign 1.12.2])
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AM_MAINTAINER_MODE
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RTEMS_ENV_RTEMSBSP
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RTEMS_PROJECT_ROOT
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RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY])
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# Explicitly list all Makefiles here
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AC_CONFIG_FILES([Makefile])
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AC_OUTPUT
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@@ -9,7 +9,7 @@ AC_CACHE_CHECK([whether CPU supports networking],
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[dnl
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case "$host" in
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# do not have address space to hold BSD TCP/IP stack
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avr*|h8300*|m32c*)
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avr*|m32c*)
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rtems_cv_HAS_NETWORKING="no"
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;;
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*-*-rtems*)
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@@ -393,9 +393,6 @@ case $RTEMS_CPU in
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# bfin has an issue to resolve with libdl. See ticket #2252
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bfin)
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HAVE_LIBDL=no ;;
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# h8300 has an issue to resolve with libdl. See ticket #2284
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h8300)
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HAVE_LIBDL=no ;;
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# lm32 has an issue to resolve with libdl. See ticket #2283
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lm32)
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HAVE_LIBDL=no ;;
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@@ -457,7 +454,6 @@ score/cpu/arm/Makefile
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score/cpu/bfin/Makefile
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score/cpu/avr/Makefile
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score/cpu/epiphany/Makefile
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score/cpu/h8300/Makefile
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score/cpu/i386/Makefile
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score/cpu/lm32/Makefile
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score/cpu/m68k/Makefile
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@@ -62,7 +62,6 @@ static char *rcsid = "$FreeBSD: src/lib/libc/xdr/xdr_float.c,v 1.7 1999/08/28 00
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defined(_AM29K) || \
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defined(__arm__) || \
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defined(__epiphany__) || defined(__EPIPHANY__) || \
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defined(__H8300__) || defined(__h8300__) || \
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defined(__hppa__) || \
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defined(__i386__) || \
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defined(__lm32__) || \
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@@ -5,7 +5,6 @@ DIST_SUBDIRS += arm
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DIST_SUBDIRS += avr
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DIST_SUBDIRS += bfin
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DIST_SUBDIRS += epiphany
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DIST_SUBDIRS += h8300
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DIST_SUBDIRS += i386
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DIST_SUBDIRS += lm32
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DIST_SUBDIRS += m32c
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@@ -1,19 +0,0 @@
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include $(top_srcdir)/automake/compile.am
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include_rtemsdir = $(includedir)/rtems
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include_rtems_HEADERS = rtems/asm.h
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include_rtems_scoredir = $(includedir)/rtems/score
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include_rtems_score_HEADERS = rtems/score/cpu.h
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include_rtems_score_HEADERS += rtems/score/h8300.h
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include_rtems_score_HEADERS += rtems/score/types.h
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include_rtems_score_HEADERS += rtems/score/cpuatomic.h
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noinst_LIBRARIES = libscorecpu.a
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libscorecpu_a_SOURCES = cpu.c cpu_asm.S
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libscorecpu_a_SOURCES += ../no_cpu/cpucounterread.c
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libscorecpu_a_SOURCES += h8300-exception-frame-print.c
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libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
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include $(srcdir)/preinstall.am
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include $(top_srcdir)/automake/local.am
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@@ -1,27 +0,0 @@
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This port was done by Philip Quaife <philip@qs.co.nz> of Q Solutions
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using RTEMS 3.5.1 under DOS and Hiview. Philip used an H8300H
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to develop and test this port.
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It was updated to 4.5 and merged into the main development trunk
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by Joel Sherrill <joel@OARcorp.com>. As part of the merger, the
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port was made to conditionally compile for the H8, H8300H, and H8300S
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series.
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The status of each CPU subfamily is as follows.
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H8 - Although RTEMS compiles with for these CPUs, it does not
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truly support them. All code that will not work on these
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CPUs is conditionally disabled. These CPUs have a 16-bit
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address space. Thus although a port is technically
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feasible, some work will to be performed on RTEMS to
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further minimize its footprint and address pointer
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manipulation issues.
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H8H - Port was developed on this class of H8 so there should be
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no problems.
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H8S - Port should work on this class of H8 but it is untested.
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--joel
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28 June 2000
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@@ -1,134 +0,0 @@
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/**
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* @file
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*
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* @brief H8300 CPU Dependent Source
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*/
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/*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/system.h>
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#include <rtems/score/isr.h>
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#include <rtems/score/wkspace.h>
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/* _CPU_Initialize
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*
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* This routine performs processor dependent initialization.
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*
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* INPUT PARAMETERS: NONE
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*/
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void _CPU_Initialize(void)
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{
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/*
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* If there is not an easy way to initialize the FP context
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* during Context_Initialize, then it is usually easier to
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* save an "uninitialized" FP context here and copy it to
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* the task's during Context_Initialize.
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*/
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/* FP context initialization support goes here */
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}
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uint32_t _CPU_ISR_Get_level( void )
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{
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unsigned int _ccr;
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#if defined(__H8300__)
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#warning "How do we get ccr on base CPU models"
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#else
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__asm__ volatile ( "stc ccr, %0" : "=m" (_ccr) : );
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#endif
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if ( _ccr & 0x80 )
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return 1;
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return 0;
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}
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/*
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* _CPU_ISR_install_raw_handler
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*/
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void _CPU_ISR_install_raw_handler(
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uint32_t vector,
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proc_ptr new_handler,
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proc_ptr *old_handler
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)
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{
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/*
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* This is where we install the interrupt handler into the "raw" interrupt
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* table used by the CPU to dispatch interrupt handlers.
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* Use Debug level IRQ Handlers
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*/
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H8BD_Install_IRQ(vector,new_handler,old_handler);
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}
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void _CPU_ISR_install_vector(
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uint32_t vector,
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proc_ptr new_handler,
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proc_ptr *old_handler
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)
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{
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*old_handler = _ISR_Vector_table[ vector ];
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/*
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* If the interrupt vector table is a table of pointer to isr entry
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* points, then we need to install the appropriate RTEMS interrupt
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* handler for this vector number.
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*/
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_CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
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/*
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* We put the actual user ISR address in '_ISR_vector_table'. This will
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* be used by the _ISR_Handler so the user gets control.
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*/
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_ISR_Vector_table[ vector ] = new_handler;
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}
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/*
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* _CPU_Install_interrupt_stack
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*/
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void _CPU_Install_interrupt_stack( void )
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{
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}
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/*
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* _CPU_Thread_Idle_body
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*
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* NOTES:
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*
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* 1. This is the same as the regular CPU independent algorithm.
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*
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* 2. If you implement this using a "halt", "idle", or "shutdown"
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* instruction, then don't forget to put it in an infinite loop.
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*
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* 3. Be warned. Some processors with onboard DMA have been known
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* to stop the DMA if the CPU were put in IDLE mode. This might
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* also be a problem with other on-chip peripherals. So use this
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* hook with caution.
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*/
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#if 0
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void *_CPU_Thread_Idle_body( uintptr_t ignored )
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{
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for( ; ; )
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IDLE_Monitor();
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/* __asm__ (" sleep \n"); */
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/* insert your "halt" instruction here */ ;
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}
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#endif
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@@ -1,221 +0,0 @@
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/*
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* Hitachi H8 Score CPU functions
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* Copyright Comnet Technologies Ltd 1999
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*
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* Based on example code and other ports with this copyright:
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*
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* COPYRIGHT (c) 1989-1999.
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* On-Line Applications Research Corporation (OAR).
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <rtems/asm.h>
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#include <rtems/score/percpu.h>
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;.equ RUNCONTEXT_ARG, er0
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;.equ HEIRCONTEXT_ARG, er1
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/*
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* Make sure we tell the assembler what type of CPU model we are
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* being compiled for.
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*/
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#if defined(__H8300H__)
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.h8300h
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#endif
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#if defined(__H8300S__)
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.h8300s
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#endif
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#if defined(__H8300SX__)
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.h8300sx
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#endif
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.text
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.text
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/*
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GCC Compiled with optimisations and Wimplicit decs to ensure
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that stack from doesn't change
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Supposedly R2 and R3 do not need to be saved but who knows
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Arg1 = er0 (not on stack)
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Arg2 = er1 (not on stack)
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*/
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.align 2
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.global SYM(_CPU_Context_switch)
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SYM(_CPU_Context_switch):
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/* Save Context */
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#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
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stc.w ccr,@(0:16,er0)
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mov.l er7,@(2:16,er0)
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mov.l er6,@(6:16,er0)
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mov.l er5,@(10:16,er0)
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mov.l er4,@(14:16,er0)
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mov.l er3,@(18:16,er0)
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mov.l er2,@(22:16,er0)
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/* Install New context */
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restore:
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mov.l @(22:16,er1),er2
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mov.l @(18:16,er1),er3
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mov.l @(14:16,er1),er4
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mov.l @(10:16,er1),er5
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mov.l @(6:16,er1),er6
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mov.l @(2:16,er1),er7
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ldc.w @(0:16,er1),ccr
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#endif
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rts
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.align 2
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.global SYM(_CPU_Context_restore)
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SYM(_CPU_Context_restore):
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#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
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mov.l er0,er1
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jmp @restore:24
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#endif
|
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|
||||
|
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|
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/*
|
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VHandler for Vectored Interrupts
|
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|
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All IRQ's are vectored to routine _ISR_#vector_number
|
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This routine stacks er0 and loads er0 with vector number
|
||||
before transferring to here
|
||||
|
||||
*/
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.align 2
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.global SYM(_ISR_Handler)
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.extern SYM(_Vector_table)
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|
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|
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SYM(_ISR_Handler):
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#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
|
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mov.l er1,@-er7
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mov.l er2,@-er7
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mov.l er3,@-er7
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mov.l er4,@-er7
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mov.l er5,@-er7
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mov.l er6,@-er7
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/* Set IRQ Stack */
|
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orc #0xc0,ccr
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mov.l er7,er6 ; save stack pointer
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mov.l @ISR_NEST_LEVEL,er1
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bne nested
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mov.l @INTERRUPT_STACK_HIGH,er7
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|
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nested:
|
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mov.l er6,@-er7 ; save sp so pop regardless of nest level
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;; Inc system counters
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mov.l @ISR_NEST_LEVEL,er1
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inc.l #1,er1
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mov.l er1,@ISR_NEST_LEVEL
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mov.l @THREAD_DISPATCH_DISABLE_LEVEL,er1
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inc.l #1,er1
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mov.l er1,@THREAD_DISPATCH_DISABLE_LEVEL
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|
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/* Vector to ISR */
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mov er0,er2 ; copy vector
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shll.l er2
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shll.l er2 ; vector = vector * 4 (sizeof(int))
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mov.l @(SYM(_ISR_Vector_table), er2),er1
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jsr @er1 ; er0 = arg1 =vector
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orc #0xc0,ccr
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mov.l @ISR_NEST_LEVEL,er1
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dec.l #1,er1
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mov.l er1,@ISR_NEST_LEVEL
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mov.l @THREAD_DISPATCH_DISABLE_LEVEL,er1
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dec.l #1,er1
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mov.l er1,@THREAD_DISPATCH_DISABLE_LEVEL
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bne exit
|
||||
|
||||
mov.l @DISPATCH_NEEDED,er1
|
||||
beq exit ; If no then exit
|
||||
|
||||
/* Context switch here through ISR_Dispatch */
|
||||
bframe:
|
||||
orc #0xc0,ccr
|
||||
/* Pop Stack */
|
||||
mov @er7+,er6
|
||||
mov er6,er7
|
||||
|
||||
/* Set up IRQ stack frame and dispatch to _ISR_Dispatch */
|
||||
|
||||
mov.l #0xc0000000,er2 /* Disable IRQ */
|
||||
or.l #SYM(_ISR_Dispatch),er2
|
||||
mov.l er2,@-er7
|
||||
rte
|
||||
|
||||
/* Inner IRQ Return, pop flags and return */
|
||||
exit:
|
||||
/* Pop Stack */
|
||||
orc #0x80,ccr
|
||||
mov @er7+,er6
|
||||
mov er6,er7
|
||||
mov @er7+,er6
|
||||
mov @er7+,er5
|
||||
mov @er7+,er4
|
||||
mov @er7+,er3
|
||||
mov @er7+,er2
|
||||
mov @er7+,er1
|
||||
mov @er7+,er0
|
||||
#endif
|
||||
rte
|
||||
|
||||
/*
|
||||
Called from ISR_Handler as a way of ending IRQ
|
||||
but allowing dispatch to another task.
|
||||
Must use RTE as CCR is still on stack but IRQ has been serviced.
|
||||
CCR and PC occupy same word so rte can be used.
|
||||
now using task stack
|
||||
*/
|
||||
|
||||
.align 2
|
||||
.global SYM(_ISR_Dispatch)
|
||||
|
||||
SYM(_ISR_Dispatch):
|
||||
|
||||
#if defined(__H8300H__) || defined(__H8300S__) || defined(__H8300SX__)
|
||||
jsr @SYM(_Thread_Dispatch)
|
||||
mov @er7+,er6
|
||||
mov @er7+,er5
|
||||
mov @er7+,er4
|
||||
mov @er7+,er3
|
||||
mov @er7+,er2
|
||||
mov @er7+,er1
|
||||
mov @er7+,er0
|
||||
#endif
|
||||
rte
|
||||
|
||||
|
||||
.align 2
|
||||
.global SYM(_CPU_Context_save_fp)
|
||||
|
||||
SYM(_CPU_Context_save_fp):
|
||||
rts
|
||||
|
||||
|
||||
.align 2
|
||||
.global SYM(_CPU_Context_restore_fp)
|
||||
|
||||
SYM(_CPU_Context_restore_fp):
|
||||
rts
|
||||
@@ -1,24 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2012 embedded brains GmbH. All rights reserved.
|
||||
*
|
||||
* embedded brains GmbH
|
||||
* Obere Lagerstr. 30
|
||||
* 82178 Puchheim
|
||||
* Germany
|
||||
* <rtems@embedded-brains.de>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include <rtems/score/cpu.h>
|
||||
|
||||
void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
|
||||
{
|
||||
/* TODO */
|
||||
}
|
||||
@@ -1,45 +0,0 @@
|
||||
## Automatically generated by ampolish3 - Do not edit
|
||||
|
||||
if AMPOLISH3
|
||||
$(srcdir)/preinstall.am: Makefile.am
|
||||
$(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
|
||||
endif
|
||||
|
||||
PREINSTALL_DIRS =
|
||||
DISTCLEANFILES = $(PREINSTALL_DIRS)
|
||||
|
||||
all-am: $(PREINSTALL_FILES)
|
||||
|
||||
PREINSTALL_FILES =
|
||||
CLEANFILES = $(PREINSTALL_FILES)
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/$(dirstamp):
|
||||
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems
|
||||
@: > $(PROJECT_INCLUDE)/rtems/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/asm.h: rtems/asm.h $(PROJECT_INCLUDE)/rtems/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/asm.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/asm.h
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/$(dirstamp):
|
||||
@$(MKDIR_P) $(PROJECT_INCLUDE)/rtems/score
|
||||
@: > $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/cpu.h: rtems/score/cpu.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpu.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpu.h
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/h8300.h: rtems/score/h8300.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/h8300.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/h8300.h
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/types.h: rtems/score/types.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/types.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/types.h
|
||||
|
||||
$(PROJECT_INCLUDE)/rtems/score/cpuatomic.h: rtems/score/cpuatomic.h $(PROJECT_INCLUDE)/rtems/score/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/rtems/score/cpuatomic.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/rtems/score/cpuatomic.h
|
||||
|
||||
@@ -1,118 +0,0 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @brief Address the Problems Caused by Incompatible Flavor of
|
||||
* Assemblers and Toolsets
|
||||
*
|
||||
* This include file attempts to address the problems
|
||||
* caused by incompatible flavors of assemblers and
|
||||
* toolsets. It primarily addresses variations in the
|
||||
* use of leading underscores on symbols and the requirement
|
||||
* that register names be preceded by a %.
|
||||
*
|
||||
* NOTE: The spacing in the use of these macros
|
||||
* is critical to them working as advertised.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT:
|
||||
*
|
||||
* This file is based on similar code found in newlib available
|
||||
* from ftp.cygnus.com. The file which was used had no copyright
|
||||
* notice. This file is freely distributable as long as the source
|
||||
* of the file is noted. This file is:
|
||||
*
|
||||
*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_ASM_H
|
||||
#define _RTEMS_ASM_H
|
||||
|
||||
/*
|
||||
* Indicate we are in an assembly file and get the basic CPU definitions.
|
||||
*/
|
||||
|
||||
#include <rtems/score/h8300.h>
|
||||
|
||||
/*
|
||||
* Recent versions of GNU cpp define variables which indicate the
|
||||
* need for underscores and percents. If not using GNU cpp or
|
||||
* the version does not support this, then you will obviously
|
||||
* have to define these as appropriate.
|
||||
*/
|
||||
|
||||
#ifndef __USER_LABEL_PREFIX__
|
||||
#define __USER_LABEL_PREFIX__ _
|
||||
#endif
|
||||
|
||||
#ifndef __REGISTER_PREFIX__
|
||||
#define __REGISTER_PREFIX__
|
||||
#endif
|
||||
|
||||
#include <rtems/concat.h>
|
||||
|
||||
/* Use the right prefix for global labels. */
|
||||
|
||||
#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
|
||||
|
||||
/* Use the right prefix for registers. */
|
||||
|
||||
#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
|
||||
|
||||
/*
|
||||
* define macros for all of the registers on this CPU
|
||||
*
|
||||
* EXAMPLE: #define d0 REG (d0)
|
||||
*/
|
||||
#define r0 REG(r0)
|
||||
#define r1 REG(r1)
|
||||
#define r2 REG(r2)
|
||||
#define r3 REG(r3)
|
||||
#define r4 REG(r4)
|
||||
#define r5 REG(r5)
|
||||
#define r6 REG(r6)
|
||||
#define r7 REG(r7)
|
||||
|
||||
#define er0 REG(er0)
|
||||
#define er1 REG(er1)
|
||||
#define er2 REG(er2)
|
||||
#define er3 REG(er3)
|
||||
#define er4 REG(er4)
|
||||
#define er5 REG(er5)
|
||||
#define er6 REG(er6)
|
||||
#define er7 REG(er7)
|
||||
|
||||
#define sp REG(sp)
|
||||
|
||||
/*
|
||||
* Define macros to handle section beginning and ends.
|
||||
*/
|
||||
|
||||
|
||||
#define BEGIN_CODE_DCL .text
|
||||
#define END_CODE_DCL
|
||||
#define BEGIN_DATA_DCL .data
|
||||
#define END_DATA_DCL
|
||||
#define BEGIN_CODE __asm__ ( ".text
|
||||
#define END_CODE ");
|
||||
#define BEGIN_DATA
|
||||
#define END_DATA
|
||||
#define BEGIN_BSS
|
||||
#define END_BSS
|
||||
#define END
|
||||
|
||||
/*
|
||||
* Following must be tailor for a particular flavor of the C compiler.
|
||||
* They may need to put underscores in front of the symbols.
|
||||
*/
|
||||
|
||||
#define PUBLIC(sym) .globl SYM (sym)
|
||||
#define EXTERN(sym) .globl SYM (sym)
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,14 +0,0 @@
|
||||
/*
|
||||
* COPYRIGHT (c) 2012-2013 Deng Hengyi.
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_SCORE_ATOMIC_CPU_H
|
||||
#define _RTEMS_SCORE_ATOMIC_CPU_H
|
||||
|
||||
#include <rtems/score/cpustdatomic.h>
|
||||
|
||||
#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */
|
||||
@@ -1,44 +0,0 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @brief Information Required to Build RTEMS for a Particular Member
|
||||
* of the Hitachi H8/300 Family
|
||||
*
|
||||
* This file contains information pertaining to the Hitachi H8/300
|
||||
* processor family.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_SCORE_H8300_H
|
||||
#define _RTEMS_SCORE_H8300_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This file contains the information required to build
|
||||
* RTEMS for a particular member of the "h8300"
|
||||
* family when executing in protected mode. It does
|
||||
* this by setting variables to indicate which implementation
|
||||
* dependent features are present in a particular member
|
||||
* of the family.
|
||||
*/
|
||||
|
||||
#define CPU_NAME "Hitachi H8300"
|
||||
#define CPU_MODEL_NAME "h8300"
|
||||
#define H8300_HAS_FPU 0
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -1,47 +0,0 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* @brief Hitachi H8300 CPU Type Definitions
|
||||
*
|
||||
* This include file contains type definitions pertaining to the Hitachi
|
||||
* h8300 processor family.
|
||||
*/
|
||||
|
||||
/*
|
||||
* COPYRIGHT (c) 1989-1999.
|
||||
* On-Line Applications Research Corporation (OAR).
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://www.rtems.org/license/LICENSE.
|
||||
*/
|
||||
|
||||
#ifndef _RTEMS_SCORE_TYPES_H
|
||||
#define _RTEMS_SCORE_TYPES_H
|
||||
|
||||
#include <rtems/score/basedefs.h>
|
||||
|
||||
#ifndef ASM
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This section defines the basic types for this processor.
|
||||
*/
|
||||
|
||||
/** Type that can store a 32-bit integer or a pointer. */
|
||||
typedef unsigned long CPU_Uint32ptr;
|
||||
|
||||
typedef uint16_t Priority_bit_map_Word;
|
||||
typedef void h8300_isr;
|
||||
typedef void ( *h8300_isr_entry )( void );
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !ASM */
|
||||
|
||||
#endif
|
||||
@@ -16,7 +16,6 @@ GENERATED_FILES += arm.texi
|
||||
GENERATED_FILES += avr.texi
|
||||
GENERATED_FILES += bfin.texi
|
||||
GENERATED_FILES += epiphany.texi
|
||||
GENERATED_FILES += h8300.texi
|
||||
GENERATED_FILES += i386.texi
|
||||
GENERATED_FILES += lm32.texi
|
||||
GENERATED_FILES += m32c.texi
|
||||
@@ -67,11 +66,6 @@ epiphany.texi: epiphany.t
|
||||
-u "Top" \
|
||||
-n "" < $< > $@
|
||||
|
||||
h8300.texi: h8300.t
|
||||
$(BMENU2) -p "" \
|
||||
-u "Top" \
|
||||
-n "" < $< > $@
|
||||
|
||||
i386.texi: i386.t
|
||||
$(BMENU2) -p "" \
|
||||
-u "Top" \
|
||||
|
||||
@@ -66,7 +66,6 @@
|
||||
* Atmel AVR Specific Information::
|
||||
* Blackfin Specific Information::
|
||||
* Epiphany Specific Information::
|
||||
* Renesas H8/300 Specific Information::
|
||||
* Intel/AMD x86 Specific Information::
|
||||
* Lattice Mico32 Specific Information::
|
||||
* Renesas M32C Specific Information::
|
||||
@@ -90,7 +89,6 @@
|
||||
@include avr.texi
|
||||
@include bfin.texi
|
||||
@include epiphany.texi
|
||||
@include h8300.texi
|
||||
@include i386.texi
|
||||
@include lm32.texi
|
||||
@include m32c.texi
|
||||
|
||||
@@ -1,11 +0,0 @@
|
||||
@c Copyright (c) 2014 embedded brains GmbH. All rights reserved.
|
||||
|
||||
@chapter Renesas H8/300 Specific Information
|
||||
|
||||
@section Symmetric Multiprocessing
|
||||
|
||||
SMP is not supported.
|
||||
|
||||
@section Thread-Local Storage
|
||||
|
||||
Thread-local storage is not implemented.
|
||||
@@ -53,9 +53,6 @@ case $RTEMS_CPU in
|
||||
# bfin has an issue to resolve with libdl. See ticket #2252
|
||||
bfin)
|
||||
HAVE_LIBDL=no ;;
|
||||
# h8300 has an issue to resolve with libdl. See ticket #2284
|
||||
h8300)
|
||||
HAVE_LIBDL=no ;;
|
||||
# lm32 has an issue to resolve with libdl. See ticket #2283
|
||||
lm32)
|
||||
HAVE_LIBDL=no ;;
|
||||
|
||||
@@ -29,7 +29,7 @@ void *Task_3(
|
||||
unsigned int remaining;
|
||||
int status;
|
||||
int sig;
|
||||
volatile union sigval value; /* should be removed once the H8300 target is fixed */
|
||||
volatile union sigval value;
|
||||
sigset_t mask;
|
||||
siginfo_t info;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user