build: Alternative build system based on waf

Update #3818.

.gitignore

@@ -1,6 +1,13 @@
 aclocal.m4
 autom4te.cache
-configure
+/build
 config.h.in
-Makefile.in
+configure
 doc
+.lock*
+Makefile.in
+*.pyc
+/testsuites/build/bin/fake-rtems5-g++
+/testsuites/build/build
+/testsuites/build/wscript
+.waf*

bsps/arm/csb337/start/linkcmds.kit637_v6

@@ -0,0 +1,27 @@
+MEMORY {
+	SDRAM : ORIGIN = 0x20100000, LENGTH = 63M - 16k
+	SDRAM_MMU : ORIGIN = 0x23ffc000, LENGTH = 16k
+	SRAM : ORIGIN = 0x00200000, LENGTH = 16k
+}
+
+REGION_ALIAS ("REGION_START", SDRAM);
+REGION_ALIAS ("REGION_VECTOR", SRAM);
+REGION_ALIAS ("REGION_TEXT", SDRAM);
+REGION_ALIAS ("REGION_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_RODATA", SDRAM);
+REGION_ALIAS ("REGION_RODATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_DATA", SDRAM);
+REGION_ALIAS ("REGION_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT", SDRAM);
+REGION_ALIAS ("REGION_FAST_TEXT_LOAD", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA", SDRAM);
+REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM);
+REGION_ALIAS ("REGION_BSS", SDRAM);
+REGION_ALIAS ("REGION_WORK", SDRAM);
+REGION_ALIAS ("REGION_STACK", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE", SDRAM);
+REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM);
+
+_ttbl_base = ORIGIN (SDRAM_MMU);
+
+INCLUDE linkcmds.armv4

long_gcc.py

@@ -0,0 +1,45 @@
+#! /usr/bin/env python
+# encoding: utf-8
+
+"""
+def build(bld):
+	bld.load('long_gcc')
+"""
+
+import os, tempfile
+from waflib import Task
+
+def exec_command(self, cmd, **kw):
+	# workaround for command line length limit:
+	# http://support.microsoft.com/kb/830473
+	tmp = None
+	try:
+		if not isinstance(cmd, str) and len(str(cmd)) > 8192:
+			(fd, tmp) = tempfile.mkstemp(dir=self.generator.bld.bldnode.abspath())
+			flat = ['"%s"' % x.replace('\\', '\\\\').replace('"', '\\"') for x in cmd[1:]]
+			try:
+				os.write(fd, ' '.join(flat).encode())
+			finally:
+				if tmp:
+					os.close(fd)
+			# Line may be very long:
+			# Logs.debug('runner:' + ' '.join(flat))
+			cmd = [cmd[0], '@' + tmp]
+		ret = super(self.__class__, self).exec_command(cmd, **kw)
+	finally:
+		if tmp:
+			os.remove(tmp)
+	return ret
+
+def wrap_class(class_name):
+	cls = Task.classes.get(class_name)
+	if not cls:
+		return None
+	derived_class = type(class_name, (cls,), {})
+	derived_class.exec_command = exec_command
+	if hasattr(cls, 'hcode'):
+		derived_class.hcode = cls.hcode
+	return derived_class
+
+for k in 'c cxx cprogram cxxprogram cshlib cxxshlib cstlib cxxstlib'.split():
+	wrap_class(k)

make/compilers/gcc-target-default.cfg

@@ -0,0 +1,189 @@
+#
+#  Shared compiler for all GNU tools configurations
+# 
+
+##
+# CFLAGS_OPTIMIZE_V, CFLAGS_DEBUG_V are the values we
+# would want the corresponding macros to be set to.
+#
+# CFLAGS_OPTIMIZE, CFLAGS_DEBUG are set in the leaf
+# Makefiles by the 'debug:' targets to their _V values.
+#
+
+# default flags
+# XCPPFLAGS, XCFLAGS, XCXXFLAGS, XASFLAGS 
+# are used to add flags from the shell
+# cf. make.info ("Implicit rules/variables" for details)
+
+# NOTE: Should these go to CPPFLAGS ?
+CFLAGS_DEFAULT=-Wall
+
+# NOTE: CPU_CFLAGS should probably be renamed to CPU_CPPFLAGS
+# NOTE: CPU_DEFINES should probably be merged with CPU_CFLAGS
+CPPFLAGS += $(CPU_DEFINES) $(CPU_CFLAGS) $(DEFINES) $(XCPPFLAGS)
+CFLAGS   = $(CFLAGS_DEFAULT) $(XCFLAGS)
+CXXFLAGS = $(CFLAGS_DEFAULT) $(XCXXFLAGS)
+ASFLAGS  = $(CPU_ASFLAGS) $(XASFLAGS)
+
+# NOTE: GCCSPECS probably belongs to CPPFLAGS
+GCCSPECS_OPTIMIZE_V =
+GCCSPECS_DEBUG_V =
+
+GCCSPECS = -B$(PROJECT_RELEASE)/lib/ -specs bsp_specs -qrtems 
+GCCSPECS += $(GCCSPECS_$(VARIANT_V)_V)
+
+CC  += $(GCCSPECS)
+CXX += $(GCCSPECS)
+
+CPPFLAGS += 
+
+# Define this to yes if C++ is included in the development environment.
+# This requires that at least the GNU C++ compiler and libg++ be installed.
+ifeq ($(HAS_CPLUSPLUS),yes)
+CPLUS_LD_LIBS += $(PROJECT_RELEASE)/lib/librtems++$(LIBSUFFIX_VA)
+endif
+
+# debug flag;
+CFLAGS_DEBUG_V ?= -O0 -g
+CXXFLAGS_DEBUG_V ?= $(CFLAGS_DEBUG_V)
+
+# when debugging, optimize flag: typically empty
+# some compilers do allow optimization with their "-g"
+CFLAGS_OPTIMIZE_V ?= -O2 -g
+CXXFLAGS_OPTIMIZE_V ?= $(CFLAGS_OPTIMIZE_V)
+
+ifndef AUTOMAKE
+CPPFLAGS_$(VARIANT)=$(CPPFLAGS_$(VARIANT)_V)
+CFLAGS_$(VARIANT)  =$(CFLAGS_$(VARIANT)_V)
+CXXFLAGS_$(VARIANT)=$(CXXFLAGS_$(VARIANT)_V)
+endif
+
+ifndef AUTOMAKE
+CPPFLAGS += $(CPPFLAGS_OPTIMIZE) $(CPPFLAGS_DEBUG)
+CFLAGS   += $(CFLAGS_OPTIMIZE) $(CFLAGS_DEBUG)
+CXXFLAGS += $(CXXFLAGS_OPTIMIZE) $(CXXFLAGS_DEBUG)
+endif
+
+# List of library paths without -L
+LD_PATHS= $(PROJECT_RELEASE)/lib
+
+# ld flag for incomplete link
+LDFLAGS_INCOMPLETE = -r
+
+# LDFLAGS=$(LDFLAGS_DEBUG) $(LD_PATHS:%=-L%)
+LDFLAGS += $(LDFLAGS_DEBUG)
+
+#
+# Stuff to clean and clobber for the compiler and its tools
+#
+
+CLEAN_CC = a.out *.o *.BAK
+CLOBBER_CC =
+
+#
+# Client compiler and support tools
+#
+
+# CPP command to write file to standard output with warnings suppressed
+CPP=$(CC) -E -w
+
+# egrep regexp to ignore symbol table entries in ar archives.
+# Only used to make sure we skip them when coalescing libraries.
+# skip __.SYMDEF and empty names (maybe bug in ranlib??).
+AR_SYMBOL_TABLE="HIGHLY-UNLIKELY-TO-CONFLICT"
+ARFLAGS=ruv
+
+#
+# How to compile stuff into ${ARCH} subdirectory
+#
+
+${ARCH}/%.o: %.c
+	${COMPILE.c} $(AM_CPPFLAGS) $(AM_CFLAGS) -o $@ $<
+
+${ARCH}/%.o: %.cc
+	${COMPILE.cc} $(AM_CPPFLAGS) $(AM_CXXFLAGS) -o $@ $<
+
+${ARCH}/%.o: %.cpp
+	${COMPILE.cc} $(AM_CPPFLAGS) $(AM_CXXFLAGS) -o $@ $<
+
+${ARCH}/%.o: %.cxx
+	${COMPILE.cc} $(AM_CPPFLAGS) $(AM_CXXFLAGS) -o $@ $<
+
+${ARCH}/%.o: %.C
+	${COMPILE.cc} $(AM_CPPFLAGS) $(AM_CXXFLAGS) -o $@ $<
+
+${ARCH}/%.o: %.S
+	${COMPILE.S} $(AM_CPPFLAGS) -DASM -o $@ $<
+
+# Make foo.rel from foo.o
+${ARCH}/%.rel: ${ARCH}/%.o
+	${make-rel}
+
+# create $(ARCH)/pgm from pgm.sh
+${ARCH}/%: %.sh
+	$(RM) $@
+	$(CP) $< $@
+	$(CHMOD) +x $@
+
+# Dependency files for use by gmake
+# NOTE: we don't put them into $(ARCH)
+#       so that 'make clean' doesn't blow it away
+
+DEPEND=Depends-${ARCH}
+
+CLEAN_DEPEND=$(DEPEND).tmp
+CLOBBER_DEPEND=$(DEPEND)
+
+# We deliberately don't have anything depend on the
+# $(DEPEND) file; otherwise it will get rebuilt even
+# on 'make clean'
+#
+
+depend-am: $(C_FILES) $(CC_FILES) $(S_FILES)
+ifneq ($(words $(C_FILES) $(CC_FILES) $(S_FILES)), 0)
+#       Use gcc -M to generate dependencies
+#       Replace foo.o with $(ARCH)/foo.o
+#       Replace $(ARCH) value with string $(ARCH)
+#           so that it will for debug cases
+	$(COMPILE.c) $(AM_CPPFLAGS) $(AM_CFLAGS) -M   $^    |  \
+	$(SED) -e 's?^\(.*\)\.o[ ]*:?$$(ARCH)/\1.o:?' \
+	    -e 's?$(ARCH)/?$$(ARCH)/?'   >$(DEPEND).tmp
+	$(MV) $(DEPEND).tmp $(DEPEND)
+endif
+depend: depend-am
+
+# spell out all the LINK_FILE's, rather than using -lbsp, so
+#  that $(LINK_FILES) can be a dependency
+
+#
+# NOTE: a rule to link an rtems' application should look similar to this
+#       (cf. "make-exe" in make/custom/*.cfg): 
+#
+# gcc28:
+# $(PGM): $(LINK_FILES)
+#	$(CC) $(CFLAGS) -o $@ $(LINK_OBJS) $(LINK_LIBS)
+#
+
+LINK_OBJS =\
+    $(CONSTRUCTOR) \
+    $(OBJS)
+
+LINK_FILES =\
+    $(CONSTRUCTOR) \
+    $(OBJS) \
+    $(PROJECT_RELEASE)/lib/librtemsbsp$(LIBSUFFIX_VA) \
+    $(PROJECT_RELEASE)/lib/librtemscpu$(LIBSUFFIX_VA)
+
+LINK_LIBS += $(LD_LIBS)    
+
+#
+# Allow user to override link commands (to build a prom image, perhaps)
+#
+ifndef LINKCMDS
+LINKCMDS=$(PROJECT_RELEASE)/lib/linkcmds
+endif
+
+define make-rel
+	$(LINK.c) $(CFLAGS) $(AM_CFLAGS) $(AM_LDFLAGS) \
+	  -qnolinkcmds -nostdlib -Wl,-r $(XLDFLAGS) -o $@ $^
+endef

make/directory.cfg

@@ -0,0 +1,57 @@
+# make/directory.cfg
+#
+#   Make(1) configuration file include'd by all directory-level Makefile's.
+#
+#   See also make/main.cfg
+#
+
+# This is a simplified variant of automake-1.4's rule for handling 
+# subdirectories
+$(RECURSE_TARGETS):
+	@set fnord $(MAKEFLAGS); amf=$$2; \
+	dot_seen=no; \
+	target=`echo $@ | sed -e s/-recursive// -e s/debug_// `; \
+	list='$(SUBDIRS)'; for subdir in $$list; do \
+	  echo "Making $$target in $$subdir"; \
+	  local_target="$$target"; \
+	  (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+	   || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
+	done && test -z "$$fail"
+
+
+# mostlyclean-recursive maintainer-clean-recursive:
+clean-recursive \
+distclean-recursive:
+	@set fnord $(MAKEFLAGS); amf=$$2; \
+	dot_seen=no; \
+	rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \
+	  rev="$$subdir $$rev"; \
+	  test "$$subdir" = "." && dot_seen=yes; \
+	done; \
+	test "$$dot_seen" = "no" && rev=". $$rev"; \
+	target=`echo $@ | sed s/-recursive//`; \
+	for subdir in $$rev; do \
+	  echo "Making $$target in $$subdir"; \
+	  if test "$$subdir" = "."; then \
+	    local_target="$$target-am"; \
+	  else \
+	    local_target="$$target"; \
+	  fi; \
+	  (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \
+	   || case "$$amf" in *=*) exit 1;; *k*) fail=yes;; *) exit 1;; esac; \
+	done && test -z "$$fail"
+
+clean-am: clean-generic
+distclean-am: distclean-generic clean-am
+
+preinstall: preinstall-recursive
+.PHONY: preinstall preinstall-am preinstall-recursive
+
+distclean: distclean-recursive
+	-$(RM) config.status
+
+.PHONY: distclean distclean-am distclean-recursive
+
+clean: clean-recursive
+.PHONY: clean clean-am clean-recursive
+

make/host.cfg

@@ -0,0 +1,48 @@
+# OS-specific configuration 
+#
+# Derived from rtems/c/make/os/*.cfg in previous RTEMS version.
+#
+
+#
+# Stuff to clean and clobber for the OS
+#
+
+CLEAN_OS =
+CLOBBER_OS = *~ *.bak TAGS tags
+
+SHELL=sh
+ECHO=echo
+
+CAT=cat
+CP=cp
+MV=mv
+LN=ln
+MKDIR=mkdir
+CHMOD=chmod
+SED=sed
+
+# Global tools
+
+ifndef BIN2C
+BIN2C=rtems-bin2c
+endif
+
+ifndef INSTALL_CHANGE
+INSTALL_CHANGE=install
+endif
+ifndef INSTALL_VARIANT
+INSTALL_VARIANT=install
+endif
+
+# ksh (or bash) is used by some shell scripts; ref build-tools/scripts/Makefile
+#
+#  Must have shell functions.  Some ksh's core dump mysteriously and 
+#  unreliably on RTEMS shell scripts.  bash appears to be the most
+#  reliable but late model ksh's are usually OK.
+KSH=bash
+
+INSTBINFLAGS  = -m 0755
+INSTDATAFLAGS = -m 0644
+INSTLIBFLAGS  = -m 0644 
+INSTDIRFLAGS  = -m 0755 -d
+INSTINCFLAGS  = -m 0644

make/lib.cfg

@@ -0,0 +1,15 @@
+# make/lib.cfg
+#
+#   Make(1) configuration file include'd by all "library" Makefile
+#   Assumes $(LIB) is set to $(ARCH)/libfoo.a
+#
+
+include $(PROJECT_ROOT)/make/leaf.cfg
+
+define make-library
+$(RM) $@
+$(AR) $(ARFLAGS) $@ $(OBJS)
+$(RANLIB) $@
+endef
+
+.PRECIOUS: $(LIB)

spec/build/bsps/arm/altera-cyclone-v/abi.yml

@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a9
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml

@@ -0,0 +1,142 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: altcycv_devkit
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: altera-cyclone-v
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/altera-cyclone-v/include/bsp.h
+  - bsps/arm/altera-cyclone-v/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_16550_uart.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_address_space.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_cache.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_clock_group.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_clock_manager.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_dma.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_dma_common.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_dma_program.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_generalpurpose_io.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_hwlibs_ver.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_i2c.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_interrupt_common.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_mpu_registers.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_qspi_private.h
+  - bsps/arm/altera-cyclone-v/include/bsp/alt_reset_manager.h
+  - bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
+  - bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
+  - bsps/arm/altera-cyclone-v/include/bsp/irq.h
+- destination: ${BSP_INCLUDEDIR}/bsp/socal
+  source:
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_acpidmap.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_clkmgr.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_dmanonsecure.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_dmasecure.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_gpio.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_i2c.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_l3.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_qspi.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_qspidata.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_rstmgr.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_sdr.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_sysmgr.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/alt_uart.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/hps.h
+  - bsps/arm/altera-cyclone-v/include/bsp/socal/socal.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/altera-cyclone-v/start/linkcmds
+  - bsps/arm/altera-cyclone-v/start/linkcmds.altcycv
+links:
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: objsmp
+- role: build-dependency
+  uid: opta9periphclk
+- role: build-dependency
+  uid: optcachedata
+- role: build-dependency
+  uid: optcacheinst
+- role: build-dependency
+  uid: optclkfastidle
+- role: build-dependency
+  uid: optconcfg
+- role: build-dependency
+  uid: optconuart1
+- role: build-dependency
+  uid: optfdtcpyro
+- role: build-dependency
+  uid: optfdten
+- role: build-dependency
+  uid: optfdtmxsz
+- role: build-dependency
+  uid: optfdtro
+- role: build-dependency
+  uid: optfdtuboot
+- role: build-dependency
+  uid: opti2cspeed
+- role: build-dependency
+  uid: optnoi2c
+- role: build-dependency
+  uid: optresetvec
+- role: build-dependency
+  uid: optuartbaud
+- role: build-dependency
+  uid: optuartirq
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+source:
+- bsps/arm/altera-cyclone-v/console/console-config.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_16550_uart.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_address_space.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_clock_manager.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_dma.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_dma_program.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_generalpurpose_io.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_i2c.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_qspi.c
+- bsps/arm/altera-cyclone-v/contrib/hwlib/src/hwmgr/alt_reset_manager.c
+- bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.c
+- bsps/arm/altera-cyclone-v/i2c/i2cdrv.c
+- bsps/arm/altera-cyclone-v/rtc/rtc.c
+- bsps/arm/altera-cyclone-v/start/bspclean.c
+- bsps/arm/altera-cyclone-v/start/bspgetworkarea.c
+- bsps/arm/altera-cyclone-v/start/bspreset.c
+- bsps/arm/altera-cyclone-v/start/bspstart.c
+- bsps/arm/altera-cyclone-v/start/bspstarthooks.c
+- bsps/arm/altera-cyclone-v/start/mmu-config.c
+- bsps/arm/shared/cache/cache-l2c-310.c
+- bsps/arm/shared/clock/clock-a9mpcore.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/console-termios-init.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build

spec/build/bsps/arm/altera-cyclone-v/objsmp.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/altera-cyclone-v/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build

spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used
+enabled-by: true
+links: []
+name: BSP_ARM_A9MPCORE_PERIPHCLK
+type: build

spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build

spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  enable instruction cache
+enabled-by: true
+links: []
+name: BSP_INSTRUCTION_CACHE_ENABLED
+type: build

spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml

@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+  variants:
+  - arm/.*qemu
+description: |
+  This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
+enabled-by: true
+links: []
+name: CLOCK_DRIVER_USE_FAST_IDLE
+type: build

spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  configuration for console (UART 0)
+enabled-by: true
+links: []
+name: CYCLONE_V_CONFIG_CONSOLE
+type: build

spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  configuration for UART 1
+enabled-by: true
+links: []
+name: CYCLONE_V_CONFIG_UART_1
+type: build

spec/build/bsps/arm/altera-cyclone-v/optfdtcpyro.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  copy the FDT blob into the read-only load area via bsp_fdt_copy()
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA
+type: build

spec/build/bsps/arm/altera-cyclone-v/optfdten.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  define if FDT is supported
+enabled-by: true
+links: []
+name: BSP_FDT_IS_SUPPORTED
+type: build

spec/build/bsps/arm/altera-cyclone-v/optfdtmxsz.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 262144
+default-by-variant: []
+description: |
+  maximum size of the FDT blob in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_FDT_BLOB_SIZE_MAX
+type: build

spec/build/bsps/arm/altera-cyclone-v/optfdtro.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  place the FDT blob into the read-only data area
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_READ_ONLY
+type: build

spec/build/bsps/arm/altera-cyclone-v/optfdtuboot.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  copy the U-Boot provided FDT to an internal storage
+enabled-by: true
+links: []
+name: BSP_START_COPY_FDT_FROM_U_BOOT
+type: build

spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 100000
+default-by-variant: []
+description: |
+  speed for I2C0 in HZ
+enabled-by: true
+format: '{}'
+links: []
+name: CYCLONE_V_I2C0_SPEED
+type: build

spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  Number of configured I2C buses. Note that each bus has to be configured in an apropriate i2cdrv_config array.
+enabled-by: true
+links: []
+name: CYCLONE_V_NO_I2C
+type: build

spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  reset vector address for BSP start
+enabled-by: true
+links: []
+name: BSP_START_RESET_VECTOR
+type: build

spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+  baud for UARTs
+enabled-by: true
+format: '{}'
+links: []
+name: CYCLONE_V_UART_BAUD
+type: build

spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  enable usage of interrupts for the UART modules
+enabled-by: true
+links: []
+name: BSP_USE_UART_INTERRUPTS
+type: build

spec/build/bsps/arm/atsam/abi.yml

@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mthumb
+- -mcpu=cortex-m7
+- -mfpu=fpv5-d16
+- -mfloat-abi=hard
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/atsam/linkcmds.yml

@@ -0,0 +1,49 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: config-file
+content: |
+  MEMORY {
+    ITCM      : ORIGIN = 0x00000000, LENGTH = ${ATSAM_MEMORY_TCM_SIZE}
+    INTFLASH  : ORIGIN = 0x00400000, LENGTH = ${ATSAM_MEMORY_INTFLASH_SIZE}
+    DTCM      : ORIGIN = 0x20000000, LENGTH = ${ATSAM_MEMORY_TCM_SIZE}
+    INTSRAM   : ORIGIN = 0x20400000, LENGTH = ${ATSAM_MEMORY_INTSRAM_SIZE} - 2 * ${ATSAM_MEMORY_TCM_SIZE} - ${ATSAM_MEMORY_NOCACHE_SIZE}
+    NOCACHE   : ORIGIN = 0x20400000 + ${ATSAM_MEMORY_INTSRAM_SIZE} - 2 * ${ATSAM_MEMORY_TCM_SIZE} - ${ATSAM_MEMORY_NOCACHE_SIZE}, LENGTH = ${ATSAM_MEMORY_NOCACHE_SIZE}
+    SDRAM     : ORIGIN = 0x70000000, LENGTH = ${ATSAM_MEMORY_SDRAM_SIZE}
+    QSPIFLASH  : ORIGIN = 0x80000000, LENGTH = ${ATSAM_MEMORY_QSPIFLASH_SIZE}
+  }
+
+  /* Must be used only for MPU definitions */
+
+  atsam_memory_itcm_begin = ORIGIN (ITCM);
+  atsam_memory_itcm_end = ORIGIN (ITCM) + LENGTH (ITCM);
+  atsam_memory_itcm_size = LENGTH (ITCM);
+
+  atsam_memory_intflash_begin = ORIGIN (INTFLASH);
+  atsam_memory_intflash_end = ORIGIN (INTFLASH) + LENGTH (INTFLASH);
+  atsam_memory_intflash_size = LENGTH (INTFLASH);
+
+  atsam_memory_dtcm_begin = ORIGIN (DTCM);
+  atsam_memory_dtcm_end = ORIGIN (DTCM) + LENGTH (DTCM);
+  atsam_memory_dtcm_size = LENGTH (DTCM);
+
+  atsam_memory_intsram_begin = ORIGIN (INTSRAM);
+  atsam_memory_intsram_end = ORIGIN (INTSRAM) + LENGTH (INTSRAM);
+  atsam_memory_intsram_size = LENGTH (INTSRAM);
+
+  atsam_memory_nocache_begin = ORIGIN (NOCACHE);
+  atsam_memory_nocache_end = ORIGIN (NOCACHE) + LENGTH (NOCACHE);
+  atsam_memory_nocache_size = LENGTH (NOCACHE);
+
+  atsam_memory_sdram_begin = ORIGIN (SDRAM);
+  atsam_memory_sdram_end = ORIGIN (SDRAM) + LENGTH (SDRAM);
+  atsam_memory_sdram_size = LENGTH (SDRAM);
+
+  atsam_memory_qspiflash_begin = ORIGIN (QSPIFLASH);
+  atsam_memory_qspiflash_end = ORIGIN (QSPIFLASH) + LENGTH (QSPIFLASH);
+  atsam_memory_qspiflash_size = LENGTH (QSPIFLASH);
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+install-path: ${BSP_LIBDIR}
+links: []
+target: linkcmds.memory
+type: build

spec/build/bsps/arm/atsam/objnet.yml

@@ -0,0 +1,22 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- bsps/arm/atsam/contrib/libraries/libboard
+- bsps/arm/atsam/contrib/libraries/libboard/include
+- bsps/arm/atsam/contrib/libraries/libchip
+- bsps/arm/atsam/contrib/libraries/libchip/include
+- bsps/arm/atsam/include/libchip
+- bsps/arm/atsam/include/libchip/include
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/atsam/net/if_atsam.c
+type: build

spec/build/bsps/arm/atsam/optchgclksram.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  Move the functions that set up the clock into the SRAM.  This allows to change the clock frequency even if the application is started from SDRAM.  Requires a TCM_SIZE > 0.
+enabled-by: true
+links: []
+name: ATSAM_CHANGE_CLOCK_FROM_SRAM
+type: build

spec/build/bsps/arm/atsam/optchip.yml

@@ -0,0 +1,54 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- script: |
+    c = ("__SAMV71Q21__", 0x00200000, 0x00060000)
+    chips = {
+        "same70j19": ("__SAME70J19__", 0x00080000, 0x00040000),
+        "same70j20": ("__SAME70J20__", 0x00100000, 0x00060000),
+        "same70j21": ("__SAME70J21__", 0x00200000, 0x00060000),
+        "same70n19": ("__SAME70N19__", 0x00080000, 0x00040000),
+        "same70n20": ("__SAME70N20__", 0x00100000, 0x00060000),
+        "same70n21": ("__SAME70N21__", 0x00200000, 0x00060000),
+        "same70q19": ("__SAME70Q19__", 0x00080000, 0x00040000),
+        "same70q20": ("__SAME70Q20__", 0x00100000, 0x00060000),
+        "same70q21": ("__SAME70Q21__", 0x00200000, 0x00060000),
+        "sams70j19": ("__SAMS70J19__", 0x00080000, 0x00040000),
+        "sams70j20": ("__SAMS70J20__", 0x00100000, 0x00060000),
+        "sams70j21": ("__SAMS70J21__", 0x00200000, 0x00060000),
+        "sams70n19": ("__SAMS70N19__", 0x00080000, 0x00040000),
+        "sams70n20": ("__SAMS70N20__", 0x00100000, 0x00060000),
+        "sams70n21": ("__SAMS70N21__", 0x00200000, 0x00060000),
+        "sams70q19": ("__SAMS70Q19__", 0x00080000, 0x00040000),
+        "sams70q20": ("__SAMS70Q20__", 0x00100000, 0x00060000),
+        "sams70q21": ("__SAMS70Q21__", 0x00200000, 0x00060000),
+        "samv71j19": ("__SAMV71J19__", 0x00080000, 0x00040000),
+        "samv71j20": ("__SAMV71J20__", 0x00100000, 0x00060000),
+        "samv71j21": ("__SAMV71J21__", 0x00200000, 0x00060000),
+        "samv71n19": ("__SAMV71N19__", 0x00080000, 0x00040000),
+        "samv71n20": ("__SAMV71N20__", 0x00100000, 0x00060000),
+        "samv71n21": ("__SAMV71N21__", 0x00200000, 0x00060000),
+        "samv71q19": ("__SAMV71Q19__", 0x00080000, 0x00040000),
+        "samv71q20": ("__SAMV71Q20__", 0x00100000, 0x00060000),
+        "samv71q21": c,
+    }
+    if value:
+        try:
+            c = chips[value]
+        except:
+            conf.fatal("Unkown chip variant '{}'".format(value))
+    conf.define_cond(c[0], True)
+    conf.env["ATSAM_MEMORY_INTFLASH_SIZE"] = c[1]
+    conf.env["ATSAM_MEMORY_INTSRAM_SIZE"] = c[2]
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: samv71q21
+default-by-variant: []
+description: |
+  Chip variant
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_CHIP
+type: build

spec/build/bsps/arm/atsam/optconbaud.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+  initial baud for console devices (default 115200)
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_CONSOLE_BAUD
+type: build

spec/build/bsps/arm/atsam/optconidx.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  device index for /dev/console (default 1, e.g. USART1)
+enabled-by: true
+links: []
+name: ATSAM_CONSOLE_DEVICE_INDEX
+type: build

spec/build/bsps/arm/atsam/optconirq.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  use interrupt driven mode for console devices (used by default)
+enabled-by: true
+links: []
+name: ATSAM_CONSOLE_USE_INTERRUPTS
+type: build

spec/build/bsps/arm/atsam/optcontype.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  device type for /dev/console, use 0 for USART and 1 for UART (default USART)
+enabled-by: true
+links: []
+name: ATSAM_CONSOLE_DEVICE_TYPE
+type: build

spec/build/bsps/arm/atsam/optmck.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 123000000
+default-by-variant: []
+description: |
+  Frequency of the MCK in Hz. Set to 0 to force application defined speed.  See start/pmc-config.c for available clock configurations.
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_MCK
+type: build

spec/build/bsps/arm/atsam/optnocachesz.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 4096
+default-by-variant: []
+description: |
+  size of NOCACHE section in bytes
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ATSAM_MEMORY_NOCACHE_SIZE
+type: build

spec/build/bsps/arm/atsam/optoscmain.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 12000000
+default-by-variant: []
+description: |
+  Main oscillator frequency in Hz (default 12MHz)
+enabled-by: true
+format: '{}'
+links: []
+name: BOARD_MAINOSC
+type: build

spec/build/bsps/arm/atsam/optqspiflashsz.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 2097152
+default-by-variant: []
+description: |
+  size of QSPI flash in bytes
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ATSAM_MEMORY_QSPIFLASH_SIZE
+type: build

spec/build/bsps/arm/atsam/optsdram.yml

@@ -0,0 +1,29 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- script: |
+    s = ("ATSAM_SDRAM_IS42S16100E_7BLI", 0x00200000)
+    sdram = {
+         "is42s16100e-7bli": s,
+         "is42s16320f-7bl": ("ATSAM_SDRAM_IS42S16320F_7BL", 0x04000000),
+         "mt48lc16m16a2p-6a": ("ATSAM_SDRAM_MT48LC16M16A2P_6A", 0x02000000),
+    }
+    if value:
+        try:
+            s = sdram[value]
+        except:
+            conf.fatal("Unkown SDRAM variant '{}'".format(value))
+    conf.define_cond(s[0], True)
+    conf.env["ATSAM_MEMORY_SDRAM_SIZE"] = s[1]
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: is42s16100e-7bli
+default-by-variant: []
+description: |
+  SDRAM variant
+enabled-by: true
+format: '{}'
+links: []
+name: ATSAM_SDRAM
+type: build

spec/build/bsps/arm/atsam/opttcmsz.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- format-and-define: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 0
+default-by-variant: []
+description: |
+  size of tightly coupled memories (TCM) in bytes
+enabled-by: true
+format: '{:#010x}'
+links: []
+name: ATSAM_MEMORY_TCM_SIZE
+type: build

spec/build/bsps/arm/atsam/optusextal.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin.
+enabled-by: true
+links: []
+name: ATSAM_SLOWCLOCK_USE_XTAL
+type: build

spec/build/bsps/arm/atsam/tstatsamv.yml

@@ -0,0 +1,35 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+    fileio: exclude
+    flashdisk01: exclude
+    fsdosfsname01: exclude
+    ftp01: exclude
+    jffs2fserror: exclude
+    jffs2fslink: exclude
+    jffs2fspatheval: exclude
+    jffs2fspermission: exclude
+    jffs2fsrdwr: exclude
+    jffs2fsscandir01: exclude
+    jffs2fssymlink: exclude
+    jffs2fstime: exclude
+    linpack: exclude
+    mghttpd01: exclude
+    pppd: exclude
+    psxconfig01: exclude
+    record02: exclude
+    sp16: exclude
+    sp25: exclude
+    sp48: exclude
+    spregionerr01: exclude
+    spstkalloc02: exclude
+    tmfine01: exclude
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links: []
+type: build

spec/build/bsps/arm/beagle/abi.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=cortex-a8
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/beagle/bspboardorig.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beagleboardorig
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/beagle/bspboardxm.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beagleboardxm
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/beagle/bspboneblack.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beagleboneblack
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/beagle/bspbonewhite.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: beaglebonewhite
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: beagle
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/beagle/grp.yml

@@ -0,0 +1,44 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: obj
+- role: build-dependency
+  uid: optam335x
+- role: build-dependency
+  uid: optconbaud
+- role: build-dependency
+  uid: optconpoll
+- role: build-dependency
+  uid: optdebug
+- role: build-dependency
+  uid: optdm3730
+- role: build-dependency
+  uid: optfdtcpyro
+- role: build-dependency
+  uid: optfdtmxsz
+- role: build-dependency
+  uid: optfdtro
+- role: build-dependency
+  uid: optfdtuboot
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../bspopts
+type: build
+use-after: []
+use-before: []

spec/build/bsps/arm/beagle/obj.yml

@@ -0,0 +1,61 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/beagle/include/bsp.h
+  - bsps/arm/beagle/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/beagle/include/bsp/bbb-gpio.h
+  - bsps/arm/beagle/include/bsp/bbb-pwm.h
+  - bsps/arm/beagle/include/bsp/beagleboneblack.h
+  - bsps/arm/beagle/include/bsp/i2c.h
+  - bsps/arm/beagle/include/bsp/irq.h
+  - bsps/arm/beagle/include/bsp/spi.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/beagle/start/linkcmds
+links: []
+source:
+- bsps/arm/beagle/clock/clock.c
+- bsps/arm/beagle/console/console-config.c
+- bsps/arm/beagle/gpio/bbb-gpio.c
+- bsps/arm/beagle/i2c/bbb-i2c.c
+- bsps/arm/beagle/irq/irq.c
+- bsps/arm/beagle/pwm/pwm.c
+- bsps/arm/beagle/rtc/rtc.c
+- bsps/arm/beagle/spi/spi.c
+- bsps/arm/beagle/start/bspdebug.c
+- bsps/arm/beagle/start/bspreset.c
+- bsps/arm/beagle/start/bspstart.c
+- bsps/arm/beagle/start/bspstarthooks.c
+- bsps/arm/beagle/start/bspstartmmu.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/gpio/gpio-support.c
+- bsps/shared/dev/rtc/rtc-support.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build

spec/build/bsps/arm/beagle/optam335x.yml

@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+  variants:
+  - arm/beaglebone.*
+description: |
+  true if SOC is AM335X
+enabled-by: true
+links: []
+name: IS_AM335X
+type: build

spec/build/bsps/arm/beagle/optconbaud.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 115200
+default-by-variant: []
+description: |
+  initial baud for console UART
+enabled-by: true
+format: '{}'
+links: []
+name: CONSOLE_BAUD
+type: build

spec/build/bsps/arm/beagle/optconpoll.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  polled console i/o (e.g. to run testsuite)
+enabled-by: true
+links: []
+name: CONSOLE_POLLED
+type: build

spec/build/bsps/arm/beagle/optdebug.yml

@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+  variants:
+  - arm/beaglebone.*
+description: |
+  Enable BBB debug
+enabled-by: true
+links: []
+name: BBB_DEBUG
+type: build

spec/build/bsps/arm/beagle/optdm3730.yml

@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+  variants:
+  - arm/beagleboard.*
+description: |
+  true if SOC is DM3730
+enabled-by: true
+links: []
+name: IS_DM3730
+type: build

spec/build/bsps/arm/beagle/optfdtcpyro.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  copy the FDT blob into the read-only load area via bsp_fdt_copy()
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_COPY_TO_READ_ONLY_LOAD_AREA
+type: build

spec/build/bsps/arm/beagle/optfdtmxsz.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 262144
+default-by-variant: []
+description: |
+  maximum size of the FDT blob in bytes
+enabled-by: true
+format: '{}'
+links: []
+name: BSP_FDT_BLOB_SIZE_MAX
+type: build

spec/build/bsps/arm/beagle/optfdtro.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  place the FDT blob into the read-only data area
+enabled-by: true
+links: []
+name: BSP_FDT_BLOB_READ_ONLY
+type: build

spec/build/bsps/arm/beagle/optfdtuboot.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  copy the U-Boot provided FDT to an internal storage
+enabled-by: true
+links: []
+name: BSP_START_COPY_FDT_FROM_U_BOOT
+type: build

spec/build/bsps/arm/csb336/abi.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm920
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/csb336/bspcsb336.yml

@@ -0,0 +1,59 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: csb336
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb336
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/csb336/include/bsp.h
+  - bsps/arm/csb336/include/mc9328mxl.h
+  - bsps/arm/csb336/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/csb336/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/csb336/start/linkcmds
+  - bsps/arm/csb336/start/linkcmds
+links:
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: objnet
+- role: build-dependency
+  uid: start
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+source:
+- bsps/arm/csb336/btimer/btimer.c
+- bsps/arm/csb336/clock/clockdrv.c
+- bsps/arm/csb336/console/uart.c
+- bsps/arm/csb336/irq/irq.c
+- bsps/arm/csb336/start/bspstart.c
+- bsps/arm/csb336/start/memmap.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/bspreset-empty.c
+- bsps/shared/start/sbrk.c
+type: build

spec/build/bsps/arm/csb336/objnet.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/csb336/net/lan91c11x.c
+- bsps/arm/csb336/net/network.c
+type: build

spec/build/bsps/arm/csb336/start.yml

@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/csb336/start/start.S
+target: start.o
+type: build

spec/build/bsps/arm/csb337/abi.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm920
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/csb337/bspcsb337.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: csb337
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb337
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/csb337/bspcsb637.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: csb637
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb337
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/csb337/bspkit637v6.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: kit637_v6
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: csb337
+includes: []
+install: []
+links:
+- role: build-dependency
+  uid: grp
+- role: build-dependency
+  uid: ../../opto2
+source: []
+type: build

spec/build/bsps/arm/csb337/grp.yml

@@ -0,0 +1,52 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install: []
+ldflags: []
+links:
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: obj
+- role: build-dependency
+  uid: objlcd
+- role: build-dependency
+  uid: objnet
+- role: build-dependency
+  uid: objumon
+- role: build-dependency
+  uid: objumoncon
+- role: build-dependency
+  uid: optcsb637
+- role: build-dependency
+  uid: optenlcd
+- role: build-dependency
+  uid: optenumon
+- role: build-dependency
+  uid: optenumoncon
+- role: build-dependency
+  uid: optenusart0
+- role: build-dependency
+  uid: optenusart1
+- role: build-dependency
+  uid: optenusart2
+- role: build-dependency
+  uid: optenusart3
+- role: build-dependency
+  uid: start
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../../linkcmds
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../bspopts
+type: build
+use-after: []
+use-before: []

spec/build/bsps/arm/csb337/obj.yml

@@ -0,0 +1,57 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/csb337/include/at91rm9200.h
+  - bsps/arm/csb337/include/at91rm9200_dbgu.h
+  - bsps/arm/csb337/include/at91rm9200_emac.h
+  - bsps/arm/csb337/include/at91rm9200_gpio.h
+  - bsps/arm/csb337/include/at91rm9200_mem.h
+  - bsps/arm/csb337/include/at91rm9200_pmc.h
+  - bsps/arm/csb337/include/at91rm9200_usart.h
+  - bsps/arm/csb337/include/bits.h
+  - bsps/arm/csb337/include/bsp.h
+  - bsps/arm/csb337/include/font8x16.h
+  - bsps/arm/csb337/include/sed1356.h
+  - bsps/arm/csb337/include/sed1356_16bit.h
+  - bsps/arm/csb337/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/csb337/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/csb337/start/linkcmds.csb337
+  - bsps/arm/csb337/start/linkcmds.csb637
+links: []
+source:
+- bsps/arm/csb337/btimer/btimer.c
+- bsps/arm/csb337/clock/clock.c
+- bsps/arm/csb337/console/dbgu.c
+- bsps/arm/csb337/console/uarts.c
+- bsps/arm/csb337/console/usart.c
+- bsps/arm/csb337/irq/irq.c
+- bsps/arm/csb337/start/bspreset.c
+- bsps/arm/csb337/start/bspstart.c
+- bsps/arm/csb337/start/memmap.c
+- bsps/arm/csb337/start/pmc.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build

spec/build/bsps/arm/csb337/objlcd.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- ENABLE_LCD
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/csb337/console/fbcons.c
+- bsps/arm/csb337/console/sed1356.c
+type: build

spec/build/bsps/arm/csb337/objnet.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/csb337/net/network.c
+type: build

spec/build/bsps/arm/csb337/objumon.yml

@@ -0,0 +1,26 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- ENABLE_UMON
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}/rtems
+  source:
+  - bsps/include/rtems/umon.h
+- destination: ${BSP_INCLUDEDIR}/umon
+  source:
+  - bsps/include/umon/cli.h
+  - bsps/include/umon/monlib.h
+  - bsps/include/umon/tfs.h
+links: []
+source:
+- bsps/arm/csb337/start/umonsupp.c
+- bsps/arm/csb337/umon/monlib.c
+- bsps/arm/csb337/umon/tfsDriver.c
+- bsps/arm/csb337/umon/umonrtemsglue.c
+type: build

spec/build/bsps/arm/csb337/objumoncon.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- ENABLE_UMON_CONSOLE
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/csb337/umon/umoncons.c
+type: build

spec/build/bsps/arm/csb337/optcsb637.yml

@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: true
+  variants:
+  - arm/kit637_v6
+- value: true
+  variants:
+  - arm/csb637
+description: |
+  If defined, this indicates that the BSP is being built for the csb637 variant.
+enabled-by: true
+links: []
+name: csb637
+type: build

spec/build/bsps/arm/csb337/optenlcd.yml

@@ -0,0 +1,19 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant:
+- value: false
+  variants:
+  - arm/kit637_v6
+description: |
+  If defined, enable use of the SED1356 controller and LCD.
+enabled-by: true
+links: []
+name: ENABLE_LCD
+type: build

spec/build/bsps/arm/csb337/optenumon.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  If defined, enable use of the uMon console.
+enabled-by: true
+links: []
+name: ENABLE_UMON
+type: build

spec/build/bsps/arm/csb337/optenumoncon.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+- env-enable: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  If defined, enable use of the MicroMonitor console device.
+enabled-by: true
+links: []
+name: ENABLE_UMON_CONSOLE
+type: build

spec/build/bsps/arm/csb337/optenusart0.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  If defined, enable use of the USART 0.
+enabled-by: true
+links: []
+name: ENABLE_USART0
+type: build

spec/build/bsps/arm/csb337/optenusart1.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  If defined, enable use of the USART 1.
+enabled-by: true
+links: []
+name: ENABLE_USART1
+type: build

spec/build/bsps/arm/csb337/optenusart2.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  If defined, enable use of the USART 2.
+enabled-by: true
+links: []
+name: ENABLE_USART2
+type: build

spec/build/bsps/arm/csb337/optenusart3.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant: []
+description: |
+  If defined, enable use of the USART 3.
+enabled-by: true
+links: []
+name: ENABLE_USART3
+type: build

spec/build/bsps/arm/csb337/start.yml

@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/csb337/start/start.S
+target: start.o
+type: build

spec/build/bsps/arm/edb7312/abi.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=arm7tdmi
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/edb7312/bspedb7312.yml

@@ -0,0 +1,62 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: edb7312
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: edb7312
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/edb7312/include/bsp.h
+  - bsps/arm/edb7312/include/ep7312.h
+  - bsps/arm/edb7312/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/edb7312/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/edb7312/start/linkcmds
+links:
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: objnet
+- role: build-dependency
+  uid: optskyeye
+- role: build-dependency
+  uid: start
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+source:
+- bsps/arm/edb7312/btimer/btimer.c
+- bsps/arm/edb7312/clock/clockdrv.c
+- bsps/arm/edb7312/console/uart.c
+- bsps/arm/edb7312/irq/bsp_irq_asm.S
+- bsps/arm/edb7312/irq/irq.c
+- bsps/arm/edb7312/start/bspreset.c
+- bsps/arm/edb7312/start/bspstart.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build

spec/build/bsps/arm/edb7312/objnet.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/edb7312/net/network.c
+type: build

spec/build/bsps/arm/edb7312/optskyeye.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  If defined, enable options which optimize executingon the Skyeye simulator.  Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized.  This significantly reduces the wall time required to execute the RTEMS test suites.
+enabled-by: true
+links: []
+name: ON_SKYEYE
+type: build

spec/build/bsps/arm/edb7312/start.yml

@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/edb7312/start/start.S
+target: start.o
+type: build

spec/build/bsps/arm/grp.yml

@@ -0,0 +1,62 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: group
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+enabled-by: true
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/include/cmsis_gcc.h
+  - bsps/arm/include/core_cm7.h
+  - bsps/arm/include/core_cmFunc.h
+  - bsps/arm/include/core_cmInstr.h
+  - bsps/arm/include/core_cmSimd.h
+  - bsps/arm/include/uart.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/include/bsp/arm-a8core-start.h
+  - bsps/arm/include/bsp/arm-a9mpcore-clock.h
+  - bsps/arm/include/bsp/arm-a9mpcore-irq.h
+  - bsps/arm/include/bsp/arm-a9mpcore-regs.h
+  - bsps/arm/include/bsp/arm-a9mpcore-start.h
+  - bsps/arm/include/bsp/arm-cp15-start.h
+  - bsps/arm/include/bsp/arm-errata.h
+  - bsps/arm/include/bsp/arm-gic-irq.h
+  - bsps/arm/include/bsp/arm-gic-regs.h
+  - bsps/arm/include/bsp/arm-gic-tm27.h
+  - bsps/arm/include/bsp/arm-gic.h
+  - bsps/arm/include/bsp/arm-pl011-regs.h
+  - bsps/arm/include/bsp/arm-pl011.h
+  - bsps/arm/include/bsp/arm-pl050-regs.h
+  - bsps/arm/include/bsp/arm-pl050.h
+  - bsps/arm/include/bsp/arm-pl111-fb.h
+  - bsps/arm/include/bsp/arm-pl111-regs.h
+  - bsps/arm/include/bsp/arm-release-id.h
+  - bsps/arm/include/bsp/armv7m-irq.h
+  - bsps/arm/include/bsp/clock-armv7m.h
+  - bsps/arm/include/bsp/linker-symbols.h
+  - bsps/arm/include/bsp/lpc-dma.h
+  - bsps/arm/include/bsp/lpc-emc.h
+  - bsps/arm/include/bsp/lpc-i2s.h
+  - bsps/arm/include/bsp/lpc-lcd.h
+  - bsps/arm/include/bsp/lpc-timer.h
+  - bsps/arm/include/bsp/start.h
+  - bsps/arm/include/bsp/zynq-uart-regs.h
+  - bsps/arm/include/bsp/zynq-uart.h
+- destination: ${BSP_INCLUDEDIR}/libcpu
+  source:
+  - bsps/arm/include/libcpu/am335x.h
+  - bsps/arm/include/libcpu/mmu.h
+  - bsps/arm/include/libcpu/omap3.h
+  - bsps/arm/include/libcpu/omap_timer.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/shared/start/linkcmds.armv4
+  - bsps/arm/shared/start/linkcmds.armv7m
+  - bsps/arm/shared/start/linkcmds.base
+ldflags: []
+links: []
+type: build
+use-after: []
+use-before: []

spec/build/bsps/arm/gumstix/abi.yml

@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -mcpu=xscale
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/gumstix/bspgumstix.yml

@@ -0,0 +1,66 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: gumstix
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: gumstix
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/gumstix/include/bsp.h
+  - bsps/arm/gumstix/include/ffuart.h
+  - bsps/arm/gumstix/include/pxa255.h
+  - bsps/arm/gumstix/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/gumstix/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/gumstix/start/linkcmds
+links:
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: objnet
+- role: build-dependency
+  uid: optskyeye
+- role: build-dependency
+  uid: start
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+source:
+- bsps/arm/gumstix/btimer/btimer.c
+- bsps/arm/gumstix/clock/clock.c
+- bsps/arm/gumstix/console/ffuart.c
+- bsps/arm/gumstix/console/uarts.c
+- bsps/arm/gumstix/fb/fb.c
+- bsps/arm/gumstix/irq/irq.c
+- bsps/arm/gumstix/start/bspreset.c
+- bsps/arm/gumstix/start/bspstart.c
+- bsps/arm/gumstix/start/memmap.c
+- bsps/arm/shared/cp15/arm920-mmu.c
+- bsps/shared/cache/nocache.c
+- bsps/shared/dev/cpucounter/cpucounterfrequency.c
+- bsps/shared/dev/cpucounter/cpucounterread.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/legacy-console-control.c
+- bsps/shared/dev/serial/legacy-console-select.c
+- bsps/shared/dev/serial/legacy-console.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/bspgetworkarea-default.c
+- bsps/shared/start/sbrk.c
+type: build

spec/build/bsps/arm/gumstix/objnet.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_NETWORKING
+includes:
+- cpukit/libnetworking
+install: []
+links: []
+source:
+- bsps/arm/gumstix/net/rtl8019.c
+type: build

spec/build/bsps/arm/gumstix/optskyeye.yml

@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  If defined, enable options which optimize executingon the Skyeye simulator.  Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized.  This significantly reduces the wall time required to execute the RTEMS test suites.
+enabled-by: true
+links: []
+name: ON_SKYEYE
+type: build

spec/build/bsps/arm/gumstix/start.yml

@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+asflags: []
+build-type: start-file
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+includes: []
+install-path: ${BSP_LIBDIR}
+links: []
+source:
+- bsps/arm/gumstix/start/start.S
+target: start.o
+type: build

spec/build/bsps/arm/imx/abi.yml

@@ -0,0 +1,21 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-append: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -march=armv7-a
+- -mthumb
+- -mfpu=neon
+- -mfloat-abi=hard
+- -mtune=cortex-a7
+default-by-variant: []
+description: |
+  ABI flags
+enabled-by: true
+links: []
+name: ABI_FLAGS
+type: build

spec/build/bsps/arm/imx/bspimx.yml

@@ -0,0 +1,104 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+arch: arm
+bsp: imx7
+build-type: bsp
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+enabled-by: true
+family: imx
+includes: []
+install:
+- destination: ${BSP_INCLUDEDIR}
+  source:
+  - bsps/arm/imx/include/bsp.h
+  - bsps/arm/imx/include/tm27.h
+- destination: ${BSP_INCLUDEDIR}/arm/freescale/imx
+  source:
+  - bsps/arm/imx/include/arm/freescale/imx/imx_ccmvar.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_ecspireg.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_gpcreg.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_i2creg.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_iomuxreg.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_iomuxvar.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_srcreg.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_uartreg.h
+  - bsps/arm/imx/include/arm/freescale/imx/imx_wdogreg.h
+- destination: ${BSP_INCLUDEDIR}/bsp
+  source:
+  - bsps/arm/imx/include/bsp/imx-gpio.h
+  - bsps/arm/imx/include/bsp/irq.h
+- destination: ${BSP_LIBDIR}
+  source:
+  - bsps/arm/imx/start/linkcmds
+  - bsps/arm/imx/start/linkcmds
+links:
+- role: build-dependency
+  uid: ../grp
+- role: build-dependency
+  uid: abi
+- role: build-dependency
+  uid: objsmp
+- role: build-dependency
+  uid: optcachedata
+- role: build-dependency
+  uid: optcacheinst
+- role: build-dependency
+  uid: optccmahb
+- role: build-dependency
+  uid: optcmmecspi
+- role: build-dependency
+  uid: optcmmipg
+- role: build-dependency
+  uid: optcmmsdhci
+- role: build-dependency
+  uid: optcmmuart
+- role: build-dependency
+  uid: optconirq
+- role: build-dependency
+  uid: optfdtcpyro
+- role: build-dependency
+  uid: optfdtmxsz
+- role: build-dependency
+  uid: optfdtro
+- role: build-dependency
+  uid: optfdtuboot
+- role: build-dependency
+  uid: optresetvec
+- role: build-dependency
+  uid: ../start
+- role: build-dependency
+  uid: ../../obj
+- role: build-dependency
+  uid: ../../objirq
+- role: build-dependency
+  uid: ../../opto2
+- role: build-dependency
+  uid: ../../bspopts
+source:
+- bsps/arm/imx/console/console-config.c
+- bsps/arm/imx/gpio/imx-gpio.c
+- bsps/arm/imx/i2c/imx-i2c.c
+- bsps/arm/imx/spi/imx-ecspi.c
+- bsps/arm/imx/start/bspreset.c
+- bsps/arm/imx/start/bspstart.c
+- bsps/arm/imx/start/bspstarthooks.c
+- bsps/arm/imx/start/ccm.c
+- bsps/arm/imx/start/imx_iomux.c
+- bsps/arm/shared/cache/cache-cp15.c
+- bsps/arm/shared/cache/cache-v7ar-disable-data.S
+- bsps/arm/shared/clock/clock-generic-timer.c
+- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
+- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
+- bsps/arm/shared/irq/irq-gic.c
+- bsps/arm/shared/start/bsp-start-memcpy.S
+- bsps/shared/dev/btimer/btimer-stub.c
+- bsps/shared/dev/getentropy/getentropy-cpucounter.c
+- bsps/shared/dev/serial/console-termios.c
+- bsps/shared/irq/irq-default-handler.c
+- bsps/shared/start/bsp-fdt.c
+- bsps/shared/start/bspfatal-default.c
+- bsps/shared/start/sbrk.c
+- bsps/shared/start/stackalloc.c
+type: build

spec/build/bsps/arm/imx/objsmp.yml

@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+cppflags: []
+cxxflags: []
+enabled-by:
+- RTEMS_SMP
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/imx/start/bspsmp.c
+- bsps/arm/shared/start/arm-a9mpcore-smp.c
+type: build

spec/build/bsps/arm/imx/optcachedata.yml

@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: true
+default-by-variant:
+- value: false
+  variants:
+  - arm/.*qemu
+description: |
+  enable data cache
+enabled-by: true
+links: []
+name: BSP_DATA_CACHE_ENABLED
+type: build