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2010-09-28 Sebastian Huber <sebastian.huber@embedded-brains.de>

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* misc/mmu.c: New file.
	* Makefile.am: Reflect change above.
	* configure.ac, include/bspopts.h.in, include/irq.h,
	include/lpc32xx.h, include/mmu.h, misc/emc.c, misc/restart.c,
	startup/bspstarthooks.c: Changes throughout.
This commit is contained in:
Sebastian Huber
2010-09-28 14:38:26 +00:00
parent 6daba8105d
commit f140fdc244
11 changed files with 178 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/arm/lpc32xx/ChangeLog
+8
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@@ -1,3 +1,11 @@
2010-09-28 Sebastian Huber <sebastian.huber@embedded-brains.de>
* misc/mmu.c: New file.
* Makefile.am: Reflect change above.
* configure.ac, include/bspopts.h.in, include/irq.h,
include/lpc32xx.h, include/mmu.h, misc/emc.c, misc/restart.c,
startup/bspstarthooks.c: Changes throughout.
2010-08-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
* console/hsu.c: Fixed warnings.
c/src/lib/libbsp/arm/lpc32xx/Makefile.am
+1
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@@ -128,6 +128,7 @@ libbsp_a_SOURCES += misc/timer.c \
misc/restart.c \
misc/boot.c \
misc/emc.c \
misc/mmu.c \
misc/i2c.c
# SSP
c/src/lib/libbsp/arm/lpc32xx/configure.ac
+9 -2
View File
@@ -40,7 +40,6 @@ RTEMS_BSPOPTS_HELP([LPC32XX_HCLK],[AHB bus clock in Hz])
RTEMS_BSPOPTS_SET([LPC32XX_PERIPH_CLK],[*],[13000000U])
RTEMS_BSPOPTS_HELP([LPC32XX_PERIPH_CLK],[peripheral clock in Hz])
RTEMS_BSPOPTS_SET([LPC32XX_ETHERNET_RMII],[lpc32xx_mzx*][])
RTEMS_BSPOPTS_SET([LPC32XX_ETHERNET_RMII],[*],[1])
RTEMS_BSPOPTS_HELP([LPC32XX_ETHERNET_RMII],[enable RMII for Ethernet])
@@ -71,7 +70,6 @@ RTEMS_BSPOPTS_HELP([LPC32XX_CONFIG_UART_CLKMODE],[clock mode configuration for U
RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_MMU],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_MMU],[disable MMU])
RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[lpc32xx_mzx*],[1])
RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_WRITE_DATA_CACHE],[disable cache for read-write data sections])
@@ -79,6 +77,15 @@ RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[lpc32xx_mzx*],[1])
RTEMS_BSPOPTS_SET([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[*],[])
RTEMS_BSPOPTS_HELP([LPC32XX_DISABLE_READ_ONLY_PROTECTION],[disable MMU protection of read-only sections])
RTEMS_BSPOPTS_SET([LPC32XX_STOP_GPDMA],[*],[1])
RTEMS_BSPOPTS_HELP([LPC32XX_STOP_GPDMA],[stop general purpose DMA at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([LPC32XX_STOP_ETHERNET],[*],[1])
RTEMS_BSPOPTS_HELP([LPC32XX_STOP_ETHERNET],[stop Ethernet controller at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([LPC32XX_STOP_USB],[*],[1])
RTEMS_BSPOPTS_HELP([LPC32XX_STOP_USB],[stop USB controller at start-up to avoid DMA interference])
RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
c/src/lib/libbsp/arm/lpc32xx/include/bspopts.h.in
+9
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@@ -60,6 +60,15 @@
/* peripheral clock in Hz */
#undef LPC32XX_PERIPH_CLK
/* stop Ethernet controller at start-up to avoid DMA interference */
#undef LPC32XX_STOP_ETHERNET
/* stop general purpose DMA at start-up to avoid DMA interference */
#undef LPC32XX_STOP_GPDMA
/* stop USB controller at start-up to avoid DMA interference */
#undef LPC32XX_STOP_USB
/* baud for UART 1 */
#undef LPC32XX_UART_1_BAUD
c/src/lib/libbsp/arm/lpc32xx/include/irq.h
+8
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@@ -28,6 +28,10 @@
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @addtogroup bsp_interrupt
*
@@ -162,6 +166,10 @@ void lpc32xx_set_exception_handler(Arm_symbolic_exception_name exception, void (
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_ARM_LPC32XX_IRQ_H */
c/src/lib/libbsp/arm/lpc32xx/include/lpc32xx.h
+55 -5
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@@ -26,6 +26,7 @@
#include <bsp/utility.h>
#include <bsp/lpc-timer.h>
#include <bsp/lpc-dma.h>
/**
* @defgroup lpc32xx_reg Register Definitions
@@ -236,9 +237,6 @@ typedef struct {
typedef struct {
} lpc32xx_sd_card;
typedef struct {
} lpc32xx_dma;
typedef struct {
} lpc32xx_usb;
@@ -282,6 +280,58 @@ typedef struct {
} lpc32xx_mcpwm;
typedef struct {
uint32_t mac1;
uint32_t mac2;
uint32_t ipgt;
uint32_t ipgr;
uint32_t clrt;
uint32_t maxf;
uint32_t supp;
uint32_t test;
uint32_t mcfg;
uint32_t mcmd;
uint32_t madr;
uint32_t mwtd;
uint32_t mrdd;
uint32_t mind;
uint32_t reserved_0 [2];
uint32_t sa0;
uint32_t sa1;
uint32_t sa2;
uint32_t reserved_1 [45];
uint32_t command;
uint32_t status;
uint32_t rxdescriptor;
uint32_t rxstatus;
uint32_t rxdescriptornum;
uint32_t rxproduceindex;
uint32_t rxconsumeindex;
uint32_t txdescriptor;
uint32_t txstatus;
uint32_t txdescriptornum;
uint32_t txproduceindex;
uint32_t txconsumeindex;
uint32_t reserved_2 [10];
uint32_t tsv0;
uint32_t tsv1;
uint32_t rsv;
uint32_t reserved_3 [3];
uint32_t flowcontrolcnt;
uint32_t flowcontrolsts;
uint32_t reserved_4 [34];
uint32_t rxfilterctrl;
uint32_t rxfilterwolsts;
uint32_t rxfilterwolclr;
uint32_t reserved_5 [1];
uint32_t hashfilterl;
uint32_t hashfilterh;
uint32_t reserved_6 [882];
uint32_t intstatus;
uint32_t intenable;
uint32_t intclear;
uint32_t intset;
uint32_t reserved_7 [1];
uint32_t powerdown;
} lpc32xx_eth;
typedef struct {
@@ -459,8 +509,8 @@ typedef struct {
uint32_t reserved_7 [LPC32XX_RESERVED(0x2009c000, 0x200a8000, lpc32xx_i2s)];
lpc32xx_nand_mlc nand_mlc;
uint32_t reserved_8 [LPC32XX_RESERVED(0x200a8000, 0x31000000, lpc32xx_nand_mlc)];
lpc32xx_dma dma;
uint32_t reserved_9 [LPC32XX_RESERVED(0x31000000, 0x31020000, lpc32xx_dma)];
lpc_dma dma;
uint32_t reserved_9 [LPC32XX_RESERVED(0x31000000, 0x31020000, lpc_dma)];
lpc32xx_usb usb;
uint32_t reserved_10 [LPC32XX_RESERVED(0x31020000, 0x31040000, lpc32xx_usb)];
lpc32xx_lcd lcd;
c/src/lib/libbsp/arm/lpc32xx/include/mmu.h
+7 -1
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@@ -3,7 +3,7 @@
*
* @ingroup lpc32xx_mmu
*
* @brief MMU API.
* @brief MMU support API.
*/
/*
@@ -55,6 +55,12 @@ extern "C" {
#define LPC32XX_MMU_READ_WRITE_CACHED \
(LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B)
void lpc32xx_set_translation_table_entries(
void *begin,
void *end,
uint32_t section_flags
);
/** @} */
#ifdef __cplusplus
c/src/lib/libbsp/arm/lpc32xx/misc/emc.c
+7 -19
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@@ -26,22 +26,6 @@
static volatile lpc32xx_emc *const emc = &lpc32xx.emc;
static void set_translation_table_entries(
uint32_t begin,
uint32_t size
)
{
uint32_t end = begin + size;
uint32_t *ttb = arm_cp15_get_translation_table_base();
uint32_t i = ARM_MMU_SECT_GET_INDEX(begin);
uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end));
while (i < iend) {
ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | LPC32XX_MMU_READ_WRITE;
++i;
}
}
static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
{
uint32_t chip_begin = LPC32XX_BASE_EMC_DYCS_0;
@@ -89,11 +73,15 @@ static void dynamic_init(const lpc32xx_emc_dynamic_config *cfg)
/* Set modes */
for (i = 0; i < EMC_DYN_CHIP_COUNT; ++i) {
if (cfg->chip [i].size != 0) {
set_translation_table_entries(chip_begin, cfg->chip [i].size);
lpc32xx_set_translation_table_entries(
(void *) chip_begin,
(void *) (chip_begin + cfg->chip [i].size),
LPC32XX_MMU_READ_WRITE
);
emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
*(volatile uint32_t *)(LPC32XX_BASE_EMC_DYCS_0 + cfg->chip [i].mode);
*(volatile uint32_t *)(chip_begin + cfg->chip [i].mode);
emc->dynamiccontrol = dynamiccontrol | EMC_DYN_CTRL_I_MODE;
*(volatile uint32_t *)(LPC32XX_BASE_EMC_DYCS_0 + cfg->chip [i].extmode);
*(volatile uint32_t *)(chip_begin + cfg->chip [i].extmode);
}
chip_begin += 0x20000000;
}
c/src/lib/libbsp/arm/lpc32xx/misc/mmu.c
+39
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@@ -0,0 +1,39 @@
/**
* @file
*
* @ingroup lpc32xx_mmu
*
* @brief MMU support implementation.
*/
/*
* Copyright (c) 2010 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Obere Lagerstr. 30
* 82178 Puchheim
* Germany
* <rtems@embedded-brains.de>
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*/
#include <bsp/mmu.h>
void lpc32xx_set_translation_table_entries(
void *begin,
void *end,
uint32_t section_flags
)
{
uint32_t *ttb = arm_cp15_get_translation_table_base();
uint32_t i = ARM_MMU_SECT_GET_INDEX(begin);
uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end));
while (i < iend) {
ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | section_flags;
++i;
}
}
c/src/lib/libbsp/arm/lpc32xx/misc/restart.c
-6
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@@ -31,12 +31,6 @@ void lpc32xx_restart(void *addr)
rtems_interrupt_level level;
uint32_t ctrl = 0;
/* FIXME: DMA shutdown */
/* FIXME: USB shutdown */
/* FIXME: Ethernet interface reset */
rtems_interrupt_disable(level);
arm_cp15_data_cache_test_and_clean();
c/src/lib/libbsp/arm/lpc32xx/startup/bspstarthooks.c
+35
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@@ -217,6 +217,40 @@ void BSP_START_SECTION bsp_start_hook_0(void)
setup_mmu_and_cache();
}
static void BSP_START_SECTION stop_dma_activities(void)
{
#ifdef LPC32XX_STOP_GPDMA
if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) {
if ((lpc32xx.dma.cfg & LPC_DMA_CFG_EN) != 0) {
int i = 0;
for (i = 0; i < 8; ++i) {
lpc32xx.dma.channels [i].cfg = 0;
}
lpc32xx.dma.cfg &= ~LPC_DMA_CFG_EN;
}
LPC32XX_DMACLK_CTRL = 0;
}
#endif
#ifdef LPC32XX_STOP_ETHERNET
if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) {
lpc32xx.eth.command = 0x38;
lpc32xx.eth.mac1 = 0xcf00;
lpc32xx.eth.mac1 = 0;
LPC32XX_MAC_CLK_CTRL = 0;
}
#endif
#ifdef LPC32XX_STOP_USB
if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) {
LPC32XX_OTG_CLK_CTRL = 0;
LPC32XX_USB_CTRL = 0x80000;
}
#endif
}
static void BSP_START_SECTION setup_uarts(void)
{
uint32_t uartclk_ctrl = 0;
@@ -269,6 +303,7 @@ static void BSP_START_SECTION setup_timer(void)
void BSP_START_SECTION bsp_start_hook_1(void)
{
stop_dma_activities();
setup_uarts();
setup_timer();