build: Merge default-by-family into by-variant

Prefix the BSP family name with "bsps/" to make it distinct to the BSP variant names. Update #4468.
2026-10-06 10:59:48 +08:00 · 2021-08-18 11:25:35 +02:00
parent 75af5be6a8
commit ebdfa24bff
762 changed files with 7 additions and 768 deletions
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default:
 - -mcpu=cortex-a53
-default-by-family: []
 default-by-variant:
 - value:
  - -mcpu=cortex-a53
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 32768
-default-by-family: []
 default-by-variant: []
 description: |
  offset of RAM region from memory area base
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 1048576
-default-by-family: []
 default-by-variant: []
 description: |
  length of nocache RAM region
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 0x8000000
-default-by-family: []
 default-by-variant: []
 description: |
  length of memory area available to the BSP
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 1073741824
-default-by-family: []
 default-by-variant: []
 description: |
  base address of memory area available to the BSP
@@ -34,7 +34,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default:
 - -mcpu=cortex-a72
-default-by-family: []
 default-by-variant:
 - value:
  - -mcpu=cortex-a72
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 32768
-default-by-family: []
 default-by-variant: []
 description: |
  offset of RAM region from memory area base
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 1048576
-default-by-family: []
 default-by-variant: []
 description: |
  length of nocache RAM region
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 0x8000000
-default-by-family: []
 default-by-variant: []
 description: |
  length of memory area available to the BSP
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 1073741824
-default-by-family: []
 default-by-variant: []
 description: |
  base address of memory area available to the BSP
@@ -34,7 +34,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  If set to true, and AARCH64_GENERIC_TIMER_USE_VIRTUAL is false, then
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  If set to true, then the clock driver uses the Virtual Timer of the AARCH64
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: true
-default-by-family: []
 default-by-variant:
 - value: false
  variants:
@@ -9,7 +9,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 On-Line Applications Research (OAR)
 default: 0x40
-default-by-family: []
 default-by-variant: []
 description: |
  Defines the number of MMU translation table pages to provide.
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2021 Gedare Bloom 
 default:
 - -mcpu=cortex-a72
-default-by-family: []
 default-by-variant:
 - value:
  - -mcpu=cortex-a72
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org> 
 default: 24000000
-default-by-family: []
 default-by-variant:
 - value: 100000000
  variants:
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 0
-default-by-family: []
 default-by-variant: []
 description: |
  minor number of console device
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: 32768
-default-by-family: []
 default-by-variant:
 - value: 0x0
  variants:
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: 0x100000
-default-by-family: []
 default-by-variant: []
 description: |
  length of nocache RAM region
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: 0x10000000
-default-by-family: []
 default-by-variant: []
 description: |
  length of memory area available to the BSP
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: 0x20000000
-default-by-family: []
 default-by-variant:
 - value: 0x10000000
  variants:
@@ -12,7 +12,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -12,7 +12,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2021 Gedare Bloom <gedare@rtems.org>
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default:
 - -mcpu=cortex-a53
-default-by-family: []
 default-by-variant:
 - value:
  - -mcpu=cortex-a53
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 100000000
-default-by-family: []
 default-by-variant:
 - value: 100000000
  variants:
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 32768
-default-by-family: []
 default-by-variant:
 - value: 0x0
  variants:
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 0x100000
-default-by-family: []
 default-by-variant: []
 description: |
  length of nocache RAM region
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 0x10000000
-default-by-family: []
 default-by-variant: []
 description: |
  length of memory area available to the BSP
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: 0x40018000
-default-by-family: []
 default-by-variant:
 - value: 0x10000000
  variants:
@@ -34,7 +34,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -11,7 +11,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -12,7 +12,6 @@ default:
 - -mfpu=neon
 - -mfloat-abi=hard
 - -mtune=cortex-a9
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  enable data cache
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  enable instruction cache
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant:
 - value: true
  variants:
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  configuration for console (UART 0)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  configuration for UART 1
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  define if FDT is supported
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 100000
-default-by-family: []
 default-by-variant: []
 description: |
  speed for I2C0 in HZ
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  Number of configured I2C buses. Note that each bus has to be configured in an apropriate i2cdrv_config array.
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  reset vector address for BSP start
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 115200
-default-by-family: []
 default-by-variant: []
 description: |
  baud for UARTs
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  enable usage of interrupts for the UART modules
@@ -11,7 +11,6 @@ default:
 - -mcpu=cortex-m7
 - -mfpu=fpv5-d16
 - -mfloat-abi=hard
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  Move the functions that set up the clock into the SRAM.  This allows to change the clock frequency even if the application is started from SDRAM.  Requires a TCM_SIZE > 0.
@@ -44,7 +44,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: samv71q21
-default-by-family: []
 default-by-variant: []
 description: |
  Chip variant
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 115200
-default-by-family: []
 default-by-variant: []
 description: |
  initial baud for console devices (default 115200)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  device index for /dev/console (default 1, e.g. USART1)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  use interrupt driven mode for console devices (used by default)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  device type for /dev/console, use 0 for USART and 1 for UART (default USART)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 123000000
-default-by-family: []
 default-by-variant: []
 description: |
  Frequency of the MCK in Hz. Set to 0 to force application defined speed.  See start/pmc-config.c for available clock configurations.
@@ -7,7 +7,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 4096
-default-by-family: []
 default-by-variant: []
 description: |
  size of NOCACHE section in bytes
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 12000000
-default-by-family: []
 default-by-variant: []
 description: |
  Main oscillator frequency in Hz (default 12MHz)
@@ -7,7 +7,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 2097152
-default-by-family: []
 default-by-variant: []
 description: |
  size of QSPI flash in bytes
@@ -19,7 +19,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: is42s16100e-7bli
-default-by-family: []
 default-by-variant: []
 description: |
  SDRAM variant
@@ -7,7 +7,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 0
-default-by-family: []
 default-by-variant: []
 description: |
  size of tightly coupled memories (TCM) in bytes
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin.
@@ -28,7 +28,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: null
-default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
 - -mcpu=cortex-a8
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant:
 - value: true
  variants:
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 115200
-default-by-family: []
 default-by-variant: []
 description: |
  initial baud for console UART
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  polled console i/o (e.g. to run testsuite)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant:
 - value: false
  variants:
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant:
 - value: true
  variants:
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
 - -mcpu=arm920
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
 - -mcpu=arm920
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant:
 - value: true
  variants:
@@ -7,7 +7,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant:
 - value: false
  variants:
@@ -7,7 +7,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable use of the uMon console.
@@ -7,7 +7,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable use of the MicroMonitor console device.
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable use of the USART 0.
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable use of the USART 1.
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable use of the USART 2.
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable use of the USART 3.
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
 - -mcpu=arm7tdmi
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable options which optimize executingon the Skyeye simulator.  Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized.  This significantly reduces the wall time required to execute the RTEMS test suites.
@@ -11,7 +11,6 @@ default:
 - -mthumb
 - -mfloat-abi=hard
 - -mfpu=auto
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -9,7 +9,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 436207616
-default-by-family: []
 default-by-variant:
 - value: 2583691264
  variants:
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 354418688
-default-by-family: []
 default-by-variant: []
 description: |
  Defines the size in bytes of the device area.
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 2147483648
-default-by-family: []
 default-by-variant:
 - value: 1024
  variants:
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 33554432
-default-by-family: []
 default-by-variant:
 - value: 33553408
  variants:
@@ -8,7 +8,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 1048576
-default-by-family: []
 default-by-variant:
 - value: 1024
  variants:
@@ -8,7 +8,6 @@ copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
 - -mcpu=xscale
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  If defined, enable options which optimize executingon the Skyeye simulator.  Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized.  This significantly reduces the wall time required to execute the RTEMS test suites.
@@ -12,7 +12,6 @@ default:
 - -mfpu=neon
 - -mfloat-abi=hard
 - -mtune=cortex-a7
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant:
 - value: false
  variants:
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant:
 - value: false
  variants:
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 135000000
-default-by-family: []
 default-by-variant: []
 description: |
  AHB clock frequency in Hz
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 67500000
-default-by-family: []
 default-by-variant: []
 description: |
  ECSPI clock frequency in Hz
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 67500000
-default-by-family: []
 default-by-variant: []
 description: |
  IPG clock frequency in Hz
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 196363000
-default-by-family: []
 default-by-variant: []
 description: |
  SDHCI clock frequency in Hz
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 24000000
-default-by-family: []
 default-by-variant: []
 description: |
  UART clock frequency in Hz
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 1
-default-by-family: []
 default-by-variant: []
 description: |
  use interrupt driven mode for console devices (used by default)
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
-default-by-family: []
 default-by-variant: []
 description: |
  reset vector address for BSP start
@@ -11,7 +11,6 @@ default:
 - -mcpu=cortex-m7
 - -mfpu=fpv5-d16
 - -mfloat-abi=hard
-default-by-family: []
 default-by-variant: []
 description: |
  ABI flags
@@ -6,7 +6,6 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
-default-by-family: []
 default-by-variant: []
 description: |
  Enable the minor loop mapping of the Freescale EDMA.
@@ -3,7 +3,6 @@ actions:
 - env-assign: null
 build-type: option
 default: linkcmds.flexspi
-default-by-family: []
 default-by-variant: []
 enabled-by: true
 format: '{}'
--- a/Show More
+++ b/Show More