bsps: Add Cortex-A53 LP64 basic BSP

This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with
interrupt support using GICv3 and clock support using the ARM GPT.
This commit is contained in:
Kinsey Moore authored and Joel Sherrill committed 2020-10-05 16:11:40 -05:00
1 parent 8387c52e47
commit db68ea1b9b
25 files changed
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief Console Configuration
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/bspIo.h>
#include <bsp.h>
#include <dev/serial/arm-pl011.h>
#include <bsp/console-termios.h>
#include <bspopts.h>
arm_pl011_context a53_qemu_vpl011_context = {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("PL011"),
.regs = (volatile pl011 *) BSP_A53_QEMU_VPL011_BASE,
.initial_baud = 115200
};
const console_device console_device_table[] = {
{
.device_file = "/dev/ttyS0",
.probe = console_device_probe_default,
.handler = &arm_pl011_fns,
.context = &a53_qemu_vpl011_context.base
}
};
const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
static void output_char( char c )
{
arm_pl011_write_polled(&a53_qemu_vpl011_context.base, c);
}
BSP_output_char_function_type BSP_output_char = output_char;
BSP_polling_getchar_function_type BSP_poll_char = NULL;
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief Core BSP definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A53_QEMU_BSP_H
#define LIBBSP_AARCH64_A53_QEMU_BSP_H
/**
* @addtogroup RTEMSBSPsAArch64
*
* @{
*/
#include <bspopts.h>
#ifndef ASM
#include <bsp/default-initial-extension.h>
#include <bsp/start.h>
#include <rtems.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_ARM_GIC_CPUIF_BASE 0x08010000
#define BSP_ARM_GIC_DIST_BASE 0x08000000
#define BSP_ARM_GIC_REDIST_BASE 0x080A0000
#define BSP_A53_QEMU_VPL011_BASE 0x9000000
#define BSP_A53_QEMU_VPL011_LENGTH 0x1000
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
/** @} */
#endif /* LIBBSP_AARCH64_A53_QEMU_BSP_H */
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP IRQ definitions
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_A53_IRQ_H
#define LIBBSP_AARCH64_A53_IRQ_H
#ifndef ASM
#include <rtems/irq.h>
#include <rtems/irq-extension.h>
#include <dev/irq/arm-gic-irq.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
#define BSP_INTERRUPT_VECTOR_MIN 0
#define BSP_INTERRUPT_VECTOR_MAX 1023
/* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30
#define BSP_VPL011_SPI 32
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* ASM */
#endif /* LIBBSP_AARCH64_A53_IRQ_H */
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP tm27 header
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTEMS_TMTEST27
#error "This is an RTEMS internal file you must not include directly."
#endif
#ifndef __tm27_h
#define __tm27_h
#include <dev/irq/arm-gic-tm27.h>
#endif /* __tm27_h */
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <bsp/linker-symbols.h>
void bsp_start( void )
{
bsp_interrupt_initialize();
rtems_cache_coherent_add_area(
bsp_section_nocacheheap_begin,
(uintptr_t) bsp_section_nocacheheap_size
);
}
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64A53
*
* @brief BSP Startup Hooks
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp.h>
#include <bsp/start.h>
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
/* Do nothing */
}
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
AArch64_start_set_vector_base();
bsp_start_copy_sections();
bsp_start_clear_bss();
}
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_linker
*
* @brief Symbols defined in linker command base file.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H
#define LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H
#include <rtems/score/basedefs.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup aarch64_linker Linker Support
*
* @ingroup RTEMSBSPsAARCH64Shared
*
* @brief Linker support.
*
* @{
*/
#ifndef ASM
#define LINKER_SYMBOL(sym) extern char sym [];
#else
#define LINKER_SYMBOL(sym) .extern sym
#endif
LINKER_SYMBOL(bsp_stack_exception_size)
LINKER_SYMBOL(bsp_stack_hyp_size)
LINKER_SYMBOL(bsp_section_start_begin)
LINKER_SYMBOL(bsp_section_start_end)
LINKER_SYMBOL(bsp_section_start_size)
LINKER_SYMBOL(bsp_section_vector_begin)
LINKER_SYMBOL(bsp_section_vector_end)
LINKER_SYMBOL(bsp_section_vector_size)
LINKER_SYMBOL(bsp_section_text_begin)
LINKER_SYMBOL(bsp_section_text_end)
LINKER_SYMBOL(bsp_section_text_size)
LINKER_SYMBOL(bsp_section_text_load_begin)
LINKER_SYMBOL(bsp_section_text_load_end)
LINKER_SYMBOL(bsp_section_rodata_begin)
LINKER_SYMBOL(bsp_section_rodata_end)
LINKER_SYMBOL(bsp_section_rodata_size)
LINKER_SYMBOL(bsp_section_rodata_load_begin)
LINKER_SYMBOL(bsp_section_rodata_load_end)
LINKER_SYMBOL(bsp_section_data_begin)
LINKER_SYMBOL(bsp_section_data_end)
LINKER_SYMBOL(bsp_section_data_size)
LINKER_SYMBOL(bsp_section_data_load_begin)
LINKER_SYMBOL(bsp_section_data_load_end)
LINKER_SYMBOL(bsp_section_fast_text_begin)
LINKER_SYMBOL(bsp_section_fast_text_end)
LINKER_SYMBOL(bsp_section_fast_text_size)
LINKER_SYMBOL(bsp_section_fast_text_load_begin)
LINKER_SYMBOL(bsp_section_fast_text_load_end)
LINKER_SYMBOL(bsp_section_fast_data_begin)
LINKER_SYMBOL(bsp_section_fast_data_end)
LINKER_SYMBOL(bsp_section_fast_data_size)
LINKER_SYMBOL(bsp_section_fast_data_load_begin)
LINKER_SYMBOL(bsp_section_fast_data_load_end)
LINKER_SYMBOL(bsp_section_bss_begin)
LINKER_SYMBOL(bsp_section_bss_end)
LINKER_SYMBOL(bsp_section_bss_size)
LINKER_SYMBOL(bsp_section_work_begin)
LINKER_SYMBOL(bsp_section_work_end)
LINKER_SYMBOL(bsp_section_work_size)
LINKER_SYMBOL(bsp_section_stack_begin)
LINKER_SYMBOL(bsp_section_stack_end)
LINKER_SYMBOL(bsp_section_stack_size)
LINKER_SYMBOL(bsp_section_nocache_begin)
LINKER_SYMBOL(bsp_section_nocache_end)
LINKER_SYMBOL(bsp_section_nocache_size)
LINKER_SYMBOL(bsp_section_nocache_load_begin)
LINKER_SYMBOL(bsp_section_nocache_load_end)
LINKER_SYMBOL(bsp_section_nocachenoload_begin)
LINKER_SYMBOL(bsp_section_nocachenoload_end)
LINKER_SYMBOL(bsp_section_nocachenoload_size)
LINKER_SYMBOL(bsp_section_nocacheheap_begin)
LINKER_SYMBOL(bsp_section_nocacheheap_end)
LINKER_SYMBOL(bsp_section_nocacheheap_size)
LINKER_SYMBOL(bsp_vector_table_begin)
LINKER_SYMBOL(bsp_vector_table_end)
LINKER_SYMBOL(bsp_vector_table_size)
LINKER_SYMBOL(bsp_start_vector_table_begin)
LINKER_SYMBOL(bsp_start_vector_table_end)
LINKER_SYMBOL(bsp_start_vector_table_size)
#define BSP_FAST_TEXT_SECTION \
RTEMS_SECTION(".bsp_fast_text")
#define BSP_FAST_DATA_SECTION \
RTEMS_SECTION(".bsp_fast_data")
#define BSP_NOCACHE_SECTION \
RTEMS_SECTION(".bsp_nocache")
#define BSP_NOCACHE_SUBSECTION(subsection) \
RTEMS_SECTION(".bsp_nocache." # subsection)
#define BSP_NOCACHENOLOAD_SECTION \
RTEMS_SECTION(".bsp_noload_nocache")
#define BSP_NOCACHENOLOAD_SUBSECTION(subsection) \
RTEMS_SECTION(".bsp_noload_nocache." # subsection)
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_LINKER_SYMBOLS_H */
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup aarch64_start
*
* @brief Aarch64 system low level start.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LIBBSP_AARCH64_SHARED_START_H
#define LIBBSP_AARCH64_SHARED_START_H
#include <string.h>
#include <bsp/linker-symbols.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/**
* @defgroup aarch64_start System Start
*
* @ingroup RTEMSBSPsAarch64Shared
*
* @brief Aarch64 system low level start.
*
* @{
*/
#define BSP_START_TEXT_SECTION __attribute__((section(".bsp_start_text")))
#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data")))
/**
* @brief System start entry.
*/
void _start(void);
/**
* @brief Start entry hook 0.
*
* This hook will be called from the start entry code after all modes and
* stack pointers are initialized but before the copying of the exception
* vectors.
*/
void bsp_start_hook_0(void);
/**
* @brief Start entry hook 1.
*
* This hook will be called from the start entry code after copying of the
* exception vectors but before the call to boot_card().
*/
void bsp_start_hook_1(void);
BSP_START_TEXT_SECTION static inline void
bsp_start_memcpy_libc(void *dest, const void *src, size_t n)
{
if (dest != src) {
memcpy(dest, src, n);
}
}
/**
* @brief Copies all standard sections from the load to the runtime area.
*/
BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections(void)
{
/* Copy .text section */
bsp_start_memcpy_libc(
(int *) bsp_section_text_begin,
(const int *) bsp_section_text_load_begin,
(size_t) bsp_section_text_size
);
/* Copy .rodata section */
bsp_start_memcpy_libc(
(int *) bsp_section_rodata_begin,
(const int *) bsp_section_rodata_load_begin,
(size_t) bsp_section_rodata_size
);
/* Copy .data section */
bsp_start_memcpy_libc(
(int *) bsp_section_data_begin,
(const int *) bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
/* Copy .fast_text section */
bsp_start_memcpy_libc(
(int *) bsp_section_fast_text_begin,
(const int *) bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
/* Copy .fast_data section */
bsp_start_memcpy_libc(
(int *) bsp_section_fast_data_begin,
(const int *) bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
}
/**
* @brief Copies the .data, .fast_text and .fast_data sections from the load to
* the runtime area using the C library memcpy().
*
* Works only in case the .start, .text and .rodata sections reside in one
* memory region.
*/
BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections_compact(void)
{
/* Copy .data section */
bsp_start_memcpy_libc(
bsp_section_data_begin,
bsp_section_data_load_begin,
(size_t) bsp_section_data_size
);
/* Copy .fast_text section */
bsp_start_memcpy_libc(
bsp_section_fast_text_begin,
bsp_section_fast_text_load_begin,
(size_t) bsp_section_fast_text_size
);
/* Copy .fast_data section */
bsp_start_memcpy_libc(
bsp_section_fast_data_begin,
bsp_section_fast_data_load_begin,
(size_t) bsp_section_fast_data_size
);
}
BSP_START_TEXT_SECTION static inline void bsp_start_clear_bss(void)
{
memset(bsp_section_bss_begin, 0, (size_t) bsp_section_bss_size);
}
BSP_START_TEXT_SECTION static inline void
AArch64_start_set_vector_base(void)
{
/*
* Do not use bsp_vector_table_begin == 0, since this will get optimized away.
*/
if (bsp_vector_table_end != bsp_vector_table_size) {
__asm__ volatile (
"msr VBAR_EL1, %[vtable]\n"
: : [vtable] "r" (bsp_start_vector_table_begin)
);
}
}
/** @} */
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_AARCH64_SHARED_START_H */
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/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64-specific ARM GPT system register accessors.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/clock/arm-generic-timer.h>
#include <bsp/irq.h>
uint64_t arm_gt_clock_get_compare_value(void)
{
uint64_t val;
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntv_cval_el0"
#else
"mrs %[val], cntp_cval_el0"
#endif
: [val] "=&r" (val)
);
return val;
}
void arm_gt_clock_set_compare_value(uint64_t cval)
{
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_cval_el0, %[cval]"
#else
"msr cntp_cval_el0, %[cval]"
#endif
:
: [cval] "r" (cval)
);
}
uint64_t arm_gt_clock_get_count(void)
{
uint64_t val;
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"mrs %[val], cntvct_el0"
#else
"mrs %[val], cntpct_el0"
#endif
: [val] "=&r" (val)
);
return val;
}
void arm_gt_clock_set_control(uint32_t ctl)
{
__asm__ volatile (
#ifdef AARCH64_GENERIC_TIMER_USE_VIRTUAL
"msr cntv_ctl_el0, %[ctl]"
#else
"msr cntp_ctl_el0, %[ctl]"
#endif
:
: [ctl] "r" (ctl)
);
}
void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq )
{
uint64_t val;
__asm__ volatile (
"mrs %[val], cntfrq_el0"
: [val] "=&r" (val)
);
*frequency = val;
#ifdef ARM_GENERIC_TIMER_USE_VIRTUAL
*irq = BSP_TIMER_VIRT_PPI;
#else
*irq = BSP_TIMER_PHYS_NS_PPI;
#endif
}
@@ -0,0 +1,64 @@
/* SPDX-License-Identifier: BSD-2-Clause */
/**
* @file
*
* @ingroup RTEMSBSPsAArch64Shared
*
* @brief AArch64-specific ARM GICv3 handlers.
*/
/*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <dev/irq/arm-gic-irq.h>
#include <bsp/irq-generic.h>
#include <rtems/score/cpu_irq.h>
void arm_interrupt_handler_dispatch(rtems_vector_number vector)
{
uint32_t interrupt_level = _CPU_ISR_Get_level();
AArch64_interrupt_enable(1);
bsp_interrupt_handler_dispatch(vector);
_CPU_ISR_Set_level(interrupt_level);
}
void arm_interrupt_facility_set_exception_handler(void)
{
AArch64_set_exception_handler(
AARCH64_EXCEPTION_SPx_IRQ,
_AArch64_Exception_interrupt_no_nest
);
AArch64_set_exception_handler(
AARCH64_EXCEPTION_SP0_IRQ,
_AArch64_Exception_interrupt_nest
);
}
void bsp_interrupt_dispatch(void)
{
gicv3_interrupt_dispatch();
}
File diff suppressed because it is too large. Load diff
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+17
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@@ -0,0 +1,17 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-string: null
- split: null
- env-append: null
build-type: option
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
default:
- -mcpu=cortex-a53
default-by-variant: []
enabled-by: true
links: []
name: ABI_FLAGS
description: |
ABI flags
type: build
@@ -0,0 +1,19 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: aarch64
bsp: a53_lp64_qemu
build-type: bsp
cflags: []
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
cppflags: []
enabled-by: true
family: a53
includes: []
install: []
links:
- role: build-dependency
uid: grp
- role: build-dependency
uid: linkcmds_lp64
source: []
type: build
+42
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@@ -0,0 +1,42 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: group
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
enabled-by: true
includes: []
install: []
ldflags: []
links:
- role: build-dependency
uid: ../grp
- role: build-dependency
uid: ../start
- role: build-dependency
uid: abi
- role: build-dependency
uid: obj
- role: build-dependency
uid: optloadoff
- role: build-dependency
uid: optnocachelen
- role: build-dependency
uid: optramlen
- role: build-dependency
uid: optramori
- role: build-dependency
uid: tsta53
- role: build-dependency
uid: ../../obj
- role: build-dependency
uid: ../../objirq
- role: build-dependency
uid: ../../optcachedata
- role: build-dependency
uid: ../../optcacheinst
- role: build-dependency
uid: ../../opto2
- role: build-dependency
uid: ../../bspopts
type: build
use-after: []
use-before: []
@@ -0,0 +1,71 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: config-file
content: |
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
* Written by Kinsey Moore <kinsey.moore@oarcorp.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
MEMORY {
RAM : ORIGIN = ${BSP_A53_RAM_BASE} + ${BSP_A53_LOAD_OFFSET}, LENGTH = ${BSP_A53_RAM_LENGTH} - ${BSP_A53_LOAD_OFFSET} - ${BSP_A53_NOCACHE_LENGTH}
NOCACHE : ORIGIN = ${BSP_A53_RAM_BASE} + ${BSP_A53_RAM_LENGTH} - ${BSP_A53_NOCACHE_LENGTH}, LENGTH = ${BSP_A53_NOCACHE_LENGTH}
}
REGION_ALIAS ("REGION_START", RAM);
REGION_ALIAS ("REGION_VECTOR", RAM);
REGION_ALIAS ("REGION_TEXT", RAM);
REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_RODATA", RAM);
REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
REGION_ALIAS ("REGION_DATA", RAM);
REGION_ALIAS ("REGION_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_TEXT", RAM);
REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
REGION_ALIAS ("REGION_FAST_DATA", RAM);
REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
REGION_ALIAS ("REGION_BSS", RAM);
REGION_ALIAS ("REGION_WORK", RAM);
REGION_ALIAS ("REGION_STACK", RAM);
REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ? bsp_stack_exception_size : 1024;
bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
bsp_vector_table_in_start_section = 1;
OUTPUT_FORMAT ("elf64-littleaarch64")
OUTPUT_ARCH (aarch64)
INCLUDE linkcmds.base
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
enabled-by: true
install-path: ${BSP_LIBDIR}
links: []
target: linkcmds
type: build
+37
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@@ -0,0 +1,37 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: objects
cflags: []
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
cppflags: []
cxxflags: []
enabled-by: true
includes: []
install:
- destination: ${BSP_INCLUDEDIR}
source:
- bsps/aarch64/a53/include/bsp.h
- bsps/aarch64/a53/include/tm27.h
- destination: ${BSP_INCLUDEDIR}/bsp
source:
- bsps/aarch64/a53/include/bsp/irq.h
links: []
source:
- bsps/aarch64/shared/cache/cache.c
- bsps/aarch64/a53/console/console.c
- bsps/aarch64/a53/start/bspstart.c
- bsps/aarch64/a53/start/bspstarthooks.c
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
- bsps/shared/dev/serial/console-termios-init.c
- bsps/shared/dev/serial/console-termios.c
- bsps/shared/start/bspfatal-default.c
- bsps/shared/start/bspgetworkarea-default.c
- bsps/shared/start/bspreset-arm-psci.c
- bsps/shared/start/sbrk.c
- bsps/shared/dev/irq/arm-gicv3.c
- bsps/shared/irq/irq-default-handler.c
- bsps/aarch64/shared/irq/irq-arm-gicv3-aarch64.c
- bsps/shared/dev/btimer/btimer-cpucounter.c
- bsps/shared/dev/clock/arm-generic-timer.c
- bsps/aarch64/shared/clock/arm-generic-timer-aarch64.c
type: build
@@ -0,0 +1,18 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
default: 32768
default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
name: BSP_A53_LOAD_OFFSET
description: |
offset of RAM region from memory area base
type: build
@@ -0,0 +1,18 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
default: 1048576
default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
name: BSP_A53_NOCACHE_LENGTH
description: |
length of nocache RAM region
type: build
+18
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@@ -0,0 +1,18 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
default: 8388608
default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
name: BSP_A53_RAM_LENGTH
description: |
length of memory area available to the BSP
type: build
+18
View File
@@ -0,0 +1,18 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- get-integer: null
- assert-uint32: null
- env-assign: null
- format-and-define: null
build-type: option
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
default: 1073741824
default-by-variant: []
enabled-by: true
format: '{:#010x}'
links: []
name: BSP_A53_RAM_BASE
description: |
base address of memory area available to the BSP
type: build
+45
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@@ -0,0 +1,45 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
actions:
- set-test-state:
# expected to fail, don't compile these
minimum: exclude
# test broken under 64bit due to SIZE_MAX differences
validation-0: exclude
# don't compile due to toolchain issues
spconfig01: exclude
spmisc01: exclude
# tests that are passing intermittently
spcpucounter01: exclude
rtmonuse: exclude
sp37: exclude
sp68: exclude
sp04: exclude
sp20: exclude
sp69: exclude
rtmonusxtimes01: exclude
spedfsched02: exclude
psxtimes01: exclude
sprmsched01: exclude
sptimecounter02: exclude
sptimecounter04: exclude
ttest02: exclude
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
default: null
default-by-variant: []
enabled-by: true
links:
- role: build-dependency
uid: ../../tstnoiconv
- role: build-dependency
uid: ../../tstnojffs2
- role: build-dependency
uid: ../../tstnolibdl
- role: build-dependency
uid: ../../tstnorfs
description: ''
type: build
build-type: option
+24
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@@ -0,0 +1,24 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
build-type: group
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
enabled-by: true
includes: []
install:
- destination: ${BSP_INCLUDEDIR}/dev/clock
source:
- bsps/include/dev/clock/arm-generic-timer.h
- destination: ${BSP_INCLUDEDIR}/dev/irq
source:
- bsps/include/dev/irq/arm-gic-irq.h
- bsps/include/dev/irq/arm-gic-regs.h
- bsps/include/dev/irq/arm-gic-tm27.h
- bsps/include/dev/irq/arm-gic.h
- destination: ${BSP_LIBDIR}
source:
- bsps/aarch64/shared/start/linkcmds.base
ldflags: []
links: []
type: build
use-after: []
use-before: []
+14
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@@ -0,0 +1,14 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
asflags: []
build-type: start-file
copyrights:
- Copyright (C) 2020 On-Line Applications Research (OAR)
cppflags: []
enabled-by: true
includes: []
install-path: ${BSP_LIBDIR}
links: []
source:
- bsps/aarch64/shared/start/start.S
target: start.o
type: build