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bsps/powerpc/shared: Fix 32/64 and printf format specifier warnings

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The PowerPC has both 32 and 64 bit CPUs within a single architecture
and collection of BSPs. This change set addresses cases where the
format specifier, type, or cast was not correct or portable across
32 and 64 bit environments.
This commit is contained in:
Joel Sherrill
2025-07-15 22:57:46 +00:00
committed by Gedare Bloom
parent f12e733097
commit db19f09a21
5 changed files with 17 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files
bsps/powerpc/shared/exceptions/ppc_exc_alignment.c
+1 -1
View File
@@ -39,7 +39,7 @@ int ppc_exc_alignment_handler(BSP_Exception_frame *frame, unsigned excNum)
unsigned b = (opcode >> 11) & 0x1f;
PPC_GPR_TYPE *regs = &frame->GPR0;
unsigned *current = (unsigned *)
(((a == 0 ? 0 : (unsigned) regs[a]) + (unsigned) regs[b]) & (clsz - 1));
(((a == 0 ? 0 : (uintptr_t) regs[a]) + (uintptr_t) regs[b]) & (clsz - 1));
unsigned *end = current + clsz / sizeof(*current);
while (current != end) {
bsps/powerpc/shared/start/probeMemEnd.c
+1 -1
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@@ -127,7 +127,7 @@ register uint32_t v, x;
}
asm volatile("sync");
switch ( _read_PPC_PVR()>>16 ) {
default: printk(__FILE__" CPU_lockUnlockCaches(): unknown CPU (PVR = 0x%08" PRIx32 ")\n",_read_PPC_PVR());
default: printk(__FILE__" CPU_lockUnlockCaches(): unknown CPU (PVR = 0x%08lx)\n",_read_PPC_PVR());
return -1;
case PPC_750: printk("CPU_lockUnlockCaches(): Can't lock L2 on a mpc750, sorry :-(\n");
return -2; /* cannot lock L2 :-( */
bsps/powerpc/shared/vme/bspVmeDmaList.c
+2 -3
View File
@@ -72,8 +72,7 @@ typedef struct VMEDmaListNodeRec_ {
static void
lprint(VMEDmaListNode d)
{
printf("n 0x%08" PRIu32", p: 0x%08" PRIu32 ", n: 0x%08" PRIu32 " d: 0x%08" PRIu32 "\n",
(uint32_t)d, (uint32_t)d->p, (uint32_t)d->n, (uint32_t)d->d);
printf("n %p, p: %p, n: 0x%p, d: %p\n", d, d->p, d->n, d->d);
}
#endif
@@ -130,7 +129,7 @@ int i;
}
/* align memory ptr; must not be freed() anymore */
memptr = (char*)( ((uint32_t)memptr + algnmsk) & ~ algnmsk );
memptr = (char*)( ((uintptr_t)memptr + algnmsk) & ~ algnmsk );
for ( i = 0; i<(LCHUNK); i++, memptr+=blksize ) {
memset(memptr, 0, blksize);
bsps/powerpc/shared/vme/vmeTsi148.c
+7 -7
View File
@@ -379,7 +379,7 @@ typedef uint32_t pci_ulong;
#ifndef PCI_DRAM_OFFSET
#define PCI_DRAM_OFFSET 0
#endif
#define BSP_LOCAL2PCI_ADDR(l) (((uint32_t)l)+PCI_DRAM_OFFSET)
#define BSP_LOCAL2PCI_ADDR(l) (((uintptr_t)l)+PCI_DRAM_OFFSET)
#endif
/* PCI_MEM_BASE is a possible offset between CPU- and PCI addresses.
@@ -464,7 +464,7 @@ unsigned short wrd;
return -1;
/* Assume upper BAR is zero */
*pbase=(BERegister*)(((pci_ulong)BSP_PCI2LOCAL_ADDR(busaddr)) & ~0xff);
*pbase=(BERegister*)(((uintptr_t)BSP_PCI2LOCAL_ADDR(busaddr)) & ~0xff);
if (BSP_PCI_CONFIG_IN_BYTE(bus,dev,fun,PCI_INTERRUPT_LINE,&irqline))
return -1;
@@ -490,8 +490,8 @@ BERegister *base;
if ((irq=vmeTsi148FindPciBase(instance,&base)) < 0) {
uprintf(stderr,"unable to find a Tsi148 in pci config space\n");
} else {
uprintf(stderr,"Tundra Tsi148 PCI-VME bridge detected at 0x%08x, IRQ %d\n",
(unsigned int)base, irq);
uprintf(stderr,"Tundra Tsi148 PCI-VME bridge detected at %p, IRQ %d\n",
base, irq);
}
devs[0].base = base;
devs[0].irqLine = irq;
@@ -1486,7 +1486,7 @@ rtems_interrupt_lock_context lock_context;
static void
tsiVMEISR(rtems_irq_hdl_param arg)
{
int pin = (int)arg;
uintptr_t pin = (uintptr_t)arg;
BERegister *b = THEBASE;
IRQEntry ip;
unsigned long msk,lintstat,vector, vecarg;
@@ -1597,7 +1597,7 @@ rtems_irq_connect_data xx;
xx.off = my_no_op;
xx.isOn = my_isOn;
xx.hdl = isr;
xx.handle = (rtems_irq_hdl_param)slot;
xx.handle = (rtems_irq_hdl_param)((uintptr_t)slot);
xx.name = pic_line;
if ( shared ) {
@@ -2401,7 +2401,7 @@ VmeTsi148DmaListDescriptor d = p;
if ( 0 == n ) {
st_be32( &d->dnlal, TSI_DNLAL_LLA );
} else {
st_be32( &d->dnlal, BSP_LOCAL2PCI_ADDR((uint32_t)n) );
st_be32( &d->dnlal, BSP_LOCAL2PCI_ADDR((uintptr_t)n) );
}
}
bsps/powerpc/shared/vme/vmeUniverse.c
+6 -6
View File
@@ -340,7 +340,7 @@ unsigned char irqline;
|| ((unsigned long)(busaddr) & 1))
return -1;
}
*pbase=(volatile LERegister*)BSP_PCI2LOCAL_ADDR(busaddr);
*pbase=(volatile LERegister*)(uintptr_t)BSP_PCI2LOCAL_ADDR(busaddr);
if (BSP_PCI_CONFIG_IN_BYTE(bus,dev,fun,PCI_INTERRUPT_LINE,&irqline))
return -1;
@@ -1030,7 +1030,7 @@ int rval;
vmeUniverse0PciIrqLine = rval;
rval = 0;
uprintf(stderr,"Universe II PCI-VME bridge detected at 0x%08x, IRQ %d\n",
(unsigned int)vmeUniverse0BaseAddr, vmeUniverse0PciIrqLine);
(uintptr_t)vmeUniverse0BaseAddr, vmeUniverse0PciIrqLine);
}
return rval;
}
@@ -1601,7 +1601,7 @@ VmeUniverseDmaListDesc d = p;
if ( 0 == n ) {
st_le32( &d->dcpp, UNIV_DCPP_IMG_NULL );
} else {
st_le32( &d->dcpp, BSP_LOCAL2PCI_ADDR( (uint32_t)n));
st_le32( &d->dcpp, BSP_LOCAL2PCI_ADDR( (uintptr_t)n));
}
}
@@ -1683,7 +1683,7 @@ uint32_t dgcs;
vmeUniverseWriteRegXX( base, 0x0, UNIV_REGOFF_DTBC);
/* set the address of the descriptor chain */
vmeUniverseWriteRegXX( base, BSP_LOCAL2PCI_ADDR((uint32_t)p), UNIV_REGOFF_DCPP);
vmeUniverseWriteRegXX( base, BSP_LOCAL2PCI_ADDR((uintptr_t)p), UNIV_REGOFF_DCPP);
/* and GO */
dgcs |= UNIV_DGCS_GO;
@@ -1892,7 +1892,7 @@ register unsigned long s;
static void
universeVMEISR(rtems_irq_hdl_param arg)
{
int pin = (int)arg;
uintptr_t pin = (uintptr_t)arg;
UniverseIRQEntry ip;
unsigned long msk,lintstat,status;
int lvl;
@@ -2033,7 +2033,7 @@ rtems_irq_connect_data aarrggh;
aarrggh.off = my_no_op;
aarrggh.isOn = my_isOn;
aarrggh.hdl = isr;
aarrggh.handle = (rtems_irq_hdl_param)pic_pin;
aarrggh.handle = (rtems_irq_hdl_param)(uintptr_t)pic_pin;
aarrggh.name = pic_line;
if ( shared ) {