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2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>

Browse Source 
* PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c,
	clock/clock.c, console/85c30.c, console/console.c,
	console/consolebsp.h, include/bsp.h, include/gen2.h, startup/FPGA.c,
	startup/Hwr_init.c, startup/bspstart.c, startup/genpvec.c,
	startup/spurious.c, startup/vmeintr.c, timer/timer.c, tod/tod.c:
	Convert to using c99 fixed size types.
This commit is contained in:
Ralf Corsepius
2004-03-31 03:47:07 +00:00
parent ffe63313be
commit dac42086c9
19 changed files with 298 additions and 289 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/powerpc/score603e/ChangeLog
+9
View File
@@ -1,3 +1,12 @@
2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org>
* PCI_bus/PCI.c, PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c,
clock/clock.c, console/85c30.c, console/console.c,
console/consolebsp.h, include/bsp.h, include/gen2.h, startup/FPGA.c,
startup/Hwr_init.c, startup/bspstart.c, startup/genpvec.c,
startup/spurious.c, startup/vmeintr.c, timer/timer.c, tod/tod.c:
Convert to using c99 fixed size types.
2004-02-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Reflect changes to bsp.am.
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
+14 -14
View File
@@ -35,19 +35,19 @@ void PCI_bus_delay ()
* PCI_bus_write
*/
void PCI_bus_write(
volatile rtems_unsigned32 * _addr, /* IN */
rtems_unsigned32 _data /* IN */
volatile uint32_t * _addr, /* IN */
uint32_t _data /* IN */
)
{
_data = Convert_Endian_32( _data );
*_addr = _data;
}
rtems_unsigned32 PCI_bus_read(
volatile rtems_unsigned32 * _addr /* IN */
uint32_t PCI_bus_read(
volatile uint32_t * _addr /* IN */
)
{
rtems_unsigned32 data;
uint32_t data;
data = *_addr;
data = Convert_Endian_32( data );
@@ -58,16 +58,16 @@ rtems_unsigned32 PCI_bus_read(
* devices registers on the PCI bus. i.e.: Universe, Ethernet & PMC.
*/
rtems_unsigned32 Read_pci_device_register(
rtems_unsigned32 address
uint32_t Read_pci_device_register(
uint32_t address
)
{
rtems_unsigned32 data;
uint32_t data;
/*
* Write the PCI configuration address
*/
PCI_bus_write( (volatile rtems_unsigned32 *)SCORE603E_PCI_IO_CFG_ADDR, address );
PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_ADDR, address );
/*
* Delay needed when running out of DRAM
@@ -77,20 +77,20 @@ rtems_unsigned32 Read_pci_device_register(
/*
* read data
*/
data = PCI_bus_read( (volatile rtems_unsigned32 *)SCORE603E_PCI_IO_CFG_DATA );
data = PCI_bus_read( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_DATA );
return data;
}
void Write_pci_device_register(
rtems_unsigned32 address,
rtems_unsigned32 data
uint32_t address,
uint32_t data
)
{
/*
* Write the PCI configuration address
*/
PCI_bus_write( (volatile rtems_unsigned32 *)SCORE603E_PCI_IO_CFG_ADDR, address );
PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_ADDR, address );
/*
* Delay needed when running out of DRAM
@@ -100,6 +100,6 @@ void Write_pci_device_register(
/*
* write data
*/
PCI_bus_write( (volatile rtems_unsigned32 *)SCORE603E_PCI_IO_CFG_DATA, data );
PCI_bus_write( (volatile uint32_t*)SCORE603E_PCI_IO_CFG_DATA, data );
}
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h
+8 -8
View File
@@ -20,21 +20,21 @@
*/
void PCI_bus_write(
volatile rtems_unsigned32 * _addr,
rtems_unsigned32 _data
volatile uint32_t * _addr,
uint32_t _data
);
rtems_unsigned32 PCI_bus_read(
volatile rtems_unsigned32 * _addr
uint32_t PCI_bus_read(
volatile uint32_t * _addr
);
rtems_unsigned32 Read_pci_device_register(
rtems_unsigned32 address
uint32_t Read_pci_device_register(
uint32_t address
);
void Write_pci_device_register(
rtems_unsigned32 address,
rtems_unsigned32 data
uint32_t address,
uint32_t data
);
#endif
c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
+13 -13
View File
@@ -18,10 +18,10 @@
*/
unsigned int SCORE603e_FLASH_Disable(
rtems_unsigned32 area /* IN */
uint32_t area /* IN */
)
{
rtems_unsigned8 value;
uint8_t value;
value = *SCORE603E_BOARD_CTRL_REG;
value = value | (~SCORE603E_BRD_FLASH_DISABLE_MASK);
@@ -32,10 +32,10 @@ unsigned int SCORE603e_FLASH_Disable(
unsigned int SCORE603e_FLASH_verify_enable()
{
volatile rtems_unsigned8 *Ctrl_Status_Register =
volatile uint8_t *Ctrl_Status_Register =
(void *)SCORE603E_BOARD_CTRL_REG;
rtems_unsigned8 ctrl_value;
rtems_unsigned32 pci_value;
uint8_t ctrl_value;
uint32_t pci_value;
ctrl_value = *Ctrl_Status_Register;
if ( ctrl_value & SCORE603E_BRD_FLASH_DISABLE_MASK ) {
@@ -59,13 +59,13 @@ unsigned int SCORE603e_FLASH_verify_enable()
}
unsigned int SCORE603e_FLASH_pci_reset_reg(
rtems_unsigned8 reg,
rtems_unsigned32 cmask,
rtems_unsigned32 mask
uint8_t reg,
uint32_t cmask,
uint32_t mask
)
{
rtems_unsigned32 pci_value;
rtems_unsigned32 value;
uint32_t pci_value;
uint32_t value;
pci_value = Read_pci_device_register( reg );
pci_value &= cmask;
@@ -83,11 +83,11 @@ unsigned int SCORE603e_FLASH_pci_reset_reg(
* SCORE603e_FLASH_Enable_writes
*/
unsigned int SCORE603e_FLASH_Enable_writes(
rtems_unsigned32 area /* IN */
uint32_t area /* IN */
)
{
rtems_unsigned8 ctrl_value;
rtems_unsigned32 pci_value;
uint8_t ctrl_value;
uint32_t pci_value;
ctrl_value = *SCORE603E_BOARD_CTRL_REG;
ctrl_value = ctrl_value & 0xbf;
c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
+114 -114
View File
@@ -31,108 +31,108 @@
********************************************************************/
typedef struct {
rtems_unsigned32 PCI_ID; /* 0x80030000 */
rtems_unsigned32 PCI_CSR; /* 0x80030004 */
rtems_unsigned32 PCI_CLASS; /* 0x80030008 */
rtems_unsigned32 PCI_MISC0; /* 0x8003000C */
rtems_unsigned32 PCI_BS; /* 0x80030010 */
rtems_unsigned32 Buf_0x80030014[ 0x0A ]; /* 0x80030014 */
rtems_unsigned32 PCI_MISC1; /* 0x8003003C */
rtems_unsigned32 Buf_0x80030040[ 0x30 ]; /* 0x80030040 */
rtems_unsigned32 LSI0_CTL; /* 0x80030100 */
rtems_unsigned32 LSI0_BS; /* 0x80030104 */
rtems_unsigned32 LSI0_BD; /* 0x80030108 */
rtems_unsigned32 LSI0_TO; /* 0x8003010C */
rtems_unsigned32 Buf_0x80030110; /* 0x80030110 */
rtems_unsigned32 LSI1_CTL; /* 0x80030114 */
rtems_unsigned32 LSI1_BS; /* 0x80030118 */
rtems_unsigned32 LSI1_BD; /* 0x8003011C */
rtems_unsigned32 LSI1_TO; /* 0x80030120 */
rtems_unsigned32 Buf_0x80030124; /* 0x80030124 */
rtems_unsigned32 LSI2_CTL; /* 0x80030128 */
rtems_unsigned32 LSI2_BS; /* 0x8003012C */
rtems_unsigned32 LSI2_BD; /* 0x80030130 */
rtems_unsigned32 LSI2_TO; /* 0x80030134 */
rtems_unsigned32 Buf_0x80030138; /* 0x80030138 */
rtems_unsigned32 LSI3_CTL; /* 0x8003013C */
rtems_unsigned32 LSI3_BS; /* 0x80030140 */
rtems_unsigned32 LSI3_BD; /* 0x80030144 */
rtems_unsigned32 LSI3_TO; /* 0x80030148 */
rtems_unsigned32 Buf_0x8003014C[ 0x09 ]; /* 0x8003014C */
rtems_unsigned32 SCYC_CTL; /* 0x80030170 */
rtems_unsigned32 SCYC_ADDR; /* 0x80030174 */
rtems_unsigned32 SCYC_EN; /* 0x80030178 */
rtems_unsigned32 SCYC_CMP; /* 0x8003017C */
rtems_unsigned32 SCYC_SWP; /* 0x80030180 */
rtems_unsigned32 LMISC; /* 0x80030184 */
rtems_unsigned32 SLSI; /* 0x80030188 */
rtems_unsigned32 L_CMDERR; /* 0x8003018C */
rtems_unsigned32 LAERR; /* 0x80030190 */
rtems_unsigned32 Buf_0x80030194[ 0x1B ]; /* 0x80030194 */
rtems_unsigned32 DCTL; /* 0x80030200 */
rtems_unsigned32 DTBC; /* 0x80030204 */
rtems_unsigned32 DLA; /* 0x80030208 */
rtems_unsigned32 Buf_0x8003020C; /* 0x8003020C */
rtems_unsigned32 DVA; /* 0x80030210 */
rtems_unsigned32 Buf_0x80030214; /* 0x80030214 */
rtems_unsigned32 DCPP; /* 0x80030218 */
rtems_unsigned32 Buf_0x8003021C; /* 0x8003021C */
rtems_unsigned32 DGCS; /* 0x80030220 */
rtems_unsigned32 D_LLUE; /* 0x80030224 */
rtems_unsigned32 Buf_0x80030228[ 0x36 ]; /* 0x80030228 */
rtems_unsigned32 LINT_EN; /* 0x80030300 */
rtems_unsigned32 LINT_STAT; /* 0x80030304 */
rtems_unsigned32 LINT_MAP0; /* 0x80030308 */
rtems_unsigned32 LINT_MAP1; /* 0x8003030C */
rtems_unsigned32 VINT_EN; /* 0x80030310 */
rtems_unsigned32 VINT_STAT; /* 0x80030314 */
rtems_unsigned32 VINT_MAP0; /* 0x80030318 */
rtems_unsigned32 VINT_MAP1; /* 0x8003031C */
rtems_unsigned32 STATID; /* 0x80030320 */
rtems_unsigned32 V1_STATID; /* 0x80030324 */
rtems_unsigned32 V2_STATID; /* 0x80030328 */
rtems_unsigned32 V3_STATID; /* 0x8003032C */
rtems_unsigned32 V4_STATID; /* 0x80030330 */
rtems_unsigned32 V5_STATID; /* 0x80030334 */
rtems_unsigned32 V6_STATID; /* 0x80030338 */
rtems_unsigned32 V7_STATID; /* 0x8003033C */
rtems_unsigned32 Buf_0x80030340[ 0x30 ]; /* 0x80030340 */
rtems_unsigned32 MAST_CTL; /* 0x80030400 */
rtems_unsigned32 MISC_CTL; /* 0x80030404 */
rtems_unsigned32 MISC_STAT; /* 0x80030408 */
rtems_unsigned32 USER_AM; /* 0x8003040C */
rtems_unsigned32 Buf_0x80030410[ 0x2bc ];/* 0x80030410 */
rtems_unsigned32 VSI0_CTL; /* 0x80030F00 */
rtems_unsigned32 VSI0_BS; /* 0x80030F04 */
rtems_unsigned32 VSI0_BD; /* 0x80030F08 */
rtems_unsigned32 VSI0_TO; /* 0x80030F0C */
rtems_unsigned32 Buf_0x80030f10; /* 0x80030F10 */
rtems_unsigned32 VSI1_CTL; /* 0x80030F14 */
rtems_unsigned32 VSI1_BS; /* 0x80030F18 */
rtems_unsigned32 VSI1_BD; /* 0x80030F1C */
rtems_unsigned32 VSI1_TO; /* 0x80030F20 */
rtems_unsigned32 Buf_0x80030F24; /* 0x80030F24 */
rtems_unsigned32 VSI2_CTL; /* 0x80030F28 */
rtems_unsigned32 VSI2_BS; /* 0x80030F2C */
rtems_unsigned32 VSI2_BD; /* 0x80030F30 */
rtems_unsigned32 VSI2_TO; /* 0x80030F34 */
rtems_unsigned32 Buf_0x80030F38; /* 0x80030F38 */
rtems_unsigned32 VSI3_CTL; /* 0x80030F3C */
rtems_unsigned32 VSI3_BS; /* 0x80030F40 */
rtems_unsigned32 VSI3_BD; /* 0x80030F44 */
rtems_unsigned32 VSI3_TO; /* 0x80030F48 */
rtems_unsigned32 Buf_0x80030F4C[ 0x9 ]; /* 0x80030F4C */
rtems_unsigned32 VRAI_CTL; /* 0x80030F70 */
rtems_unsigned32 VRAI_BS; /* 0x80030F74 */
rtems_unsigned32 Buf_0x80030F78[ 0x2 ]; /* 0x80030F78 */
rtems_unsigned32 VCSR_CTL; /* 0x80030F80 */
rtems_unsigned32 VCSR_TO; /* 0x80030F84 */
rtems_unsigned32 V_AMERR; /* 0x80030F88 */
rtems_unsigned32 VAERR; /* 0x80030F8C */
rtems_unsigned32 Buf_0x80030F90[ 0x19 ]; /* 0x80030F90 */
rtems_unsigned32 VCSR_CLR; /* 0x80030FF4 */
rtems_unsigned32 VCSR_SET; /* 0x80030FF8 */
rtems_unsigned32 VCSR_BS; /* 0x80030FFC */
uint32_t PCI_ID; /* 0x80030000 */
uint32_t PCI_CSR; /* 0x80030004 */
uint32_t PCI_CLASS; /* 0x80030008 */
uint32_t PCI_MISC0; /* 0x8003000C */
uint32_t PCI_BS; /* 0x80030010 */
uint32_t Buf_0x80030014[ 0x0A ]; /* 0x80030014 */
uint32_t PCI_MISC1; /* 0x8003003C */
uint32_t Buf_0x80030040[ 0x30 ]; /* 0x80030040 */
uint32_t LSI0_CTL; /* 0x80030100 */
uint32_t LSI0_BS; /* 0x80030104 */
uint32_t LSI0_BD; /* 0x80030108 */
uint32_t LSI0_TO; /* 0x8003010C */
uint32_t Buf_0x80030110; /* 0x80030110 */
uint32_t LSI1_CTL; /* 0x80030114 */
uint32_t LSI1_BS; /* 0x80030118 */
uint32_t LSI1_BD; /* 0x8003011C */
uint32_t LSI1_TO; /* 0x80030120 */
uint32_t Buf_0x80030124; /* 0x80030124 */
uint32_t LSI2_CTL; /* 0x80030128 */
uint32_t LSI2_BS; /* 0x8003012C */
uint32_t LSI2_BD; /* 0x80030130 */
uint32_t LSI2_TO; /* 0x80030134 */
uint32_t Buf_0x80030138; /* 0x80030138 */
uint32_t LSI3_CTL; /* 0x8003013C */
uint32_t LSI3_BS; /* 0x80030140 */
uint32_t LSI3_BD; /* 0x80030144 */
uint32_t LSI3_TO; /* 0x80030148 */
uint32_t Buf_0x8003014C[ 0x09 ]; /* 0x8003014C */
uint32_t SCYC_CTL; /* 0x80030170 */
uint32_t SCYC_ADDR; /* 0x80030174 */
uint32_t SCYC_EN; /* 0x80030178 */
uint32_t SCYC_CMP; /* 0x8003017C */
uint32_t SCYC_SWP; /* 0x80030180 */
uint32_t LMISC; /* 0x80030184 */
uint32_t SLSI; /* 0x80030188 */
uint32_t L_CMDERR; /* 0x8003018C */
uint32_t LAERR; /* 0x80030190 */
uint32_t Buf_0x80030194[ 0x1B ]; /* 0x80030194 */
uint32_t DCTL; /* 0x80030200 */
uint32_t DTBC; /* 0x80030204 */
uint32_t DLA; /* 0x80030208 */
uint32_t Buf_0x8003020C; /* 0x8003020C */
uint32_t DVA; /* 0x80030210 */
uint32_t Buf_0x80030214; /* 0x80030214 */
uint32_t DCPP; /* 0x80030218 */
uint32_t Buf_0x8003021C; /* 0x8003021C */
uint32_t DGCS; /* 0x80030220 */
uint32_t D_LLUE; /* 0x80030224 */
uint32_t Buf_0x80030228[ 0x36 ]; /* 0x80030228 */
uint32_t LINT_EN; /* 0x80030300 */
uint32_t LINT_STAT; /* 0x80030304 */
uint32_t LINT_MAP0; /* 0x80030308 */
uint32_t LINT_MAP1; /* 0x8003030C */
uint32_t VINT_EN; /* 0x80030310 */
uint32_t VINT_STAT; /* 0x80030314 */
uint32_t VINT_MAP0; /* 0x80030318 */
uint32_t VINT_MAP1; /* 0x8003031C */
uint32_t STATID; /* 0x80030320 */
uint32_t V1_STATID; /* 0x80030324 */
uint32_t V2_STATID; /* 0x80030328 */
uint32_t V3_STATID; /* 0x8003032C */
uint32_t V4_STATID; /* 0x80030330 */
uint32_t V5_STATID; /* 0x80030334 */
uint32_t V6_STATID; /* 0x80030338 */
uint32_t V7_STATID; /* 0x8003033C */
uint32_t Buf_0x80030340[ 0x30 ]; /* 0x80030340 */
uint32_t MAST_CTL; /* 0x80030400 */
uint32_t MISC_CTL; /* 0x80030404 */
uint32_t MISC_STAT; /* 0x80030408 */
uint32_t USER_AM; /* 0x8003040C */
uint32_t Buf_0x80030410[ 0x2bc ];/* 0x80030410 */
uint32_t VSI0_CTL; /* 0x80030F00 */
uint32_t VSI0_BS; /* 0x80030F04 */
uint32_t VSI0_BD; /* 0x80030F08 */
uint32_t VSI0_TO; /* 0x80030F0C */
uint32_t Buf_0x80030f10; /* 0x80030F10 */
uint32_t VSI1_CTL; /* 0x80030F14 */
uint32_t VSI1_BS; /* 0x80030F18 */
uint32_t VSI1_BD; /* 0x80030F1C */
uint32_t VSI1_TO; /* 0x80030F20 */
uint32_t Buf_0x80030F24; /* 0x80030F24 */
uint32_t VSI2_CTL; /* 0x80030F28 */
uint32_t VSI2_BS; /* 0x80030F2C */
uint32_t VSI2_BD; /* 0x80030F30 */
uint32_t VSI2_TO; /* 0x80030F34 */
uint32_t Buf_0x80030F38; /* 0x80030F38 */
uint32_t VSI3_CTL; /* 0x80030F3C */
uint32_t VSI3_BS; /* 0x80030F40 */
uint32_t VSI3_BD; /* 0x80030F44 */
uint32_t VSI3_TO; /* 0x80030F48 */
uint32_t Buf_0x80030F4C[ 0x9 ]; /* 0x80030F4C */
uint32_t VRAI_CTL; /* 0x80030F70 */
uint32_t VRAI_BS; /* 0x80030F74 */
uint32_t Buf_0x80030F78[ 0x2 ]; /* 0x80030F78 */
uint32_t VCSR_CTL; /* 0x80030F80 */
uint32_t VCSR_TO; /* 0x80030F84 */
uint32_t V_AMERR; /* 0x80030F88 */
uint32_t VAERR; /* 0x80030F8C */
uint32_t Buf_0x80030F90[ 0x19 ]; /* 0x80030F90 */
uint32_t VCSR_CLR; /* 0x80030FF4 */
uint32_t VCSR_SET; /* 0x80030FF8 */
uint32_t VCSR_BS; /* 0x80030FFC */
} Universe_Memory;
volatile Universe_Memory *UNIVERSE =
@@ -155,17 +155,17 @@ volatile Universe_Memory *UNIVERSE =
void initialize_universe()
{
rtems_unsigned32 jumper_selection;
rtems_unsigned32 pci_id;
uint32_t jumper_selection;
uint32_t pci_id;
#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
volatile rtems_unsigned32 universe_temp_value;
volatile uint32_t universe_temp_value;
#endif
/*
* Read the VME jumper location to determine the VME base address
*/
jumper_selection = PCI_bus_read(
(volatile rtems_unsigned32 *)SCORE603E_VME_JUMPER_ADDR );
(volatile uint32_t*)SCORE603E_VME_JUMPER_ADDR );
jumper_selection = (jumper_selection >> 3) & 0x1f;
/*
@@ -249,10 +249,10 @@ void initialize_universe()
* Slave Image 0 registers.
*/
void set_vme_base_address (
rtems_unsigned32 base_address
uint32_t base_address
)
{
volatile rtems_unsigned32 temp;
volatile uint32_t temp;
/*
* Calculate the current size of the Slave VME image 0
@@ -281,18 +281,18 @@ void set_vme_base_address (
/*
* Gets the VME base address
*/
rtems_unsigned32 get_vme_base_address ()
uint32_t get_vme_base_address ()
{
volatile rtems_unsigned32 temp;
volatile uint32_t temp;
temp = PCI_bus_read( &UNIVERSE->VSI0_BS );
temp &= 0xFFFFF000;
return (temp);
}
rtems_unsigned32 get_vme_slave_size()
uint32_t get_vme_slave_size()
{
volatile rtems_unsigned32 temp;
volatile uint32_t temp;
temp = PCI_bus_read( &UNIVERSE->VSI0_BD);
temp &= 0xFFFFF000;
temp = temp - get_vme_base_address ();
@@ -303,9 +303,9 @@ rtems_unsigned32 get_vme_slave_size()
* Set the size of the VME slave image
* Note: The maximum size is up to 24 M bytes. (00000000 - 017FFFFF)
*/
void set_vme_slave_size (rtems_unsigned32 size)
void set_vme_slave_size (uint32_t size)
{
volatile rtems_unsigned32 temp;
volatile uint32_t temp;
if (size<0)
size = 0;
c/src/lib/libbsp/powerpc/score603e/clock/clock.c
+3 -3
View File
@@ -32,13 +32,13 @@
* Clock ticks since initialization
*/
volatile rtems_unsigned32 Clock_driver_ticks;
volatile uint32_t Clock_driver_ticks;
/*
* This is the value programmed into the count down timer.
*/
rtems_unsigned32 Clock_Decrementer_value;
uint32_t Clock_Decrementer_value;
rtems_isr_entry Old_ticker;
@@ -203,7 +203,7 @@ rtems_device_driver Clock_control(
void *pargp
)
{
rtems_unsigned32 isrlevel;
uint32_t isrlevel;
rtems_libio_ioctl_args_t *args = pargp;
if (args == 0)
c/src/lib/libbsp/powerpc/score603e/console/85c30.c
+5 -5
View File
@@ -130,10 +130,10 @@ void initialize_85c30_port(
const Port_85C30_info *Port
)
{
rtems_unsigned16 value;
uint16_t value;
volatile unsigned char *ctrl;
Console_Protocol *Setup;
rtems_unsigned16 baud_constant;
uint16_t baud_constant;
Setup = Port->Protocol;
ctrl = Port->ctrl;
@@ -310,7 +310,7 @@ void outbyte_polled_85c30(
)
{
unsigned char z8530_status;
rtems_unsigned32 isrlevel;
uint32_t isrlevel;
rtems_interrupt_disable( isrlevel );
@@ -342,7 +342,7 @@ int inbyte_nonblocking_85c30(
{
volatile unsigned char *csr;
unsigned char z8530_status;
rtems_unsigned8 data;
uint8_t data;
csr = Port->ctrl;
@@ -380,7 +380,7 @@ rtems_isr ISR_85c30_Async(
const Port_85C30_info *Port
)
{
rtems_unsigned16 status;
uint16_t status;
volatile Console_Protocol *Protocol;
unsigned char data;
rtems_boolean did_something = FALSE;
c/src/lib/libbsp/powerpc/score603e/console/console.c
+4 -4
View File
@@ -81,7 +81,7 @@ void DEBUG_puts(
{
char *s;
int console;
volatile rtems_unsigned8 *csr;
volatile uint8_t *csr;
console = USE_FOR_CONSOLE;
@@ -187,7 +187,7 @@ void console_exit()
{
int i;
volatile Ring_buffer_t *buffer;
rtems_unsigned32 ch;
uint32_t ch;
for ( i=0 ; i < NUM_Z85C30_PORTS ; i++ ) {
@@ -332,7 +332,7 @@ int console_write_support(
int len)
{
int nwrite = 0;
volatile rtems_unsigned8 *csr;
volatile uint8_t *csr;
int port = minor;
/*
@@ -450,7 +450,7 @@ void console_outbyte_interrupts(
)
{
Console_Protocol *protocol;
rtems_unsigned32 isrlevel;
uint32_t isrlevel;
protocol = Port->Protocol;
c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h
+4 -4
View File
@@ -71,7 +71,7 @@ typedef enum {
} CONSOLE_Character_bits;
typedef struct {
rtems_unsigned32 baud_rate; /* baud rate value */
uint32_t baud_rate; /* baud rate value */
CONSOLE_Stop_bits stop_bits;
CONSOLE_Parity parity;
CONSOLE_Character_bits read_char_bits;
@@ -90,9 +90,9 @@ typedef struct {
* Structure used for chip level information.
*/
typedef struct {
rtems_unsigned32 vector;
rtems_unsigned32 clock_frequency;
rtems_unsigned16 clock_x;
uint32_t vector;
uint32_t clock_frequency;
uint16_t clock_x;
CONSOLE_Clock_speed clock_speed;
} Chip_85C30_info;
c/src/lib/libbsp/powerpc/score603e/include/bsp.h
+17 -17
View File
@@ -93,20 +93,20 @@ extern "C" {
#define Cause_tm27_intr() \
do { \
unsigned32 _clicks = 8; \
uint32_t _clicks = 8; \
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
} while (0)
#define Clear_tm27_intr() \
do { \
unsigned32 _clicks = 0xffffffff; \
uint32_t _clicks = 0xffffffff; \
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
} while (0)
#define Lower_tm27_intr() \
do { \
unsigned32 _msr = 0; \
uint32_t _msr = 0; \
_ISR_Set_level( 0 ); \
asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
_msr |= 0x8002; \
@@ -200,11 +200,11 @@ void data_cache_enable ();
void initialize_PCI_bridge ();
rtems_unsigned16 read_and_clear_irq ();
uint16_t read_and_clear_irq ();
void set_irq_mask(
rtems_unsigned16 value
uint16_t value
);
rtems_unsigned16 get_irq_mask();
uint16_t get_irq_mask();
/*
* universe.c
@@ -212,27 +212,27 @@ rtems_unsigned16 get_irq_mask();
void initialize_universe();
void set_irq_mask(
rtems_unsigned16 value
uint16_t value
);
rtems_unsigned16 get_irq_mask();
uint16_t get_irq_mask();
void unmask_irq(
rtems_unsigned16 irq_idx
uint16_t irq_idx
);
void init_irq_data_register();
rtems_unsigned16 read_and_clear_PMC_irq(
rtems_unsigned16 irq
uint16_t read_and_clear_PMC_irq(
uint16_t irq
);
rtems_boolean Is_PMC_IRQ(
rtems_unsigned32 pmc_irq,
rtems_unsigned16 status_word
uint32_t pmc_irq,
uint16_t status_word
);
rtems_unsigned16 read_and_clear_irq();
uint16_t read_and_clear_irq();
/*
* FPGA.c
@@ -242,11 +242,11 @@ void initialize_PCI_bridge ();
/* flash.c */
unsigned int SCORE603e_FLASH_Disable(
rtems_unsigned32 unused
uint32_t unused
);
unsigned int SCORE603e_FLASH_verify_enable();
unsigned int SCORE603e_FLASH_Enable_writes(
rtems_unsigned32 area /* Unused */
uint32_t area /* Unused */
);
#define Convert_Endian_32( _data ) \
@@ -258,7 +258,7 @@ unsigned int SCORE603e_FLASH_Enable_writes(
extern rtems_configuration_table BSP_Configuration; /* owned by BSP */
extern rtems_cpu_table Cpu_table; /* owned by BSP */
extern rtems_unsigned32 bsp_isr_level;
extern uint32_t bsp_isr_level;
#endif /* ASM */
c/src/lib/libbsp/powerpc/score603e/include/gen2.h
+15 -15
View File
@@ -32,17 +32,17 @@ extern "C" {
#define SCORE603E_TIMER_PORT_B 0xfd000008
#define SCORE603E_TIMER_PORT_A 0xfd000004
#define SCORE603E_BOARD_CTRL_REG ((volatile rtems_unsigned8 *)0xfd00002c)
#define SCORE603E_BOARD_CTRL_REG ((volatile uint8_t*)0xfd00002c)
#define SCORE603E_BRD_FLASH_DISABLE_MASK 0x40
#define SCORE603E_85C30_CTRL_0 ((volatile rtems_unsigned8 *)0xfe200020)
#define SCORE603E_85C30_DATA_0 ((volatile rtems_unsigned8 *)0xfe200024)
#define SCORE603E_85C30_CTRL_1 ((volatile rtems_unsigned8 *)0xfe200028)
#define SCORE603E_85C30_DATA_1 ((volatile rtems_unsigned8 *)0xfe20002c)
#define SCORE603E_85C30_CTRL_2 ((volatile rtems_unsigned8 *)0xfe200000)
#define SCORE603E_85C30_DATA_2 ((volatile rtems_unsigned8 *)0xfe200004)
#define SCORE603E_85C30_CTRL_3 ((volatile rtems_unsigned8 *)0xfe200008)
#define SCORE603E_85C30_DATA_3 ((volatile rtems_unsigned8 *)0xfe20000c)
#define SCORE603E_85C30_CTRL_0 ((volatile uint8_t*)0xfe200020)
#define SCORE603E_85C30_DATA_0 ((volatile uint8_t*)0xfe200024)
#define SCORE603E_85C30_CTRL_1 ((volatile uint8_t*)0xfe200028)
#define SCORE603E_85C30_DATA_1 ((volatile uint8_t*)0xfe20002c)
#define SCORE603E_85C30_CTRL_2 ((volatile uint8_t*)0xfe200000)
#define SCORE603E_85C30_DATA_2 ((volatile uint8_t*)0xfe200004)
#define SCORE603E_85C30_CTRL_3 ((volatile uint8_t*)0xfe200008)
#define SCORE603E_85C30_DATA_3 ((volatile uint8_t*)0xfe20000c)
/*
* PSC8 - PMC Card
@@ -54,11 +54,11 @@ extern "C" {
#define SCORE603E_PCI_REGISTER_BASE 0xfc000000
#define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \
((volatile rtems_unsigned32 *)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
((volatile uint32_t*)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
#define SCORE603E_PMC_SERIAL_ADDRESS( _offset ) \
((volatile rtems_unsigned8 *)(SCORE603E_PCI_REGISTER_BASE + _offset))
((volatile uint8_t*)(SCORE603E_PCI_REGISTER_BASE + _offset))
/*
* PMC serial channels - (4-7: 232 and 8-11: 422)
@@ -150,10 +150,10 @@ extern "C" {
/*
* FPGA Interupt Address Definations.
*/
#define SCORE603E_FPGA_VECT_DATA ((volatile rtems_unsigned16 *)0xfd000040)
#define SCORE603E_FPGA_BIT1_15_0 ((volatile rtems_unsigned16 *)0xfd000044)
#define SCORE603E_FPGA_MASK_DATA ((volatile rtems_unsigned16 *)0xfd000048)
#define SCORE603E_FPGA_IRQ_INPUT ((volatile rtems_unsigned16 *)0xfd00004c)
#define SCORE603E_FPGA_VECT_DATA ((volatile uint16_t*)0xfd000040)
#define SCORE603E_FPGA_BIT1_15_0 ((volatile uint16_t*)0xfd000044)
#define SCORE603E_FPGA_MASK_DATA ((volatile uint16_t*)0xfd000048)
#define SCORE603E_FPGA_IRQ_INPUT ((volatile uint16_t*)0xfd00004c)
/*
* The PMC status word is at the PMC base address
c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
+20 -20
View File
@@ -24,7 +24,7 @@
void initialize_PCI_bridge ()
{
#if (!SCORE603E_USE_DINK)
rtems_unsigned16 mask, shift, data;
uint16_t mask, shift, data;
shift = SCORE603E_85C30_0_IRQ - Score_IRQ_First;
mask = 1 << shift;
@@ -41,22 +41,22 @@ void initialize_PCI_bridge ()
}
void set_irq_mask(
rtems_unsigned16 value
uint16_t value
)
{
rtems_unsigned16 *loc;
uint16_t *loc;
loc = (rtems_unsigned16 *)SCORE603E_FPGA_MASK_DATA;
loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA;
*loc = value;
}
rtems_unsigned16 get_irq_mask()
uint16_t get_irq_mask()
{
rtems_unsigned16 *loc;
rtems_unsigned16 value;
uint16_t *loc;
uint16_t value;
loc = (rtems_unsigned16 *)SCORE603E_FPGA_MASK_DATA;
loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA;
value = *loc;
@@ -64,11 +64,11 @@ rtems_unsigned16 get_irq_mask()
}
void unmask_irq(
rtems_unsigned16 irq_idx
uint16_t irq_idx
)
{
rtems_unsigned16 value;
rtems_unsigned32 mask_idx = irq_idx;
uint16_t value;
uint32_t mask_idx = irq_idx;
value = get_irq_mask();
@@ -92,8 +92,8 @@ void unmask_irq(
void init_irq_data_register()
{
rtems_unsigned32 index;
rtems_unsigned32 i;
uint32_t index;
uint32_t i;
#if (SCORE603E_USE_DINK)
set_irq_mask( 0xffff );
@@ -109,11 +109,11 @@ void init_irq_data_register()
}
}
rtems_unsigned16 read_and_clear_PMC_irq(
rtems_unsigned16 irq
uint16_t read_and_clear_PMC_irq(
uint16_t irq
)
{
rtems_unsigned16 status_word = irq;
uint16_t status_word = irq;
status_word = (*SCORE603E_PMC_STATUS_ADDRESS);
@@ -121,8 +121,8 @@ rtems_unsigned16 read_and_clear_PMC_irq(
}
rtems_boolean Is_PMC_IRQ(
rtems_unsigned32 pmc_irq,
rtems_unsigned16 status_word
uint32_t pmc_irq,
uint16_t status_word
)
{
rtems_boolean result= FALSE;
@@ -148,9 +148,9 @@ rtems_boolean Is_PMC_IRQ(
return result;
}
rtems_unsigned16 read_and_clear_irq()
uint16_t read_and_clear_irq()
{
rtems_unsigned16 irq;
uint16_t irq;
irq = (*SCORE603E_FPGA_VECT_DATA);
c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
+19 -19
View File
@@ -52,24 +52,24 @@
typedef struct {
rtems_unsigned32 counter_1_100;
rtems_unsigned32 counter_hours;
rtems_unsigned32 counter_min;
rtems_unsigned32 counter_sec;
rtems_unsigned32 counter_month;
rtems_unsigned32 counter_date;
rtems_unsigned32 counter_year;
rtems_unsigned32 counter_day_of_week;
uint32_t counter_1_100;
uint32_t counter_hours;
uint32_t counter_min;
uint32_t counter_sec;
uint32_t counter_month;
uint32_t counter_date;
uint32_t counter_year;
uint32_t counter_day_of_week;
rtems_unsigned32 RAM_1_100;
rtems_unsigned32 RAM_hours;
rtems_unsigned32 RAM_month;
rtems_unsigned32 RAM_date;
rtems_unsigned32 RAM_year;
rtems_unsigned32 RAM_day_of_week;
uint32_t RAM_1_100;
uint32_t RAM_hours;
uint32_t RAM_month;
uint32_t RAM_date;
uint32_t RAM_year;
uint32_t RAM_day_of_week;
rtems_unsigned32 interupt_status_mask;
rtems_unsigned32 command_register;
uint32_t interupt_status_mask;
uint32_t command_register;
}Harris_RTC;
void init_RTC()
@@ -84,7 +84,7 @@ void init_RTC()
void init_PCI()
{
#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
rtems_unsigned32 value;
uint32_t value;
/*
* NOTE: Accessing any memory location not mapped by the BAT
@@ -174,7 +174,7 @@ void init_PCI()
void instruction_cache_enable ()
{
rtems_unsigned32 value;
uint32_t value;
/*
* Enable the instruction cache
@@ -189,7 +189,7 @@ void instruction_cache_enable ()
void data_cache_enable ()
{
rtems_unsigned32 value;
uint32_t value;
/*
* enable data cache
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
+13 -13
View File
@@ -29,14 +29,14 @@
extern rtems_configuration_table Configuration;
rtems_configuration_table BSP_Configuration;
rtems_cpu_table Cpu_table;
rtems_unsigned32 bsp_isr_level;
uint32_t bsp_isr_level;
/*
* Use the shared implementations of the following routines
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, unsigned32, int );
void bsp_libc_init( void *, uint32_t, int );
/*PAGE
*
@@ -49,10 +49,10 @@ void bsp_libc_init( void *, unsigned32, int );
void bsp_pretasking_hook(void)
{
extern int end;
rtems_unsigned32 heap_start;
rtems_unsigned32 heap_size;
uint32_t heap_start;
uint32_t heap_size;
heap_start = (rtems_unsigned32) &end;
heap_start = (uint32_t) &end;
if (heap_start & (CPU_ALIGNMENT-1))
heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
@@ -109,8 +109,8 @@ void bsp_predriver_hook(void)
*/
void initialize_PMC() {
volatile rtems_unsigned32 *PMC_addr;
rtems_unsigned8 data;
volatile uint32_t *PMC_addr;
uint8_t data;
#if (0) /* First Values sent */
/*
@@ -128,7 +128,7 @@ void initialize_PMC() {
/*
* Bit 0 and 1 HI cause Medium Loopback to occur.
*/
PMC_addr = (volatile rtems_unsigned32 *)
PMC_addr = (volatile uint32_t*)
SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
data = *PMC_addr;
/* *PMC_addr = data | 0x3; */
@@ -151,7 +151,7 @@ void initialize_PMC() {
PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
*PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
PMC_addr = (volatile rtems_unsigned32 *)
PMC_addr = (volatile uint32_t*)
SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
data = *PMC_addr;
*PMC_addr = data & 0xfc;
@@ -190,7 +190,7 @@ void bsp_start( void )
{
unsigned char *work_space_start;
unsigned int msr_value = 0x0000;
volatile rtems_unsigned32 *ptr;
volatile uint32_t *ptr;
rtems_bsp_delay( 1000 );
@@ -215,13 +215,13 @@ void bsp_start( void )
Code = 0x4bf00002;
for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
A_Vector = (unsigned32 *)Address;
A_Vector = (uint32_t*)Address;
Code = 0x4bf00002 + Address;
*A_Vector = Code;
}
for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
A_Vector = (unsigned32 *)Address;
A_Vector = (uint32_t*)Address;
Code = 0x4bf00002 + Address;
*A_Vector = Code;
}
@@ -248,7 +248,7 @@ void bsp_start( void )
* Override the DINK error on a Decrementor interrupt.
*/
/* org dec_vector - rfi */
ptr = (rtems_unsigned32 *)0x900;
ptr = (uint32_t*)0x900;
*ptr = 0x4c000064;
#else
c/src/lib/libbsp/powerpc/score603e/startup/genpvec.c
+8 -8
View File
@@ -47,7 +47,7 @@ typedef struct
* handlers at a later time.
*/
EE_ISR_Type ISR_Nodes [NUM_LIRQ_HANDLERS];
rtems_unsigned16 Nodes_Used;
uint16_t Nodes_Used;
Chain_Control ISR_Array [NUM_LIRQ];
/* XXX */
@@ -91,8 +91,8 @@ rtems_isr_entry set_EE_vector(
rtems_vector_number vector /* vector number */
)
{
rtems_unsigned16 vec_idx = vector - Score_IRQ_First;
rtems_unsigned32 index;
uint16_t vec_idx = vector - Score_IRQ_First;
uint32_t index;
assert (Nodes_Used < NUM_LIRQ_HANDLERS);
@@ -138,14 +138,14 @@ rtems_isr external_exception_ISR (
rtems_vector_number vector /* IN */
)
{
rtems_unsigned16 index;
uint16_t index;
EE_ISR_Type *node;
rtems_unsigned16 value;
uint16_t value;
char err_msg[100];
#if (HAS_PMC_PSC8)
rtems_unsigned16 PMC_irq;
rtems_unsigned16 check_irq;
rtems_unsigned16 status_word;
uint16_t PMC_irq;
uint16_t check_irq;
uint16_t status_word;
#endif
index = read_and_clear_irq();
c/src/lib/libbsp/powerpc/score603e/startup/spurious.c
+18 -18
View File
@@ -172,7 +172,7 @@ rtems_isr bsp_spurious_handler(
void bsp_spurious_initialize()
{
rtems_unsigned32 trap;
uint32_t trap;
for ( trap=0 ; trap < PPC_IRQ_LAST ; trap++ ) {
if (trap == PPC_IRQ_DECREMENTER)
@@ -185,70 +185,70 @@ void bsp_spurious_initialize()
void bsp_set_trap_vectors( void )
{
volatile rtems_unsigned32 *ptr;
volatile uint32_t *ptr;
/* reset_vector */
ptr = (rtems_unsigned32 *)0x00100 ;
ptr = (uint32_t*)0x00100 ;
*ptr = 0x48000000;
/* org mach_vector */
ptr = (rtems_unsigned32 *)0x00200;
ptr = (uint32_t*)0x00200;
*ptr = 0x48000000;
/* org prot_vector */
ptr = (rtems_unsigned32 *)0x00300;
ptr = (uint32_t*)0x00300;
*ptr = 0x48000000;
/* org isi_vector */
ptr = (rtems_unsigned32 *)0x00400;
ptr = (uint32_t*)0x00400;
*ptr = 0x48000000;
/* org ext_vector */
ptr = (rtems_unsigned32 *)0x0500 ;
ptr = (uint32_t*)0x0500 ;
*ptr = 0x48000000;
/* org align_vector */
ptr = (rtems_unsigned32 *)0x00600 ;
ptr = (uint32_t*)0x00600 ;
*ptr = 0x48000000;
/* org prog_vector */
ptr = (rtems_unsigned32 *)0x00700 ;
ptr = (uint32_t*)0x00700 ;
*ptr = 0x48000000;
/* org float_vector */
ptr = (rtems_unsigned32 *)0x00800;
ptr = (uint32_t*)0x00800;
*ptr = 0x48000000;
/* org dec_vector - rfi */
ptr = (rtems_unsigned32 *)0x900;
ptr = (uint32_t*)0x900;
*ptr = 0x4c000064;
/* org sys_vector */
ptr = (rtems_unsigned32 *)0x0c00 ;
ptr = (uint32_t*)0x0c00 ;
*ptr = 0x48000000;
/* org trace_vector */
ptr = (rtems_unsigned32 *)0x0d00 ;
ptr = (uint32_t*)0x0d00 ;
*ptr = 0x48000000;
/* org itm_vector */
ptr = (rtems_unsigned32 *)0x01000 ;
ptr = (uint32_t*)0x01000 ;
*ptr = 0x48000000;
/* org dltm_vector */
ptr = (rtems_unsigned32 *)0x01100 ;
ptr = (uint32_t*)0x01100 ;
*ptr = 0x48000000;
/* org dstm_vector */
ptr = (rtems_unsigned32 *)0x1200 ;
ptr = (uint32_t*)0x1200 ;
*ptr = 0x48000000;
/* org addr_vector */
ptr = (rtems_unsigned32 *)0x1300 ;
ptr = (uint32_t*)0x1300 ;
*ptr = 0x48000000;
/* org sysmgmt_vector */
ptr = (rtems_unsigned32 *)0x1400 ;
ptr = (uint32_t*)0x1400 ;
*ptr = 0x48000000;
}
c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c
+4 -4
View File
@@ -26,8 +26,8 @@ void VME_interrupt_Disable (
VME_interrupt_Mask mask /* IN */
)
{
volatile rtems_unsigned8 *VME_interrupt_enable;
rtems_unsigned8 value;
volatile uint8_t *VME_interrupt_enable;
uint8_t value;
#if 0
VME_interrupt_enable = ACC_VIE;
@@ -51,8 +51,8 @@ void VME_interrupt_Enable (
VME_interrupt_Mask mask /* IN */
)
{
volatile rtems_unsigned8 *VME_interrupt_enable;
rtems_unsigned8 value;
volatile uint8_t *VME_interrupt_enable;
uint8_t value;
#if 0
VME_interrupt_enable = ACC_VIE;
c/src/lib/libbsp/powerpc/score603e/timer/timer.c
+6 -6
View File
@@ -21,7 +21,7 @@
#include <bsp.h>
rtems_unsigned64 Timer_driver_Start_time;
uint64_t Timer_driver_Start_time;
rtems_boolean Timer_driver_Find_average_overhead;
@@ -45,9 +45,9 @@ void Timer_initialize()
int Read_timer()
{
rtems_unsigned64 clicks;
rtems_unsigned64 total64;
rtems_unsigned32 total;
uint64_t clicks;
uint64_t total64;
uint32_t total;
/* approximately CLOCK_SPEED clicks per microsecond */
@@ -57,9 +57,9 @@ int Read_timer()
total64 = clicks - Timer_driver_Start_time;
assert( total64 <= 0xffffffff ); /* fits into a unsigned32 */
assert( total64 <= 0xffffffff ); /* fits into a uint32_t */
total = (rtems_unsigned32) total64;
total = (uint32_t) total64;
if ( Timer_driver_Find_average_overhead == 1 )
return total; /* in "clicks" of the decrementer units */
c/src/lib/libbsp/powerpc/score603e/tod/tod.c
+4 -4
View File
@@ -25,12 +25,12 @@
void ICM7170_GetTOD(
volatile unsigned char *imc1770_regs,
rtems_unsigned8 icm1770_freq,
uint8_t icm1770_freq,
rtems_time_of_day *rtc_tod
);
void ICM7170_SetTOD(
volatile unsigned char *imc1770_regs,
rtems_unsigned8 icm1770_freq,
uint8_t icm1770_freq,
rtems_time_of_day *rtc_tod
);
@@ -101,7 +101,7 @@ static void ICM7170_SetField(
void ICM7170_GetTOD(
volatile unsigned char *imc1770_regs,
rtems_unsigned8 icm1770_freq,
uint8_t icm1770_freq,
rtems_time_of_day *rtc_tod
)
{
@@ -137,7 +137,7 @@ void ICM7170_GetTOD(
void ICM7170_SetTOD(
volatile unsigned char *imc1770_regs,
rtems_unsigned8 icm1770_freq,
uint8_t icm1770_freq,
rtems_time_of_day *rtc_tod
)
{