mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-08-31 16:36:35 +08:00
New (CVS import Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>'s
submission).
This commit is contained in:
Ralf Corsepius
@@ -0,0 +1,8 @@
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Makefile
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Makefile.in
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aclocal.m4
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autom4te.cache
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config.cache
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config.log
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config.status
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configure
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@@ -0,0 +1,40 @@
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2005-12-31 Ralf Corsepius <ralf.corsepius@rtems.org>
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* Makefile.am, README, bsp_specs, configure.ac,
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bestcomm/bestcomm_api.c, bestcomm/bestcomm_api.h,
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bestcomm/bestcomm_glue.c, bestcomm/bestcomm_glue.h,
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||||
bestcomm/bestcomm_priv.h, bestcomm/dma_image.c,
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bestcomm/dma_image.capi.h, bestcomm/dma_image.h,
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bestcomm/dma_image.reloc.c, bestcomm/load_task.c,
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||||
bestcomm/tasksetup_ata.c, bestcomm/tasksetup_bdtable.c,
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||||
bestcomm/tasksetup_crc16_dp_0.c, bestcomm/tasksetup_crc16_dp_1.c,
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bestcomm/tasksetup_fec_rx_bd.c, bestcomm/tasksetup_fec_tx_bd.c,
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bestcomm/tasksetup_gen_dp_0.c, bestcomm/tasksetup_gen_dp_1.c,
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bestcomm/tasksetup_gen_dp_2.c, bestcomm/tasksetup_gen_dp_3.c,
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bestcomm/tasksetup_gen_dp_bd_0.c, bestcomm/tasksetup_gen_dp_bd_1.c,
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bestcomm/tasksetup_gen_rx_bd.c, bestcomm/tasksetup_gen_tx_bd.c,
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bestcomm/tasksetup_lpc.c, bestcomm/tasksetup_pci_rx.c,
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bestcomm/tasksetup_pci_tx.c, bestcomm/include/mgt5200/mgt5200.h,
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bestcomm/include/mgt5200/sdma.h,
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bestcomm/task_api/bestcomm_api_mem.h,
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bestcomm/task_api/bestcomm_cntrl.h,
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bestcomm/task_api/tasksetup_bdtable.h,
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bestcomm/task_api/tasksetup_general.h, clock/clock.c,
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console/console.c, i2c/i2c.c, i2c/i2cdrv.c, i2c/mpc5200mbus.c,
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i2c/mpc5200mbus.h, ide/idecfg.c, ide/pcmcia_ide.c, ide/pcmcia_ide.h,
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include/bsp.h, include/coverhd.h, include/i2c.h, include/i2cdrv.h,
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include/mpc5200.h, include/raw_exception.h, include/tm27.h,
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include/u-boot.h, irq/irq.c, irq/irq.h, irq/irq_asm.S,
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irq/irq_init.c, mscan/mscan.c, mscan/mscan.h,
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network_5200/network.c, nvram/m93cxx.h, nvram/nvram.c,
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nvram/nvram.h, slicetimer/slicetimer.c, slicetimer/slicetimer.h,
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start/start.S, startup/bspstart.c, startup/cpuinit.c,
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startup/linkcmds, startup/linkcmds.pm520, tod/pcf8563.c,
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tod/pcf8563.h, tod/todcfg.c, vectors/asm_utils.S,
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vectors/raw_exception.c, vectors/vectors.S, vectors/vectors.h,
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vectors/vectors_init.c: New (CVS import submission by
|
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Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>)
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2005-12-09 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
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* Integrated gen5200 BSP to source tree
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@@ -0,0 +1,328 @@
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##
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## $Id$
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##
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ACLOCAL_AMFLAGS = -I ../../../../aclocal
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include $(top_srcdir)/../../../../automake/compile.am
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include $(top_srcdir)/../../bsp.am
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dist_project_lib_DATA = bsp_specs
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include_HEADERS = include/bsp.h include/i2cdrv.h include/u-boot.h \
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include/i2c.h include/mpc5200.h
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include_HEADERS += include/tm27.h
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nodist_include_HEADERS = include/bspopts.h
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DISTCLEANFILES = include/bspopts.h
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noinst_PROGRAMS =
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|
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include_bspdir = $(includedir)/bsp
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include_HEADERS += include/coverhd.h
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nodist_include_HEADERS += ../../shared/tod.h
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EXTRA_DIST = start/start.S
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start.$(OBJEXT): start/start.S
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$(CPPASCOMPILE) -DASM -o $@ -c $<
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project_lib_DATA = start.$(OBJEXT)
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dist_project_lib_DATA += startup/linkcmds startup/linkcmds.pm520
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|
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noinst_PROGRAMS += bestcomm.rel
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bestcomm_rel_SOURCES = ./bestcomm/bestcomm_api.c\
|
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./bestcomm/bestcomm_glue.c\
|
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./bestcomm/dma_image.c\
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./bestcomm/dma_image.reloc.c\
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./bestcomm/load_task.c\
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./bestcomm/tasksetup_ata.c\
|
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./bestcomm/tasksetup_bdtable.c\
|
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./bestcomm/tasksetup_crc16_dp_0.c\
|
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./bestcomm/tasksetup_crc16_dp_1.c\
|
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./bestcomm/tasksetup_fec_rx_bd.c\
|
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./bestcomm/tasksetup_fec_tx_bd.c\
|
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./bestcomm/tasksetup_gen_dp_0.c\
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./bestcomm/tasksetup_gen_dp_1.c\
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./bestcomm/tasksetup_gen_dp_2.c\
|
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./bestcomm/tasksetup_gen_dp_3.c\
|
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./bestcomm/tasksetup_gen_dp_bd_0.c\
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./bestcomm/tasksetup_gen_dp_bd_1.c\
|
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./bestcomm/tasksetup_gen_rx_bd.c\
|
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./bestcomm/tasksetup_gen_tx_bd.c\
|
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./bestcomm/tasksetup_lpc.c\
|
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./bestcomm/tasksetup_pci_rx.c\
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./bestcomm/tasksetup_pci_tx.c
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bestcomm_rel_CPPFLAGS = $(AM_CPPFLAGS)
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bestcomm_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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noinst_PROGRAMS += clock.rel
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clock_rel_SOURCES = clock/clock.c
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clock_rel_CPPFLAGS = $(AM_CPPFLAGS)
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clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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noinst_PROGRAMS += console.rel
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console_rel_SOURCES = console/console.c
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console_rel_CPPFLAGS = $(AM_CPPFLAGS)
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console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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noinst_PROGRAMS += i2c.rel
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i2c_rel_SOURCES = ./i2c/i2c.c \
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./i2c/i2cdrv.c \
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./i2c/mpc5200mbus.c
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i2c_rel_CPPFLAGS = $(AM_CPPFLAGS)
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i2c_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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noinst_PROGRAMS += ide.rel
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ide_rel_SOURCES = ./ide/idecfg.c ./ide/pcmcia_ide.c
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ide_rel_CPPFLAGS = $(AM_CPPFLAGS)
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ide_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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include_bsp_HEADERS = irq/irq.h include/i2cdrv.h include/mpc5200.h include/i2c.h include/u-boot.h
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noinst_PROGRAMS += irq.rel
|
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irq_rel_SOURCES = irq/irq.c irq/irq_init.c irq/irq.h irq/irq_asm.S
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irq_rel_CPPFLAGS = $(AM_CPPFLAGS)
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irq_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
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|
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|
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noinst_PROGRAMS += mscan.rel
|
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mscan_rel_SOURCES = ./mscan/mscan.c
|
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mscan_rel_CPPFLAGS = $(AM_CPPFLAGS)
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mscan_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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include_bsp_HEADERS += mscan/mscan.h
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|
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noinst_PROGRAMS += nvram.rel
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nvram_rel_SOURCES = ./nvram/nvram.c
|
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nvram_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
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nvram_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
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|
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noinst_PROGRAMS += slicetimer.rel
|
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slicetimer_rel_SOURCES = ./slicetimer/slicetimer.c
|
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slicetimer_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
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slicetimer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
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|
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noinst_PROGRAMS += tod.rel
|
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tod_rel_SOURCES = ./tod/todcfg.c ./tod/pcf8563.c ../../shared/tod.c
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tod_rel_CPPFLAGS = $(AM_CPPFLAGS)
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tod_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
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|
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include_bsp_HEADERS += vectors/vectors.h
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noinst_PROGRAMS += startup.rel
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startup_rel_SOURCES = ../../shared/bspclean.c ../../shared/bsplibc.c \
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../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
|
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../../shared/main.c ../../shared/sbrk.c \
|
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../../shared/gnatinstallhandler.c startup/cpuinit.c
|
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startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
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startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
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|
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noinst_PROGRAMS += vectors.rel
|
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vectors_rel_SOURCES = vectors/vectors_init.c vectors/vectors.h \
|
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vectors/vectors.S
|
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vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
|
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vectors_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
||||
|
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if HAS_NETWORKING
|
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network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__
|
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network_CPPFLAGS += -D__BSD_VISIBLE
|
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noinst_PROGRAMS += network.rel
|
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network_rel_SOURCES = network_5200/network.c
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network_rel_CPPFLAGS = $(AM_CPPFLAGS) $(network_CPPFLAGS)
|
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network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
|
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endif
|
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|
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noinst_LIBRARIES = libbsp.a
|
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libbsp_a_SOURCES =
|
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libbsp_a_LIBADD = bestcomm.rel clock.rel console.rel i2c.rel ide.rel irq.rel \
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mscan.rel nvram.rel slicetimer.rel tod.rel startup.rel \
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vectors.rel
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if HAS_NETWORKING
|
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libbsp_a_LIBADD += network.rel
|
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endif
|
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libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
|
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../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
|
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../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
|
||||
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
|
||||
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \
|
||||
../../../libcpu/@RTEMS_CPU@/mpc6xx/exceptions.rel
|
||||
|
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all-local: $(PREINSTALL_FILES) $(TMPINSTALL_FILES)
|
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|
||||
EXTRA_DIST += times
|
||||
|
||||
PREINSTALL_DIRS =
|
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PREINSTALL_FILES =
|
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TMPINSTALL_FILES =
|
||||
|
||||
$(PROJECT_INCLUDE)/$(dirstamp):
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)
|
||||
@: > $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/$(dirstamp): $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)/bsp
|
||||
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp): $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)/bsp/bestcomm
|
||||
@: > $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp): $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)/bsp/bestcomm/include
|
||||
@: > $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp): $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp)
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200
|
||||
@: > $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp)
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp): $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
@$(mkdir_p) $(PROJECT_INCLUDE)/bsp/bestcomm/task_api
|
||||
@: > $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp)
|
||||
|
||||
$(PROJECT_LIB)/$(dirstamp):
|
||||
@$(mkdir_p) $(PROJECT_LIB)
|
||||
@: > $(PROJECT_LIB)/$(dirstamp)
|
||||
PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
|
||||
|
||||
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
|
||||
|
||||
$(PROJECT_INCLUDE)/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/i2c.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/i2c.h
|
||||
|
||||
$(PROJECT_INCLUDE)/i2cdrv.h: include/i2cdrv.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/i2cdrv.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/i2cdrv.h
|
||||
|
||||
$(PROJECT_INCLUDE)/u-boot.h: include/u-boot.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/u-boot.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/u-boot.h
|
||||
|
||||
$(PROJECT_INCLUDE)/mpc5200.h: include/mpc5200.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc5200.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc5200.h
|
||||
|
||||
$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
|
||||
|
||||
$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
|
||||
|
||||
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
|
||||
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
|
||||
|
||||
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/vectors.h: vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/ppctypes.h: bestcomm/include/ppctypes.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/ppctypes.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_api.h: bestcomm/bestcomm_api.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_api.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_api.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_glue.h: bestcomm/bestcomm_glue.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_glue.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_glue.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_priv.h: bestcomm/bestcomm_priv.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_priv.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/bestcomm_priv.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.capi.h: bestcomm/dma_image.capi.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.capi.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.capi.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.h: bestcomm/dma_image.h $(PROJECT_INCLUDE)/bsp/bestcomm/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/dma_image.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/mgt5200.h: bestcomm/include/mgt5200/mgt5200.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/mgt5200.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/mgt5200.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/sdma.h: bestcomm/include/mgt5200/sdma.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/sdma.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/include/mgt5200/sdma.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h: bestcomm/include/ppctypes.h $(PROJECT_INCLUDE)/bsp/bestcomm/include/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/include/ppctypes.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_api_mem.h: bestcomm/task_api/bestcomm_api_mem.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_api_mem.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_api_mem.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_cntrl.h: bestcomm/task_api/bestcomm_cntrl.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_cntrl.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/bestcomm_cntrl.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_bdtable.h: bestcomm/task_api/tasksetup_bdtable.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_bdtable.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_bdtable.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_general.h: bestcomm/task_api/tasksetup_general.h $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_general.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bestcomm/task_api/tasksetup_general.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/pcmcia_ide.h: ide/pcmcia_ide.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pcmcia_ide.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcmcia_ide.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/mscan.h: mscan/mscan.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/mscan.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/mscan.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/m93cxx.h: nvram/m93cxx.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/m93cxx.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/m93cxx.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/nvram.h: nvram/nvram.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/nvram.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/nvram.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/slicetimer.h: slicetimer/slicetimer.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/slicetimer.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/slicetimer.h
|
||||
|
||||
$(PROJECT_INCLUDE)/bsp/pcf8563.h: tod/pcf8563.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pcf8563.h
|
||||
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pcf8563.h
|
||||
|
||||
|
||||
CLEANFILES = $(PREINSTALL_FILES)
|
||||
DISTCLEANFILES += $(PREINSTALL_DIRS)
|
||||
CLEANFILES += $(TMPINSTALL_FILES)
|
||||
|
||||
include $(top_srcdir)/../../../../automake/subdirs.am
|
||||
include $(top_srcdir)/../../../../automake/local.am
|
||||
@@ -0,0 +1,65 @@
|
||||
#
|
||||
# README,v 1.1 2001/10/22 14:45:58 joel Exp
|
||||
#
|
||||
|
||||
BSP NAME: gen5200
|
||||
BOARD: various boards based on MPC5200 Controller:
|
||||
MicroSys PM520 with Carrier board CR825
|
||||
BUS: N/A
|
||||
CPU FAMILY: ppc
|
||||
CPU: PowerPC MPC5200
|
||||
COPROCESSORS: Hardware FPU
|
||||
MODE: 32 bit mode, I and D cache enabled
|
||||
DEBUG MONITOR: None
|
||||
|
||||
PERIPHERALS
|
||||
===========
|
||||
TIMERS: GPT
|
||||
SERIAL PORTS: 3 PSCs
|
||||
2 CAN IFs
|
||||
1 I2C IF
|
||||
REAL-TIME CLOCK: PCF8563
|
||||
DMA: for Ethernet and CompactFlash
|
||||
VIDEO: none
|
||||
SCSI: none
|
||||
IDE: 1 CompactFlash Slot supported
|
||||
NETWORKING: 1 FEC Fast Ethernet
|
||||
|
||||
DRIVER INFORMATION
|
||||
==================
|
||||
CLOCK DRIVER: using one GPT
|
||||
IOSUPP DRIVER: none
|
||||
SHMSUPP: none
|
||||
TIMER DRIVER: Timebase register (lower 32 bits only)
|
||||
|
||||
STDIO
|
||||
=====
|
||||
PORT: PSC1
|
||||
ELECTRICAL: RS-232
|
||||
BAUD: 9600
|
||||
BITS PER CHARACTER: 8
|
||||
PARITY: None
|
||||
STOP BITS: 1
|
||||
|
||||
NOTES
|
||||
=====
|
||||
On-chip resources:
|
||||
PSC1 /dev/console /dev/tty00
|
||||
PSC2 /dev/tty01
|
||||
PSC3 /dev/tty02
|
||||
|
||||
|
||||
Board description
|
||||
-----------------
|
||||
|
||||
Clock rate: external clock: 33MHz
|
||||
Bus width: 32 bit Flash, 32 bit SDRAM
|
||||
FLASH: 8MByte
|
||||
RAM: 64MByte SDRAM
|
||||
|
||||
|
||||
Debugging/ Code loading:
|
||||
------------------------
|
||||
|
||||
Tested using the Lauterbach TRACE32 ICD debugger.
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,457 @@
|
||||
#ifndef __BESTCOMM_API_H
|
||||
#define __BESTCOMM_API_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*!
|
||||
* \file bestcomm_api.h
|
||||
*
|
||||
* Bestcomm_api.h is the only header necessary for inclusion by user
|
||||
* code. The include path the C compiler searches to find .h files
|
||||
* should contain bestcomm/capi and one of bestcomm/code_dma/image_*.
|
||||
* This second entry selects which set of BestComm tasks will be used.
|
||||
* Of course the appropriate files in image_* must also be compiled and
|
||||
* linked.
|
||||
*/
|
||||
|
||||
#include "../bestcomm/include/ppctypes.h"
|
||||
#include "../bestcomm/include/mgt5200/sdma.h"
|
||||
#include "../bestcomm/task_api/tasksetup_bdtable.h"
|
||||
#include "../bestcomm/task_api/bestcomm_cntrl.h"
|
||||
#include "../bestcomm/task_api/bestcomm_api_mem.h"
|
||||
|
||||
/*!
|
||||
* \brief TaskSetup() debugging
|
||||
*
|
||||
* Define this macro as follows for debugging printf()s to see
|
||||
* what the API receives and sets from the TaskSetupParamSet_t
|
||||
* struct. Implemented in capi/task_api/tasksetup_general.h.
|
||||
*
|
||||
* \verbatim
|
||||
* >0 : print basic debug messages
|
||||
* >=10: also print C-API interface variables
|
||||
* >=20: also print task API interface variables
|
||||
* else: do nothing
|
||||
* \endverbatim
|
||||
*/
|
||||
#define DEBUG_BESTCOMM_API 0
|
||||
|
||||
/*!
|
||||
* \brief Maximum number of tasks in the system.
|
||||
* This number is hardware-dependent and not user configuration.
|
||||
*/
|
||||
#define MAX_TASKS 16
|
||||
|
||||
/*
|
||||
* This may need to be removed in certain implementations.
|
||||
*/
|
||||
#ifndef NULL
|
||||
# define NULL ((void *)0)
|
||||
#endif /* NULL */
|
||||
|
||||
typedef sint8 TaskId;
|
||||
typedef sint32 BDIdx;
|
||||
|
||||
/*
|
||||
* Special "task IDs" for interrupt handling API functions
|
||||
*/
|
||||
/*! \brief Debug interrupt "task ID" */
|
||||
#define DEBUG_INTR_ID SDMA_INT_BIT_DBG
|
||||
|
||||
/*! \brief TEA interrupt "task ID" */
|
||||
#define TEA_INTR_ID SDMA_INT_BIT_TEA
|
||||
|
||||
/*! \brief Task start autostart enable */
|
||||
#define TASK_AUTOSTART_ENABLE 1
|
||||
|
||||
/*! \brief Task start autostart disable */
|
||||
#define TASK_AUTOSTART_DISABLE 0
|
||||
|
||||
/*! \brief Task start interrupt enable */
|
||||
#define TASK_INTERRUPT_ENABLE 1
|
||||
|
||||
/*! \brief Task start interrupt disable */
|
||||
#define TASK_INTERRUPT_DISABLE 0
|
||||
|
||||
/*
|
||||
* Buffer descriptor flags to pass to TaskBDAssign().
|
||||
*/
|
||||
/*! \brief Transmit frame done */
|
||||
#define TASK_BD_TFD (1 << SDMA_DRD_BIT_TFD)
|
||||
|
||||
/*! \brief Interrupt on frame done */
|
||||
#define TASK_BD_INT (1 << SDMA_DRD_BIT_INT)
|
||||
|
||||
/*!
|
||||
* \brief Data transfer size
|
||||
*/
|
||||
typedef enum {
|
||||
SZ_FLEX = 3, /*!< invalid for TaskSetupParamSet_t */
|
||||
SZ_UINT8 = 1, /*!< 1-byte */
|
||||
SZ_UINT16 = 2, /*!< 2-byte */
|
||||
SZ_UINT32 = 4 /*!< 4-byte */
|
||||
} Sz_t;
|
||||
|
||||
/*!
|
||||
* \brief API error codes
|
||||
*/
|
||||
typedef enum {
|
||||
TASK_ERR_NO_ERR = -1, /*!< No error */
|
||||
TASK_ERR_NO_INTR = TASK_ERR_NO_ERR,
|
||||
/*!< No interrupt */
|
||||
TASK_ERR_INVALID_ARG = -2, /*!< Invalid function argument */
|
||||
TASK_ERR_BD_RING_FULL = -3, /*!< Buffer descriptor ring full*/
|
||||
TASK_ERR_API_ALREADY_INITIALIZED
|
||||
= -4, /*!< API has already been initialized */
|
||||
TASK_ERR_SIZE_TOO_LARGE = -5, /*!< Buffer descriptor cannot support size parameter */
|
||||
TASK_ERR_BD_RING_EMPTY = -6, /*!< Buffer descriptor ring is empty*/
|
||||
TASK_ERR_BD_BUSY = -7, /*!< The buffer descriptor is in use
|
||||
by the BestComm */
|
||||
TASK_ERR_TASK_RUNNING = -8 /*!< The task is running. */
|
||||
|
||||
} TaskErr_t;
|
||||
|
||||
/*!
|
||||
* \brief BestComm initiators
|
||||
*
|
||||
* These are assigned by TaskSetup().
|
||||
*/
|
||||
typedef enum {
|
||||
|
||||
INITIATOR_ALWAYS = 0,
|
||||
INITIATOR_SCTMR_0 = 1,
|
||||
INITIATOR_SCTMR_1 = 2,
|
||||
INITIATOR_FEC_RX = 3,
|
||||
INITIATOR_FEC_TX = 4,
|
||||
INITIATOR_ATA_RX = 5,
|
||||
INITIATOR_ATA_TX = 6,
|
||||
INITIATOR_SCPCI_RX = 7,
|
||||
INITIATOR_SCPCI_TX = 8,
|
||||
INITIATOR_PSC3_RX = 9,
|
||||
INITIATOR_PSC3_TX = 10,
|
||||
INITIATOR_PSC2_RX = 11,
|
||||
INITIATOR_PSC2_TX = 12,
|
||||
INITIATOR_PSC1_RX = 13,
|
||||
INITIATOR_PSC1_TX = 14,
|
||||
INITIATOR_SCTMR_2 = 15,
|
||||
|
||||
INITIATOR_SCLPC = 16,
|
||||
INITIATOR_PSC5_RX = 17,
|
||||
INITIATOR_PSC5_TX = 18,
|
||||
INITIATOR_PSC4_RX = 19,
|
||||
INITIATOR_PSC4_TX = 20,
|
||||
INITIATOR_I2C2_RX = 21,
|
||||
INITIATOR_I2C2_TX = 22,
|
||||
INITIATOR_I2C1_RX = 23,
|
||||
INITIATOR_I2C1_TX = 24,
|
||||
INITIATOR_PSC6_RX = 25,
|
||||
INITIATOR_PSC6_TX = 26,
|
||||
INITIATOR_IRDA_RX = 25,
|
||||
INITIATOR_IRDA_TX = 26,
|
||||
INITIATOR_SCTMR_3 = 27,
|
||||
INITIATOR_SCTMR_4 = 28,
|
||||
INITIATOR_SCTMR_5 = 29,
|
||||
INITIATOR_SCTMR_6 = 30,
|
||||
INITIATOR_SCTMR_7 = 31
|
||||
|
||||
} MPC5200Initiator_t;
|
||||
|
||||
/*!
|
||||
* \brief Parameters for TaskSetup()
|
||||
*
|
||||
* All parameters can be hard-coded by the task API. Hard-coded values
|
||||
* will be changed in the struct passed to TaskSetup() for the user to
|
||||
* examine later.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32 NumBD; /*!< Number of buffer descriptors */
|
||||
|
||||
union {
|
||||
uint32 MaxBuf; /*!< Maximum buffer size */
|
||||
uint32 NumBytes; /*!< Number of bytes to transfer */
|
||||
} Size; /*!< Buffer size union for BD and non-BD tasks */
|
||||
|
||||
MPC5200Initiator_t
|
||||
Initiator; /*!< BestComm initiator (ignored if hard-wired) */
|
||||
uint32 StartAddrSrc; /*!< Address of the DMA source (e.g. a FIFO) */
|
||||
sint16 IncrSrc; /*!< Amount to increment source pointer */
|
||||
Sz_t SzSrc; /*!< Size of source data access */
|
||||
uint32 StartAddrDst; /*!< Address of the DMA destination (e.g. a FIFO) */
|
||||
sint16 IncrDst; /*!< Amount to increment data pointer */
|
||||
Sz_t SzDst; /*!< Size of destination data access */
|
||||
} TaskSetupParamSet_t;
|
||||
|
||||
/*!
|
||||
* \brief Parameters for TaskDebug()
|
||||
*
|
||||
* TaskDebug() and the contents of this data structure are yet to be
|
||||
* determined.
|
||||
*/
|
||||
typedef struct {
|
||||
int dummy; /* Some compilers don't like empty struct typedefs */
|
||||
} TaskDebugParamSet_t;
|
||||
|
||||
/*!
|
||||
* \brief Generic buffer descriptor.
|
||||
*
|
||||
* It is generally used as a pointer which should be cast to one of the
|
||||
* other BD types based on the number of buffers per descriptor.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32 Status; /*!< Status and length bits */
|
||||
} TaskBD_t;
|
||||
|
||||
/*!
|
||||
* \brief Single buffer descriptor.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32 Status; /*!< Status and length bits */
|
||||
uint32 DataPtr[1]; /*!< Pointer to data buffer */
|
||||
} TaskBD1_t;
|
||||
|
||||
/*!
|
||||
* \brief Dual buffer descriptor.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32 Status; /*!< Status and length bits */
|
||||
uint32 DataPtr[2]; /*!< Pointer to data buffers */
|
||||
} TaskBD2_t;
|
||||
|
||||
|
||||
|
||||
/***************************
|
||||
* Start of API Prototypes
|
||||
***************************/
|
||||
|
||||
#include "../bestcomm/bestcomm_priv.h"
|
||||
#include "../bestcomm/dma_image.capi.h"
|
||||
|
||||
/*!
|
||||
* \brief Initialize a single task.
|
||||
* \param TaskName Type of task to initialize. E.g. PCI transmit,
|
||||
* ethernet receive, general purpose dual-pointer.
|
||||
* Values expected can be found in the TaskName_t
|
||||
* enum defined in dma_image.capi.h.
|
||||
* \param TaskSetupParams Task-specific parameters. The user must fill out
|
||||
* the pertinent parts of a TaskSetupParamSet_t
|
||||
* data structure.
|
||||
* \returns TaskId task identification token which is a required
|
||||
* parameter for most other API functions.
|
||||
*
|
||||
* This function returns a task identification token which is a required
|
||||
* parameter for most other API functions.
|
||||
*
|
||||
* Certain values of the structure pointed to by TaskParams are set
|
||||
* as a side-effect based on task type. These may be examined after
|
||||
* a successful call to TaskSetup(). User-specified values may be
|
||||
* overridden.
|
||||
*
|
||||
* TaskId TaskSetup( TaskName_t TaskName,
|
||||
* TaskSetupParamSet_t *TaskSetupParams );
|
||||
*/
|
||||
#define TaskSetup(TaskName, TaskSetupParams) \
|
||||
TaskSetup_ ## TaskName (TaskName ## _api, TaskSetupParams)
|
||||
|
||||
const char *TaskVersion(void);
|
||||
|
||||
int TasksInitAPI(uint8 *MBarRef);
|
||||
|
||||
int TasksInitAPI_VM(uint8 *MBarRef, uint8 *MBarPhys);
|
||||
|
||||
void TasksLoadImage(sdma_regs *sdma);
|
||||
int TasksAttachImage(sdma_regs *sdma);
|
||||
|
||||
uint32 TasksGetSramOffset(void);
|
||||
void TasksSetSramOffset(uint32 sram_offset);
|
||||
|
||||
int TaskStart(TaskId taskId, uint32 autoStartEnable,
|
||||
TaskId autoStartTask, uint32 intrEnable);
|
||||
int TaskStop(TaskId taskId);
|
||||
static int TaskStatus(TaskId taskId);
|
||||
BDIdx TaskBDAssign(TaskId taskId, void *buffer0, void *buffer1,
|
||||
int size, uint32 bdFlags);
|
||||
BDIdx TaskBDRelease(TaskId taskId);
|
||||
BDIdx TaskBDReset(TaskId taskId);
|
||||
static TaskBD_t *TaskGetBD(TaskId taskId, BDIdx bd);
|
||||
static TaskBD_t *TaskGetBDRing(TaskId taskId);
|
||||
int TaskDebug(TaskId taskId, TaskDebugParamSet_t *paramSet);
|
||||
static int TaskIntClear(TaskId taskId);
|
||||
static TaskId TaskIntStatus(TaskId taskId);
|
||||
static int TaskIntPending(TaskId taskId);
|
||||
static TaskId TaskIntSource(void);
|
||||
static uint16 TaskBDInUse(TaskId taskId);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief Get the enable/disable status of a task.
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \returns Boolean true indicates enabled or false indicates disabled
|
||||
* or invalid taskId.
|
||||
*/
|
||||
static inline int TaskStatus(TaskId taskId)
|
||||
{
|
||||
return SDMA_TASK_STATUS(SDMA_TCR, taskId) & 0x8000;
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Return a pointer to a buffer descriptor at index BDIdx
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \param bd Buffer descriptor handle returned by
|
||||
* TaskBDAssign() or TaskBDRelease().
|
||||
* \returns Pointer to the requested buffer descriptor or NULL on error.
|
||||
*
|
||||
* The returned pointer should be cast to the appropriate buffer
|
||||
* descriptor type, TaskBD1_t or TaskBD2_t.
|
||||
*/
|
||||
static inline TaskBD_t *TaskGetBD(TaskId taskId, BDIdx bd)
|
||||
{
|
||||
TaskBD_t *bdTab;
|
||||
|
||||
bdTab = TaskBDIdxTable[taskId].BDTablePtr;
|
||||
if (TaskBDIdxTable[taskId].numPtr == 1) {
|
||||
return (TaskBD_t *)&(((TaskBD1_t *)bdTab)[bd]);
|
||||
} else {
|
||||
return (TaskBD_t *)&(((TaskBD2_t *)bdTab)[bd]);
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Return a pointer to the first buffer descriptor in the ring.
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \returns Pointer to the array of buffer descriptors making up the
|
||||
* ring or NULL on error.
|
||||
*
|
||||
* A device driver author may choose to use this in lieu of
|
||||
* TaskBDAssign()/TaskBDRelease() to get direct access to the
|
||||
* BD ring with the warning that the underlying data structure may change.
|
||||
* Use at one's own discretion.
|
||||
*/
|
||||
static inline TaskBD_t *TaskGetBDRing(TaskId taskId)
|
||||
{
|
||||
return TaskBDIdxTable[taskId].BDTablePtr;
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Clear the interrupt for a given BestComm task.
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \returns TASK_ERR_NO_ERR (which is not really an error) for success
|
||||
*/
|
||||
static inline int TaskIntClear(TaskId taskId)
|
||||
{
|
||||
SDMA_CLEAR_IEVENT(SDMA_INT_PEND, taskId);
|
||||
return TASK_ERR_NO_ERR; /* success */
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Get the interrupt status for a given task.
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \returns TASK_ERR_NO_INTR (which is not really an error) for no interrupt
|
||||
* pending, taskId for a regular interrupt, DEBUG_INTR_ID for
|
||||
* a debug interrupt and TEA_INTR_ID for a TEA interrupt.
|
||||
* \b Note: TaskIntStatus() may return 0, but this means that that
|
||||
* taskId 0 is interrupt pending.
|
||||
*/
|
||||
static inline TaskId TaskIntStatus(TaskId taskId)
|
||||
{
|
||||
uint32 pending;
|
||||
|
||||
pending = SDMA_INT_PENDING(SDMA_INT_PEND, SDMA_INT_MASK);
|
||||
|
||||
if (SDMA_INT_TEST(pending, taskId)) {
|
||||
return taskId;
|
||||
} else if (SDMA_INT_TEST(pending, DEBUG_INTR_ID)) {
|
||||
return DEBUG_INTR_ID;
|
||||
} else if (SDMA_INT_TEST(pending, TEA_INTR_ID)) {
|
||||
return TEA_INTR_ID;
|
||||
}
|
||||
|
||||
return TASK_ERR_NO_INTR;
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Get the interrupt pending status for a given task.
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \returns 0 if task does not have a pending interrupt. 1 if the task
|
||||
* has an interrupt pending.
|
||||
*/
|
||||
static inline int TaskIntPending(TaskId taskId)
|
||||
{
|
||||
uint32 pending;
|
||||
|
||||
pending = SDMA_INT_PENDING(SDMA_INT_PEND, SDMA_INT_MASK);
|
||||
if (SDMA_INT_TEST(pending, taskId)) {
|
||||
return 1;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Returns the task ID of an interrupting BestComm task.
|
||||
* \returns TASK_ERR_NO_INTR (which is not really an error) for no interrupt
|
||||
* pending or the taskId of the interrupting task.
|
||||
*
|
||||
* The user must query TaskIntStatus() to discover if this is a debug
|
||||
* or TEA interrupt. This function is designed for use by an operating
|
||||
* system interrupt handler.
|
||||
*/
|
||||
static inline TaskId TaskIntSource(void)
|
||||
{
|
||||
uint32 pending;
|
||||
uint32 mask = 1 << (MAX_TASKS - 1);
|
||||
TaskId i;
|
||||
|
||||
pending = SDMA_INT_PENDING(SDMA_INT_PEND, SDMA_INT_MASK);
|
||||
|
||||
if (SDMA_INT_TEST(pending, SDMA_INT_BIT_TEA)) {
|
||||
return (TaskId)SDMA_TEA_SOURCE(SDMA_INT_PEND);
|
||||
}
|
||||
|
||||
for (i = (MAX_TASKS - 1); i >= 0; --i, mask >>= 1) {
|
||||
if (pending & mask) {
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
return TASK_ERR_NO_INTR;
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief Get a count of in-use buffer descriptors.
|
||||
* \param taskId Task handle passed back from a successful TaskSetup()
|
||||
* \returns Count of the current number of BDs in use by the given task.
|
||||
*/
|
||||
static inline uint16 TaskBDInUse(TaskId taskId)
|
||||
{
|
||||
return TaskBDIdxTable[taskId].currBDInUse;
|
||||
}
|
||||
|
||||
#endif /* __BESTCOMM_API_H */
|
||||
@@ -0,0 +1,279 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: bestcomm_glue.c
|
||||
+-----------------------------------------------------------------+
|
||||
| Copyright (c) 2004-2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| this file contains glue functions to the Freescale BestComm API |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.10 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.9 2005/12/06 14:30:42 thomas
|
||||
|* updated name for peripheral register block
|
||||
|*
|
||||
|* Revision 1.8 2005/12/06 14:11:11 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
#include <rtems.h>
|
||||
#include <rtems/error.h>
|
||||
#include "../include/bsp.h"
|
||||
#include "../irq/irq.h"
|
||||
#include "../include/mpc5200.h"
|
||||
#include "../bestcomm/include/ppctypes.h" /* uint32, et. al. */
|
||||
#include "../bestcomm/dma_image.h"
|
||||
#include "../bestcomm/task_api/bestcomm_cntrl.h"
|
||||
#include "../bestcomm/bestcomm_api.h"
|
||||
#include "../bestcomm/bestcomm_glue.h"
|
||||
#include "../bestcomm/include/mgt5200/sdma.h"
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_enable
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| enable interrupt for given task number |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
int bestcomm_taskno /* task number to enable */
|
||||
)
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
{
|
||||
if (0 != ((1UL<<bestcomm_taskno) & SDMA_INT_BIT_IMPL)) {
|
||||
/*
|
||||
* valid task number
|
||||
* enable interrupt in bestcomm mask
|
||||
*/
|
||||
SDMA_INT_ENABLE(&mpc5200.IntMask,bestcomm_taskno);
|
||||
}
|
||||
}
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_disable
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| disable interrupt for given task number |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
int bestcomm_taskno /* task number to disable */
|
||||
)
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
{
|
||||
if (0 != ((1UL<<bestcomm_taskno) & SDMA_INT_BIT_IMPL)) {
|
||||
/*
|
||||
* valid task number
|
||||
* disable interrupt in bestcomm mask
|
||||
*/
|
||||
SDMA_INT_DISABLE(&mpc5200.IntMask,bestcomm_taskno);
|
||||
}
|
||||
}
|
||||
|
||||
typedef struct {
|
||||
void (*the_handler)(rtems_irq_hdl_param);
|
||||
rtems_irq_hdl_param the_param;
|
||||
} bestcomm_glue_irq_handlers_t;
|
||||
|
||||
bestcomm_glue_irq_handlers_t bestcomm_glue_irq_handlers[32];
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_install
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| install given function as bestcomm interrupt handler |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
int bestcomm_taskno, /* task number for handler */
|
||||
void (*the_handler)(rtems_irq_hdl_param), /* function to call */
|
||||
rtems_irq_hdl_param the_param
|
||||
)
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
{
|
||||
if (0 != ((1UL<<bestcomm_taskno) & SDMA_INT_BIT_IMPL)) {
|
||||
/*
|
||||
* valid task number
|
||||
* install handler
|
||||
*/
|
||||
bestcomm_glue_irq_handlers[bestcomm_taskno].the_handler = the_handler;
|
||||
bestcomm_glue_irq_handlers[bestcomm_taskno].the_param = the_param;
|
||||
}
|
||||
}
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_dispatcher
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| general bestcomm interrupt handler/dispatcher |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
rtems_irq_hdl_param handle /* irq specific handle (not used) */
|
||||
|
||||
)
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
{
|
||||
uint32_t pending;
|
||||
int curr_taskno;
|
||||
|
||||
pending = mpc5200.IntPend & ~mpc5200.IntMask;
|
||||
curr_taskno = 0;
|
||||
while (pending != 0) {
|
||||
if ((pending & (1UL<<curr_taskno)) != 0) {
|
||||
if (bestcomm_glue_irq_handlers[curr_taskno].the_handler == NULL) {
|
||||
/*
|
||||
* This should never happen. we have a pending IRQ but no handler
|
||||
* let's clear this pending bit
|
||||
*/
|
||||
SDMA_CLEAR_IEVENT(&mpc5200.IntPend,curr_taskno);
|
||||
}
|
||||
else {
|
||||
/*
|
||||
* call proper handler
|
||||
*/
|
||||
bestcomm_glue_irq_handlers[curr_taskno].the_handler
|
||||
(bestcomm_glue_irq_handlers[curr_taskno].the_param);
|
||||
}
|
||||
/*
|
||||
* clear this bit in our pending copy
|
||||
* and go to next bit
|
||||
*/
|
||||
pending &= ~(1<<curr_taskno);
|
||||
}
|
||||
curr_taskno++;
|
||||
}
|
||||
}
|
||||
|
||||
void bestcomm_glue_on(const rtems_irq_connect_data* ptr)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
void bestcomm_glue_isOn(const rtems_irq_connect_data* ptr)
|
||||
{
|
||||
/*return BSP_irq_enabled_at_cpm(ptr->name);*/
|
||||
}
|
||||
|
||||
|
||||
void bestcomm_glue_off(const rtems_irq_connect_data* ptr)
|
||||
{
|
||||
}
|
||||
|
||||
static rtems_irq_connect_data bestcomm_glue_irq_data =
|
||||
{
|
||||
|
||||
BSP_SIU_IRQ_SMARTCOMM,
|
||||
(rtems_irq_hdl) bestcomm_glue_irq_dispatcher,
|
||||
(rtems_irq_hdl_param) NULL,
|
||||
(rtems_irq_enable) bestcomm_glue_on,
|
||||
(rtems_irq_disable) bestcomm_glue_off,
|
||||
(rtems_irq_is_enabled) bestcomm_glue_isOn
|
||||
};
|
||||
|
||||
static boolean bestcomm_glue_is_initialized = FALSE;
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_init
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| initialize the bestcomm module (if not yet done): |
|
||||
| - load code |
|
||||
| - initialize registers |
|
||||
| - initialize bus arbiter |
|
||||
| - initialize interrupt control |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void /* none */
|
||||
)
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
{
|
||||
if (!bestcomm_glue_is_initialized) {
|
||||
bestcomm_glue_is_initialized = TRUE;
|
||||
/*
|
||||
* Set task bar to begin of sram
|
||||
*/
|
||||
mpc5200.taskBar = (uint32_t)(&(mpc5200.sram[0]));
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* Set core and BestComm XLB priority the same.
|
||||
*/
|
||||
mpc5200.priority_enable |= 0x5;
|
||||
mpc5200.priority = 0x77777171;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Turn off COMM bus prefetch. This affects all data movements on
|
||||
* the COMM bus. (Yes, _PE -- prefetch enable -- should probably be
|
||||
* named _PD.)
|
||||
*/
|
||||
mpc5200.PtdCntrl |= SDMA_PTDCNTRL_PE;
|
||||
|
||||
TasksInitAPI((uint8*)&mpc5200);
|
||||
|
||||
TasksLoadImage( (void *)&(mpc5200.taskBar));
|
||||
|
||||
/*
|
||||
* FIXME: initialize interrupt dispatcher
|
||||
*/
|
||||
if(!BSP_install_rtems_irq_handler (&bestcomm_glue_irq_data)) {
|
||||
rtems_panic ("Can't attach MPC5x00 BestComm interrupt handler\n");
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,122 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: bestcomm_glue.h
|
||||
+-----------------------------------------------------------------+
|
||||
| Copyright (c) 2004-2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| this file declares glue functions to the Freescale BestComm API |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.4 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.3 2005/12/06 14:11:11 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
#ifndef _BESTCOMM_GLUE_H
|
||||
#define _BESTCOMM_GLUE_H
|
||||
|
||||
#include <rtems.h>
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_enable
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| enable interrupt for given task number |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
int bestcomm_taskno /* task number to enable */
|
||||
);
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_disable
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| disable interrupt for given task number |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
int bestcomm_taskno /* task number to disable */
|
||||
);
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_irq_install
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| install given function as bestcomm interrupt handler |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
int bestcomm_taskno, /* task number for handler */
|
||||
void (*the_handler)(rtems_irq_hdl_param), /* function to call */
|
||||
rtems_irq_hdl_param the_param
|
||||
);
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
|
||||
/*=========================================================================*\
|
||||
| Function: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void bestcomm_glue_init
|
||||
(
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Purpose: |
|
||||
| initialize the bestcomm module (if not yet done): |
|
||||
| - load code |
|
||||
| - initialize registers |
|
||||
| - initialize bus arbiter |
|
||||
| - initialize interrupt control |
|
||||
+---------------------------------------------------------------------------+
|
||||
| Input Parameters: |
|
||||
\*-------------------------------------------------------------------------*/
|
||||
void /* none */
|
||||
);
|
||||
/*-------------------------------------------------------------------------*\
|
||||
| Return Value: |
|
||||
| none |
|
||||
\*=========================================================================*/
|
||||
|
||||
#endif /* _BESTCOMM_GLUE_H */
|
||||
@@ -0,0 +1,45 @@
|
||||
#ifndef __BESTCOMM_PRIV_H
|
||||
#define __BESTCOMM_PRIV_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
* Global variables necessitated by the TaskSetup_*() location in
|
||||
* separate files from the main code and the inline functions. These are
|
||||
* private data structures that should not be manipulated by API users.
|
||||
*/
|
||||
|
||||
extern uint32 SramOffsetGlobal;
|
||||
extern TaskBDIdxTable_t TaskBDIdxTable[MAX_TASKS];
|
||||
extern int TaskRunning[MAX_TASKS];
|
||||
extern sint64 MBarPhysOffsetGlobal;
|
||||
|
||||
#endif /* __BESTCOMM_PRIV_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,84 @@
|
||||
#ifndef __DMA_IMAGE_CAPI_H
|
||||
#define __DMA_IMAGE_CAPI_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
#include "../bestcomm/dma_image.h"
|
||||
|
||||
typedef enum {
|
||||
TASK_PCI_TX,
|
||||
TASK_PCI_RX,
|
||||
TASK_FEC_TX,
|
||||
TASK_FEC_RX,
|
||||
TASK_LPC,
|
||||
TASK_ATA,
|
||||
TASK_CRC16_DP_0,
|
||||
TASK_CRC16_DP_1,
|
||||
TASK_GEN_DP_0,
|
||||
TASK_GEN_DP_1,
|
||||
TASK_GEN_DP_2,
|
||||
TASK_GEN_DP_3,
|
||||
TASK_GEN_TX_BD,
|
||||
TASK_GEN_RX_BD,
|
||||
TASK_GEN_DP_BD_0,
|
||||
TASK_GEN_DP_BD_1
|
||||
} TaskName_t;
|
||||
|
||||
TaskId TaskSetup_TASK_PCI_TX (TASK_PCI_TX_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_PCI_RX (TASK_PCI_RX_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_FEC_TX (TASK_FEC_TX_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_FEC_RX (TASK_FEC_RX_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_LPC (TASK_LPC_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_ATA (TASK_ATA_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_CRC16_DP_0(TASK_CRC16_DP_0_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_CRC16_DP_1(TASK_CRC16_DP_1_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_DP_0 (TASK_GEN_DP_0_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_DP_1 (TASK_GEN_DP_1_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_DP_2 (TASK_GEN_DP_2_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_DP_3 (TASK_GEN_DP_3_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_TX_BD (TASK_GEN_TX_BD_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_RX_BD (TASK_GEN_RX_BD_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_DP_BD_0(TASK_GEN_DP_BD_0_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
TaskId TaskSetup_TASK_GEN_DP_BD_1(TASK_GEN_DP_BD_1_api_t *TaskAPI,
|
||||
TaskSetupParamSet_t *TaskSetupParams);
|
||||
|
||||
#endif /* __DMA_IMAGE_CAPI_H */
|
||||
|
||||
@@ -0,0 +1,472 @@
|
||||
#ifndef __DMA_IMAGE_H
|
||||
#define __DMA_IMAGE_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
#include "../bestcomm/include/ppctypes.h"
|
||||
|
||||
void init_dma_image_TASK_PCI_TX(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_PCI_RX(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_FEC_TX(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_FEC_RX(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_LPC(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_ATA(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_CRC16_DP_0(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_CRC16_DP_1(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_DP_0(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_DP_1(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_DP_2(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_DP_3(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_TX_BD(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_RX_BD(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_DP_BD_0(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
void init_dma_image_TASK_GEN_DP_BD_1(uint8 *vMem_taskBar, sint64 vMemOffset);
|
||||
|
||||
/* MBAR_TASK_TABLE is the first address of task table */
|
||||
#ifndef MBAR_TASK_TABLE
|
||||
#define MBAR_TASK_TABLE 0xf0008000UL
|
||||
#endif
|
||||
|
||||
/* MBAR_DMA_FREE is the first free address after task table */
|
||||
#define MBAR_DMA_FREE MBAR_TASK_TABLE + 0x00001500UL
|
||||
|
||||
/* TASK_BAR is the first address of the Entry table */
|
||||
#define TASK_BAR MBAR_TASK_TABLE + 0x00000000UL
|
||||
#define TASK_BAR_OFFSET 0x00000000UL
|
||||
|
||||
typedef struct task_info0 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[7];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrDstFIFO;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *AddrPktSizeReg;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *AddrSCStatusReg;
|
||||
volatile uint32 *Bytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_PCI_TX_api_t;
|
||||
extern TASK_PCI_TX_api_t *TASK_PCI_TX_api;
|
||||
|
||||
typedef struct task_info1 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[5];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrPktSizeReg;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *AddrSrcFIFO;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile uint32 *Bytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile uint32 *StartAddrDst;
|
||||
} TASK_PCI_RX_api_t;
|
||||
extern TASK_PCI_RX_api_t *TASK_PCI_RX_api;
|
||||
|
||||
typedef struct task_info2 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[22];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrDRD;
|
||||
volatile uint32 AddrDRDIdx;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *AddrDstFIFO;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_FEC_TX_api_t;
|
||||
extern TASK_FEC_TX_api_t *TASK_FEC_TX_api;
|
||||
|
||||
typedef struct task_info3 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[13];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *AddrSrcFIFO;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_FEC_RX_api_t;
|
||||
extern TASK_FEC_RX_api_t *TASK_FEC_RX_api;
|
||||
|
||||
typedef struct task_info4 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[4];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_LPC_api_t;
|
||||
extern TASK_LPC_api_t *TASK_LPC_api;
|
||||
|
||||
typedef struct task_info5 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[7];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_ATA_api_t;
|
||||
extern TASK_ATA_api_t *TASK_ATA_api;
|
||||
|
||||
typedef struct task_info6 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[9];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_CRC16_DP_0_api_t;
|
||||
extern TASK_CRC16_DP_0_api_t *TASK_CRC16_DP_0_api;
|
||||
|
||||
typedef struct task_info7 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[9];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_CRC16_DP_1_api_t;
|
||||
extern TASK_CRC16_DP_1_api_t *TASK_CRC16_DP_1_api;
|
||||
|
||||
typedef struct task_info8 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[4];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_GEN_DP_0_api_t;
|
||||
extern TASK_GEN_DP_0_api_t *TASK_GEN_DP_0_api;
|
||||
|
||||
typedef struct task_info9 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[4];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_GEN_DP_1_api_t;
|
||||
extern TASK_GEN_DP_1_api_t *TASK_GEN_DP_1_api;
|
||||
|
||||
typedef struct task_info10 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[4];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_GEN_DP_2_api_t;
|
||||
extern TASK_GEN_DP_2_api_t *TASK_GEN_DP_2_api;
|
||||
|
||||
typedef struct task_info11 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[4];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *Bytes;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *IterExtra;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile sint16 *IncrDstMA;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *StartAddrDst;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *StartAddrSrc;
|
||||
} TASK_GEN_DP_3_api_t;
|
||||
extern TASK_GEN_DP_3_api_t *TASK_GEN_DP_3_api;
|
||||
|
||||
typedef struct task_info12 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[8];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrDstFIFO;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile sint16 *IncrSrcMA;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_GEN_TX_BD_api_t;
|
||||
extern TASK_GEN_TX_BD_api_t *TASK_GEN_TX_BD_api;
|
||||
|
||||
typedef struct task_info13 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[7];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *AddrSrcFIFO;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_GEN_RX_BD_api_t;
|
||||
extern TASK_GEN_RX_BD_api_t *TASK_GEN_RX_BD_api;
|
||||
|
||||
typedef struct task_info14 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[7];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_GEN_DP_BD_0_api_t;
|
||||
extern TASK_GEN_DP_BD_0_api_t *TASK_GEN_DP_BD_0_api;
|
||||
|
||||
typedef struct task_info15 {
|
||||
volatile uint32 TaskNum;
|
||||
volatile uint32 *PtrStartTDT;
|
||||
volatile uint32 *PtrEndTDT;
|
||||
volatile uint32 *PtrVarTab;
|
||||
volatile uint32 *PtrFDT;
|
||||
volatile uint32 *PtrCSave;
|
||||
volatile uint32 NumDRD;
|
||||
volatile uint32 *DRD[7];
|
||||
volatile uint32 NumVar;
|
||||
volatile uint32 *var;
|
||||
volatile uint32 NumInc;
|
||||
volatile uint32 *inc;
|
||||
volatile uint8 *TaskPragma;
|
||||
volatile uint32 *AddrEnable;
|
||||
volatile sint16 *IncrBytes;
|
||||
volatile uint32 *BDTableBase;
|
||||
volatile sint16 *IncrDst;
|
||||
volatile uint32 *BDTableLast;
|
||||
volatile sint16 *IncrSrc;
|
||||
volatile uint32 *BDTableStart;
|
||||
volatile uint32 *Bytes;
|
||||
} TASK_GEN_DP_BD_1_api_t;
|
||||
extern TASK_GEN_DP_BD_1_api_t *TASK_GEN_DP_BD_1_api;
|
||||
|
||||
|
||||
#endif /* __DMA_IMAGE_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,67 @@
|
||||
#ifndef __MGT5200_MGT5200_H
|
||||
#define __MGT5200_MGT5200_H
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#define MBAR_CS 0x0000
|
||||
#define MBAR_SDRAM 0x0100
|
||||
#define MBAR_CDM 0x0200
|
||||
#define MBAR_LPC 0x0300
|
||||
#define MBAR_SCTMR 0x0400
|
||||
#define MBAR_INT_CTRL 0x0500
|
||||
#define MBAR_GPTIMER 0x0600
|
||||
#define MBAR_SLTIMER 0x0700
|
||||
#define MBAR_RTCLOCK 0x0800
|
||||
#define MBAR_MSCAN 0x0900
|
||||
#define MBAR_GPIO_STD 0x0B00
|
||||
#define MBAR_GPIO_WKUP 0x0C00
|
||||
#define MBAR_XCPCI 0x0D00
|
||||
#define MBAR_SPI 0x0F00
|
||||
#define MBAR_USB 0x1000
|
||||
#define MBAR_SDMA 0x1200
|
||||
#define MBAR_BDLC 0x1300
|
||||
#define MBAR_IR 0x1400
|
||||
#define MBAR_XLB_ARB 0x1F00
|
||||
#define MBAR_PSC1 0x2000
|
||||
#define MBAR_PSC2 0x2200
|
||||
#define MBAR_PSC3 0x2400
|
||||
#define MBAR_PSC4 0x2600
|
||||
#define MBAR_PSC5 0x2800
|
||||
#define MBAR_PSC6 0x2C00
|
||||
#define MBAR_IRDA 0x2C00
|
||||
#define MBAR_ETHERNET 0x3000
|
||||
#define MBAR_SCPCI 0x3800
|
||||
#define MBAR_ATA 0x3A00
|
||||
#define MBAR_SCLPC 0x3C00
|
||||
#define MBAR_I2C 0x3D00
|
||||
#define MBAR_SRAM 0x8000
|
||||
|
||||
#endif /* __MGT5200_MGT5200_H */
|
||||
@@ -0,0 +1,159 @@
|
||||
#ifndef __MGT5200_SDMA_H
|
||||
#define __MGT5200_SDMA_H
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
typedef struct sdma_register_set {
|
||||
volatile uint32 taskBar; /* MBAR_SDMA + 0x00 sdTpb */
|
||||
volatile uint32 currentPointer; /* MBAR_SDMA + 0x04 sdMdeComplex */
|
||||
volatile uint32 endPointer; /* MBAR_SDMA + 0x08 sdMdeComplex */
|
||||
volatile uint32 variablePointer; /* MBAR_SDMA + 0x0c sdMdeComplex */
|
||||
|
||||
volatile uint8 IntVect1; /* MBAR_SDMA + 0x10 sdPtd */
|
||||
volatile uint8 IntVect2; /* MBAR_SDMA + 0x11 sdPtd */
|
||||
volatile uint16 PtdCntrl; /* MBAR_SDMA + 0x12 sdPtd */
|
||||
|
||||
volatile uint32 IntPend; /* MBAR_SDMA + 0x14 sdPtd */
|
||||
volatile uint32 IntMask; /* MBAR_SDMA + 0x18 sdPtd */
|
||||
|
||||
volatile uint32 TCR01; /* MBAR_SDMA + 0x1c sdPtd */
|
||||
volatile uint32 TCR23; /* MBAR_SDMA + 0x20 sdPtd */
|
||||
volatile uint32 TCR45; /* MBAR_SDMA + 0x24 sdPtd */
|
||||
volatile uint32 TCR67; /* MBAR_SDMA + 0x28 sdPtd */
|
||||
volatile uint32 TCR89; /* MBAR_SDMA + 0x2c sdPtd */
|
||||
volatile uint32 TCRAB; /* MBAR_SDMA + 0x30 sdPtd */
|
||||
volatile uint32 TCRCD; /* MBAR_SDMA + 0x34 sdPtd */
|
||||
volatile uint32 TCREF; /* MBAR_SDMA + 0x38 sdPtd */
|
||||
|
||||
volatile uint8 IPR0; /* MBAR_SDMA + 0x3c sdPtd */
|
||||
volatile uint8 IPR1; /* MBAR_SDMA + 0x3d sdPtd */
|
||||
volatile uint8 IPR2; /* MBAR_SDMA + 0x3e sdPtd */
|
||||
volatile uint8 IPR3; /* MBAR_SDMA + 0x3f sdPtd */
|
||||
volatile uint8 IPR4; /* MBAR_SDMA + 0x40 sdPtd */
|
||||
volatile uint8 IPR5; /* MBAR_SDMA + 0x41 sdPtd */
|
||||
volatile uint8 IPR6; /* MBAR_SDMA + 0x42 sdPtd */
|
||||
volatile uint8 IPR7; /* MBAR_SDMA + 0x43 sdPtd */
|
||||
volatile uint8 IPR8; /* MBAR_SDMA + 0x44 sdPtd */
|
||||
volatile uint8 IPR9; /* MBAR_SDMA + 0x45 sdPtd */
|
||||
volatile uint8 IPR10; /* MBAR_SDMA + 0x46 sdPtd */
|
||||
volatile uint8 IPR11; /* MBAR_SDMA + 0x47 sdPtd */
|
||||
volatile uint8 IPR12; /* MBAR_SDMA + 0x48 sdPtd */
|
||||
volatile uint8 IPR13; /* MBAR_SDMA + 0x49 sdPtd */
|
||||
volatile uint8 IPR14; /* MBAR_SDMA + 0x4a sdPtd */
|
||||
volatile uint8 IPR15; /* MBAR_SDMA + 0x4b sdPtd */
|
||||
volatile uint8 IPR16; /* MBAR_SDMA + 0x4c sdPtd */
|
||||
volatile uint8 IPR17; /* MBAR_SDMA + 0x4d sdPtd */
|
||||
volatile uint8 IPR18; /* MBAR_SDMA + 0x4e sdPtd */
|
||||
volatile uint8 IPR19; /* MBAR_SDMA + 0x4f sdPtd */
|
||||
volatile uint8 IPR20; /* MBAR_SDMA + 0x50 sdPtd */
|
||||
volatile uint8 IPR21; /* MBAR_SDMA + 0x51 sdPtd */
|
||||
volatile uint8 IPR22; /* MBAR_SDMA + 0x52 sdPtd */
|
||||
volatile uint8 IPR23; /* MBAR_SDMA + 0x53 sdPtd */
|
||||
volatile uint8 IPR24; /* MBAR_SDMA + 0x54 sdPtd */
|
||||
volatile uint8 IPR25; /* MBAR_SDMA + 0x55 sdPtd */
|
||||
volatile uint8 IPR26; /* MBAR_SDMA + 0x56 sdPtd */
|
||||
volatile uint8 IPR27; /* MBAR_SDMA + 0x57 sdPtd */
|
||||
volatile uint8 IPR28; /* MBAR_SDMA + 0x58 sdPtd */
|
||||
volatile uint8 IPR29; /* MBAR_SDMA + 0x59 sdPtd */
|
||||
volatile uint8 IPR30; /* MBAR_SDMA + 0x5a sdPtd */
|
||||
volatile uint8 IPR31; /* MBAR_SDMA + 0x5b sdPtd */
|
||||
|
||||
volatile uint32 cReqSelect; /* MBAR_SDMA + 0x5c sdPtd */
|
||||
volatile uint32 taskSize0; /* MBAR_SDMA + 0x60 sdPtd */
|
||||
volatile uint32 taskSize1; /* MBAR_SDMA + 0x64 sdPtd */
|
||||
volatile uint32 MDEDebug; /* MBAR_SDMA + 0x68 sdMdeComplex */
|
||||
volatile uint32 ADSDebug; /* MBAR_SDMA + 0x6c sdAdsTop */
|
||||
volatile uint32 Value1; /* MBAR_SDMA + 0x70 sdDbg */
|
||||
volatile uint32 Value2; /* MBAR_SDMA + 0x74 sdDbg */
|
||||
volatile uint32 Control; /* MBAR_SDMA + 0x78 sdDbg */
|
||||
volatile uint32 Status; /* MBAR_SDMA + 0x7c sdDbg */
|
||||
volatile uint32 PTDDebug; /* MBAR_SDMA + 0x80 sdPtd */
|
||||
} sdma_regs;
|
||||
|
||||
#define SDMA_PTDCNTRL_TI 0x8000
|
||||
#define SDMA_PTDCNTRL_TEA 0x4000
|
||||
#define SDMA_PTDCNTRL_HE 0x2000
|
||||
#define SDMA_PTDCNTRL_PE 0x0001
|
||||
|
||||
#define SDMA_CREQSELECT_REQ31_MASK (~0xC0000000UL)
|
||||
#define SDMA_CREQSELECT_REQ30_MASK (~0x30000000UL)
|
||||
#define SDMA_CREQSELECT_REQ29_MASK (~0x0C000000UL)
|
||||
#define SDMA_CREQSELECT_REQ28_MASK (~0x03000000UL)
|
||||
#define SDMA_CREQSELECT_REQ27_MASK (~0x00C00000UL)
|
||||
#define SDMA_CREQSELECT_REQ26_MASK (~0x00300000UL)
|
||||
#define SDMA_CREQSELECT_REQ25_MASK (~0x000C0000UL)
|
||||
#define SDMA_CREQSELECT_REQ24_MASK (~0x00030000UL)
|
||||
#define SDMA_CREQSELECT_REQ23_MASK (~0x0000C000UL)
|
||||
#define SDMA_CREQSELECT_REQ22_MASK (~0x00003000UL)
|
||||
#define SDMA_CREQSELECT_REQ21_MASK (~0x00000C00UL)
|
||||
#define SDMA_CREQSELECT_REQ20_MASK (~0x00000300UL)
|
||||
#define SDMA_CREQSELECT_REQ19_MASK (~0x000000C0UL)
|
||||
#define SDMA_CREQSELECT_REQ18_MASK (~0x00000030UL)
|
||||
#define SDMA_CREQSELECT_REQ17_MASK (~0x0000000CUL)
|
||||
#define SDMA_CREQSELECT_REQ16_MASK (~0x00000003UL)
|
||||
|
||||
#define SDMA_CREQSELECT_REQ31_ALWAYS31 0xC0000000UL
|
||||
#define SDMA_CREQSELECT_REQ30_ALWAYS30 0x30000000UL
|
||||
#define SDMA_CREQSELECT_REQ29_ALWAYS29 0x0C000000UL
|
||||
#define SDMA_CREQSELECT_REQ28_ALWAYS28 0x03000000UL
|
||||
#define SDMA_CREQSELECT_REQ27_ALWAYS27 0x00C00000UL
|
||||
#define SDMA_CREQSELECT_REQ26_ALWAYS26 0x00300000UL
|
||||
#define SDMA_CREQSELECT_REQ25_ALWAYS25 0x000C0000UL
|
||||
#define SDMA_CREQSELECT_REQ24_ALWAYS24 0x00030000UL
|
||||
#define SDMA_CREQSELECT_REQ23_ALWAYS23 0x0000C000UL
|
||||
#define SDMA_CREQSELECT_REQ22_ALWAYS22 0x00003000UL
|
||||
#define SDMA_CREQSELECT_REQ21_ALWAYS21 0x00000C00UL
|
||||
#define SDMA_CREQSELECT_REQ20_ALWAYS20 0x00000300UL
|
||||
#define SDMA_CREQSELECT_REQ19_ALWAYS19 0x000000C0UL
|
||||
#define SDMA_CREQSELECT_REQ18_ALWAYS18 0x00000030UL
|
||||
#define SDMA_CREQSELECT_REQ17_ALWAYS17 0x0000000CUL
|
||||
#define SDMA_CREQSELECT_REQ16_ALWAYS16 0x00000003UL
|
||||
|
||||
#define SDMA_CREQSELECT_REQ31_SCTIMER7 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ30_SCTIMER6 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ29_SCTIMER5 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ28_SCTIMER4 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ27_SCTIMER3 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ26_PSC6_TX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ25_PSC6_RX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ24_I2C1_TX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ23_I2C1_RX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ22_I2C2_TX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ21_I2C2_RX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ20_PSC4_TX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ19_PSC4_RX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ18_PSC5_TX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ17_PSC5_RX 0x00000000UL
|
||||
#define SDMA_CREQSELECT_REQ16_LP 0x00000000UL
|
||||
|
||||
#define SDMA_CREQSELECT_ALWAYS30 0xC0000000UL
|
||||
|
||||
#endif /* __MGT5200_SDMA_H */
|
||||
@@ -0,0 +1,92 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifdef MPC5200_BAPI_LIBC_HEADERS
|
||||
#include <string.h>
|
||||
#endif
|
||||
|
||||
#include "../bestcomm/include/ppctypes.h"
|
||||
#include "../bestcomm/include/mgt5200/sdma.h"
|
||||
#include "../bestcomm/include/mgt5200/mgt5200.h"
|
||||
|
||||
#include "../bestcomm/dma_image.h"
|
||||
#include "../bestcomm/bestcomm_api.h"
|
||||
|
||||
#ifdef __MWERKS__
|
||||
__declspec(section ".text") extern const uint32 taskTable;
|
||||
__declspec(section ".text") extern const uint32 taskTableBytes;
|
||||
__declspec(section ".text") extern const uint32 taskTableTasks;
|
||||
__declspec(section ".text") extern const uint32 offsetEntry;
|
||||
#else
|
||||
extern const uint32 taskTable;
|
||||
extern const uint32 taskTableBytes;
|
||||
extern const uint32 taskTableTasks;
|
||||
extern const uint32 offsetEntry;
|
||||
#endif
|
||||
|
||||
typedef struct SCTDT {
|
||||
uint32 start;
|
||||
uint32 stop;
|
||||
uint32 var;
|
||||
uint32 fdt;
|
||||
uint32 rsvd1;
|
||||
uint32 rsvd2;
|
||||
uint32 context;
|
||||
uint32 litbase;
|
||||
} SCTDT_T;
|
||||
|
||||
|
||||
/*!
|
||||
* \brief Load BestComm tasks into SRAM.
|
||||
* \param sdma Base address of the BestComm register set
|
||||
*
|
||||
* The BestComm tasks must be loaded before any task can be setup,
|
||||
* enabled, etc. This might be called as part of a boot sequence before
|
||||
* any BestComm drivers are required.
|
||||
*/
|
||||
void TasksLoadImage(sdma_regs *sdma)
|
||||
{
|
||||
uint32 i;
|
||||
SCTDT_T *tt;
|
||||
|
||||
/* copy task table from source to destination */
|
||||
memcpy((void *)((uint8 *)(sdma->taskBar) - MBarPhysOffsetGlobal), (void *) &taskTable, (unsigned long) taskTableBytes);
|
||||
/* adjust addresses in task table */
|
||||
for (i=0; i < (uint32) taskTableTasks; i++) {
|
||||
tt = (SCTDT_T *)(((uint8 *)(sdma->taskBar) - MBarPhysOffsetGlobal) + (uint32) offsetEntry + (i * sizeof (SCTDT_T)));
|
||||
tt->start += sdma->taskBar;
|
||||
tt->stop += sdma->taskBar;
|
||||
tt->var += sdma->taskBar;
|
||||
tt->fdt = (sdma->taskBar & 0xFFFFFF00) + tt->fdt;
|
||||
tt->context += sdma->taskBar;
|
||||
}
|
||||
|
||||
SramOffsetGlobal = taskTableBytes;
|
||||
}
|
||||
@@ -0,0 +1,73 @@
|
||||
#ifndef __TASK_API_BESTCOMM_API_MEM_H
|
||||
#define __TASK_API_BESTCOMM_API_MEM_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "../include/mgt5200/mgt5200.h"
|
||||
|
||||
/*
|
||||
* An extern global variable is used here for the MBAR since it must
|
||||
* be passed into the API for processes that use virtual memory.
|
||||
*/
|
||||
extern uint8 *MBarGlobal;
|
||||
|
||||
#define SDMA_TASK_BAR (MBarGlobal+MBAR_SDMA+0x000)
|
||||
#define SDMA_INT_PEND (MBarGlobal+MBAR_SDMA+0x014)
|
||||
#define SDMA_INT_MASK (MBarGlobal+MBAR_SDMA+0x018)
|
||||
#define SDMA_TCR (MBarGlobal+MBAR_SDMA+0x01C)
|
||||
#define SDMA_TASK_SIZE (MBarGlobal+MBAR_SDMA+0x060)
|
||||
|
||||
#define PCI_TX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x000)
|
||||
#define PCI_TX_NTBIT (MBarGlobal+MBAR_SCPCI+0x01C)
|
||||
#define PCI_TX_FIFO (MBarGlobal+MBAR_SCPCI+0x040)
|
||||
#define PCI_TX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x045)
|
||||
#define PCI_TX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x048)
|
||||
#define PCI_TX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x04E)
|
||||
|
||||
#define PCI_RX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x080)
|
||||
#define PCI_RX_NTBIT (MBarGlobal+MBAR_SCPCI+0x09C)
|
||||
#define PCI_RX_FIFO (MBarGlobal+MBAR_SCPCI+0x0C0)
|
||||
#define PCI_RX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x0C5)
|
||||
#define PCI_RX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x0C8)
|
||||
#define PCI_RX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x0CE)
|
||||
|
||||
|
||||
#define FEC_RX_FIFO (MBarGlobal+MBAR_ETHERNET+0x184)
|
||||
#define FEC_RX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x188)
|
||||
#define FEC_RX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x18C)
|
||||
#define FEC_RX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x198)
|
||||
|
||||
#define FEC_TX_FIFO (MBarGlobal+MBAR_ETHERNET+0x1A4)
|
||||
#define FEC_TX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x1A8)
|
||||
#define FEC_TX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x1AC)
|
||||
#define FEC_TX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x1B8)
|
||||
|
||||
#endif /* __TASK_API_BESTCOMM_API_MEM_H */
|
||||
@@ -0,0 +1,280 @@
|
||||
#ifndef __TASK_API_BESTCOMM_CNTRL_H
|
||||
#define __TASK_API_BESTCOMM_CNTRL_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Defines to control SmartDMA and its tasks. These defines are used for the
|
||||
* task build process to minimize disconnects at the task/driver interface.
|
||||
******************************************************************************/
|
||||
|
||||
#define SDMA_INT_BIT_DBG 31 /* debug interrupt bit */
|
||||
#define SDMA_INT_BIT_TEA 28 /* TEA interrupt bit */
|
||||
#define SDMA_INT_BIT_TEA_TASK 24 /* lsb for TEA task number */
|
||||
#define SDMA_INT_BIT_IMPL 0x9000FFFF
|
||||
|
||||
#define SDMA_PTDCTRL_BIT_TEA 14 /* TEA detection enable bit */
|
||||
|
||||
#define SDMA_TCR_BIT_AUTO 15 /* auto start bit */
|
||||
#define SDMA_TCR_BIT_HOLD 5 /* hold initiator bit */
|
||||
|
||||
#define SDMA_STAT_BIT_ALARM 17
|
||||
#define SDMA_FIFO_ALARM_MASK 0x0020000
|
||||
|
||||
#define SDMA_DRD_BIT_TFD 27 /* mark last buffer of frame */
|
||||
#define SDMA_DRD_BIT_INT 26 /* interrupt after buffer processed */
|
||||
#define SDMA_DRD_BIT_INIT 21 /* lsb position of initiator */
|
||||
#define SDMA_DRD_MASK_FLAGS 0x0C000000 /* BD_FLAGS flag bits */
|
||||
#define SDMA_DRD_MASK_LENGTH 0x03FFFFFF /* BD_FLAGS length mask */
|
||||
#define SDMA_BD_BIT_READY 30 /* Status BD ready bit */
|
||||
#ifdef SAS_COMPILE
|
||||
#define SDMA_BD_MASK_READY constant(1<<SDMA_BD_BIT_READY)
|
||||
#else
|
||||
#define SDMA_BD_MASK_READY (1<<SDMA_BD_BIT_READY)
|
||||
#endif
|
||||
#define SDMA_BD_MASK_SIGN 0x7FFFFFFF /* task code needs Status>0 */
|
||||
|
||||
#define SDMA_PRAGMA_BIT_RSV 7 /* reserved pragma bit */
|
||||
#define SDMA_PRAGMA_BIT_PRECISE_INC 6 /* increment 0=when possible, 1=iter end */
|
||||
#define SDMA_PRAGMA_BIT_RST_ERROR_NO 5 /* don't reset errors on task enable */
|
||||
#define SDMA_PRAGMA_BIT_PACK 4 /* pack data enable */
|
||||
#define SDMA_PRAGMA_BIT_INTEGER 3 /* data alignment 0=frac(msb), 1=int(lsb) */
|
||||
#define SDMA_PRAGMA_BIT_SPECREAD 2 /* XLB speculative read enable */
|
||||
#define SDMA_PRAGMA_BIT_CW 1 /* write line buffer enable */
|
||||
#define SDMA_PRAGMA_BIT_RL 0 /* read line buffer enable */
|
||||
|
||||
#define SDMA_TASK_ENTRY_BYTES 32 /* Bytes per task in entry table */
|
||||
#define SDMA_TASK_GROUP_NUM 16 /* Number of tasks per task group */
|
||||
#define SDMA_TASK_GROUP_BYTES (SDMA_TASK_ENTRY_BYTES*SDMA_TASK_GROUP_NUM)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Task group control macros, use when TaskNum > 15
|
||||
******************************************************************************/
|
||||
#define SDMA_TASKNUM_EXT(OldTaskNum) (OldTaskNum%16)
|
||||
|
||||
#define SDMA_TASKBAR_CHANGE(sdma, OldTaskNum) { \
|
||||
sdma->taskBar += (((int)(OldTaskNum/SDMA_TASK_GROUP_NUM))*SDMA_TASK_GROUP_BYTES); \
|
||||
}
|
||||
|
||||
#define SDMA_TASKBAR_RESTORE(sdma, OldTaskNum) { \
|
||||
sdma->taskBar -= (((int)(OldTaskNum/SDMA_TASK_GROUP_NUM))*SDMA_TASK_GROUP_BYTES); \
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Task control macros
|
||||
******************************************************************************/
|
||||
#define SDMA_TASK_CFG(RegAddr, TaskNum, AutoStart, AutoStartNum) { \
|
||||
*(((uint16 *)RegAddr)+TaskNum) = (uint16)(0x0000 | \
|
||||
((AutoStart!=0)<<7) | \
|
||||
(AutoStartNum&0xF) ); \
|
||||
}
|
||||
|
||||
#define SDMA_TASK_AUTO_START(RegAddr, TaskNum, AutoStart, AutoStartNum) { \
|
||||
*(((uint16 *)RegAddr)+TaskNum) = (uint16)((*(((uint16 *)RegAddr)+TaskNum) & \
|
||||
(uint16) 0xff30) | ((uint16)(0x0000 | \
|
||||
((AutoStart!=0)<<7) | \
|
||||
(AutoStartNum&0xF)) )); \
|
||||
}
|
||||
|
||||
#define SDMA_TASK_ENABLE(RegAddr, TaskNum) { \
|
||||
*(((uint16 *)RegAddr)+TaskNum) |= (uint16)0x8000; \
|
||||
}
|
||||
|
||||
#define SDMA_TASK_DISABLE(RegAddr, TaskNum) { \
|
||||
*(((uint16 *)RegAddr)+TaskNum) &= ~(uint16)0x8000; \
|
||||
}
|
||||
|
||||
#define SDMA_TASK_STATUS(RegAddr, TaskNum) \
|
||||
*(((uint16 *)RegAddr)+TaskNum)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Interrupt control macros
|
||||
******************************************************************************/
|
||||
#define SDMA_INT_ENABLE(RegAddr, Bit) { \
|
||||
*((uint32 *)RegAddr) &= ~((uint32)(1<<Bit)); \
|
||||
}
|
||||
|
||||
#define SDMA_INT_DISABLE(RegAddr, Bit) { \
|
||||
*((uint32 *)(RegAddr)) |= ((uint32)(1<<Bit)); \
|
||||
}
|
||||
|
||||
#define SDMA_INT_SOURCE(RegPend, RegMask) \
|
||||
(*((uint32 *)(RegPend)) & (~*((uint32 *)(RegMask))) & (uint32)SDMA_INT_BIT_IMPL)
|
||||
|
||||
#define SDMA_INT_PENDING(RegPend, RegMask) \
|
||||
(*((uint32 *)(RegPend)) & (~*((uint32 *)(RegMask))))
|
||||
|
||||
#define SDMA_INT_TEST(IntSource, Bit) \
|
||||
(((uint32)IntSource) & ((uint32)(1<<Bit)))
|
||||
|
||||
/*
|
||||
* define SDMA_INT_FIND to get int bit rather than scan all bits use
|
||||
* cntlzw
|
||||
*/
|
||||
|
||||
/* Clear the IntPend bit */
|
||||
#define SDMA_CLEAR_IEVENT(RegAddr, Bit) { \
|
||||
*((uint32 *)RegAddr) = ((uint32)(1<<Bit)); \
|
||||
}
|
||||
|
||||
#define SDMA_GET_PENDINGBIT(sdma, Bit) \
|
||||
(sdma->IntPend & (uint32)(1<<Bit))
|
||||
|
||||
#define SDMA_GET_MASKBIT(sdma, Bit) \
|
||||
(sdma->IntMask & (uint32)(1<<Bit))
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* SmartDMA FIFO control macros
|
||||
******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* SmartDMA TEA detection control macros
|
||||
******************************************************************************/
|
||||
/* Enable SmartDMA TEA detection and TEA interrupt */
|
||||
#define SDMA_TEA_ENABLE(sdma) { \
|
||||
SDMA_INT_ENABLE(sdma, SDMA_INT_BIT_TEA); \
|
||||
sdma->PtdCntrl &= ~((uint32)(1<<SDMA_PTDCTRL_BIT_TEA)); \
|
||||
}
|
||||
|
||||
/* Disable SmartDMA TEA detection and TEA interrupt */
|
||||
#define SDMA_TEA_DISABLE(sdma) { \
|
||||
SDMA_INT_DISABLE(sdma, SDMA_INT_BIT_TEA); \
|
||||
sdma->PtdCntrl |= ((uint32)(1<<SDMA_PTDCTRL_BIT_TEA)); \
|
||||
}
|
||||
|
||||
/* Clear the TEA interrupt */
|
||||
#define SDMA_TEA_CLEAR(sdma) { \
|
||||
sdma->IntPend = ((uint32)(0x1F<<SDMA_INT_BIT_TEA_TASK)); \
|
||||
}
|
||||
|
||||
/* Determine which task caused a TEA on the XLB */
|
||||
#define SDMA_TEA_SOURCE(RegPend) \
|
||||
(uint32)(((*(uint32 *)RegPend)>>SDMA_INT_BIT_TEA_TASK) & 0xF)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* SmartDMA debug control macros
|
||||
******************************************************************************/
|
||||
/* Enable the SmartDMA debug unit and DBG interrupt */
|
||||
/* add sdma->dbg_regs setup? */
|
||||
#define SDMA_DBG_ENABLE(sdma) { \
|
||||
SDMA_INT_ENABLE(sdma, SDMA_INT_BIT_DBG); \
|
||||
}
|
||||
|
||||
#define SDMA_DBG_DISABLE(sdma) { \
|
||||
SDMA_INT_DISABLE(sdma, SDMA_INT_BIT_DBG); \
|
||||
}
|
||||
|
||||
/* Clear the debug interrupt */
|
||||
#define SDMA_DBG_CLEAR(sdma) { \
|
||||
SDMA_CLEAR_IEVENT(sdma, SDMA_INT_BIT_DBG); \
|
||||
}
|
||||
|
||||
#define SDMA_DBG_MDE(dst, sdma, addr) { \
|
||||
sdma->MDEDebug = addr; \
|
||||
dst = sdma->MDEDebug; \
|
||||
}
|
||||
|
||||
#define SDMA_DBG_ADS(dst, sdma, addr) { \
|
||||
sdma->ADSDebug = addr; \
|
||||
dst = sdma->ADSDebug; \
|
||||
}
|
||||
|
||||
#define SDMA_DBG_PTD(dst, sdma, addr) { \
|
||||
sdma->PTDDebug = addr; \
|
||||
dst = sdma->PTDDebug; \
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Initiator control macros
|
||||
******************************************************************************/
|
||||
|
||||
/* This macro may not work, getting compile errors */
|
||||
/* Set the Transfer Size */
|
||||
/* Note that masking the size w/ 0x3 gives the desired value for uint32 */
|
||||
/* (expressed as 4), namely 0. */
|
||||
#define SDMA_SET_SIZE(RegAddr, TaskNum, SrcSize, DstSize) \
|
||||
*(((uint8 *)RegAddr)+((uint32)(TaskNum/2))) = \
|
||||
(uint8)((*(((uint8 *)RegAddr)+((uint32)(TaskNum/2))) & \
|
||||
((TaskNum%2) ? 0xf0 : 0x0f)) | \
|
||||
((uint8)(((SrcSize & 0x3)<<2) | \
|
||||
( DstSize & 0x3 ) ) <<(4*((int)(1-(TaskNum%2))))));
|
||||
|
||||
/* This macro may not work */
|
||||
/* Set the Initiator in TCR */
|
||||
#define SDMA_SET_INIT(RegAddr, TaskNum, Initiator) \
|
||||
{ \
|
||||
*(((uint16 *)RegAddr)+TaskNum) &= (uint16)0xE0FF; \
|
||||
*(((uint16 *)RegAddr)+TaskNum) |= (((0x01F & Initiator)<<8) | \
|
||||
(0<<SDMA_TCR_BIT_HOLD)); \
|
||||
}
|
||||
|
||||
/* Change DRD initiator number */
|
||||
#define SDMA_INIT_CHANGE(task, oldInitiator, newInitiator) { \
|
||||
int i; \
|
||||
for (i=0; i<task->NumDRD; i++) { \
|
||||
if (SDMA_INIT_READ(task->DRD[i]) == (uint32)oldInitiator) { \
|
||||
SDMA_INIT_WRITE(task->DRD[i],newInitiator); \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
/* Set the Initiator Priority */
|
||||
#define SDMA_SET_INITIATOR_PRIORITY(sdma, initiator, priority) \
|
||||
*(((uint8 *)&sdma->IPR0)+initiator) = priority;
|
||||
|
||||
|
||||
/* Read DRD initiator number */
|
||||
#define SDMA_INIT_READ(PtrDRD) \
|
||||
(((*(uint32 *)PtrDRD)>>SDMA_DRD_BIT_INIT) & (uint32)0x1F)
|
||||
|
||||
/* Write DRD initiator number */
|
||||
#define SDMA_INIT_WRITE(PtrDRD, Initiator) { \
|
||||
*(uint32 *)PtrDRD = ((*(uint32 *)PtrDRD) & 0xFC1FFFFF) | \
|
||||
(Initiator<<SDMA_DRD_BIT_INIT); \
|
||||
}
|
||||
|
||||
/* Change DRD initiator number */
|
||||
#define SDMA_INIT_CHANGE(task, oldInitiator, newInitiator) { \
|
||||
int i; \
|
||||
for (i=0; i<task->NumDRD; i++) { \
|
||||
if (SDMA_INIT_READ(task->DRD[i]) == (uint32)oldInitiator) { \
|
||||
SDMA_INIT_WRITE(task->DRD[i],newInitiator); \
|
||||
} \
|
||||
} \
|
||||
}
|
||||
|
||||
#endif /* __TASK_API_BESTCOMM_CNTRL_H */
|
||||
@@ -0,0 +1,92 @@
|
||||
#ifndef __TASK_API_TASKSETUP_BDTABLE_H
|
||||
#define __TASK_API_TASKSETUP_BDTABLE_H 1
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
* Table of BD rings for all BestComm tasks indexed by task ID.
|
||||
*
|
||||
* +-----+------+--------------+ +------+-------+
|
||||
* 0: |numBD|numPtr|BDTablePtr ---|--->|status|dataPtr|
|
||||
* +-----+------+--------------+ +------+-------+
|
||||
* 1: |numBD|numPtr|BDTablePtr | |status|dataPtr|
|
||||
* +-----+------+--------------+ . . .
|
||||
* 2: |numBD|numPtr|BDTablePtr ---|-+ . . .
|
||||
* . . . | . . .
|
||||
* . . . | |status|dataPtr|
|
||||
* . . . | +------+-------+
|
||||
* 15:|numBD|numPtr|BDTablePtr | |
|
||||
* +-----+------+--------------+ |
|
||||
* |
|
||||
* V
|
||||
* +------+--------+--------+
|
||||
* |status|dataPtr0|dataPtr1|
|
||||
* +------+--------+--------+
|
||||
* |status|dataPtr0|dataPtr1|
|
||||
* . . . .
|
||||
* . . . .
|
||||
* . . . .
|
||||
* |status|dataPtr0|dataPtr1|
|
||||
* +------+--------+--------+
|
||||
*/
|
||||
typedef struct {
|
||||
uint16 numBD; /* Size of BD ring */
|
||||
uint8 numPtr; /* Number of data buffer pointers per BD */
|
||||
uint8 apiConfig; /* API configuration flags */
|
||||
void *BDTablePtr; /* Pointer to BD tables, must be cast to TaskBD1_t */
|
||||
/* or TaskBD2_t */
|
||||
volatile uint32
|
||||
*BDStartPtr; /* Task's current BD pointer. This pointer is
|
||||
* used to set a task's BD pointer upon startup.
|
||||
* It is only valid for BD tasks and only after
|
||||
* TaskSetup() or TaskBDReset() are called. You
|
||||
* cannot use this to track a task's BD pointer.
|
||||
*/
|
||||
uint16 currBDInUse; /* Current number of buffer descriptors assigned but*/
|
||||
/* not released yet. */
|
||||
} TaskBDIdxTable_t;
|
||||
|
||||
typedef enum {
|
||||
API_CONFIG_NONE = 0x00,
|
||||
API_CONFIG_BD_FLAG = 0x01
|
||||
} ApiConfig_t;
|
||||
|
||||
/*
|
||||
* Allocates BD table if needed and updates the BD index table.
|
||||
* Do we want to hide this from the C API since it operates on task API?
|
||||
*/
|
||||
void TaskSetup_BDTable(volatile uint32 *BasePtr,
|
||||
volatile uint32 *LastPtr,
|
||||
volatile uint32 *StartPtr,
|
||||
int TaskNum, uint32 NumBD, uint16 MaxBD,
|
||||
uint8 NumPtr, ApiConfig_t ApiConfig, uint32 Status );
|
||||
|
||||
#endif /* __TASK_API_TASKSETUP_BDTABLE_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_ATA
|
||||
#define TASK_API TASK_ATA_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_ATA
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 4
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,126 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2004 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included
|
||||
* in all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Filename: $Source$
|
||||
* Author: $Author$
|
||||
* Locker: $Locker$
|
||||
* State: $State$
|
||||
* Revision: $Revision$
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "../bestcomm/bestcomm_api.h"
|
||||
#include "../bestcomm/task_api/tasksetup_bdtable.h"
|
||||
#include "../bestcomm/include/mgt5200/mgt5200.h"
|
||||
|
||||
#ifdef __MWERKS__
|
||||
__declspec(section ".text") extern const uint32 taskTable;
|
||||
__declspec(section ".text") extern const uint32 taskTableBytes;
|
||||
__declspec(section ".text") extern const uint32 taskTableTasks;
|
||||
__declspec(section ".text") extern const uint32 offsetEntry;
|
||||
#else
|
||||
extern const uint32 taskTable;
|
||||
extern const uint32 taskTableBytes;
|
||||
extern const uint32 taskTableTasks;
|
||||
extern const uint32 offsetEntry;
|
||||
#endif
|
||||
|
||||
TaskBDIdxTable_t TaskBDIdxTable[MAX_TASKS];
|
||||
|
||||
static uint8 *TaskTableFree = 0;
|
||||
|
||||
void TaskSetup_BDTable(volatile uint32 *BasePtr, volatile uint32 *LastPtr, volatile uint32 *StartPtr,
|
||||
int TaskNum, uint32 NumBD, uint16 MaxBD,
|
||||
uint8 NumPtr, ApiConfig_t ApiConfig, uint32 Status)
|
||||
{
|
||||
int i, j;
|
||||
uint32 *ptr;
|
||||
|
||||
/*
|
||||
* If another process has not used SRAM already, then the start value
|
||||
* will have to be passed in using the TasksSetSramOffset() function.
|
||||
*/
|
||||
if (SramOffsetGlobal == 0) {
|
||||
SramOffsetGlobal = taskTableBytes;
|
||||
}
|
||||
|
||||
TaskTableFree = MBarGlobal + MBAR_SRAM + SramOffsetGlobal;
|
||||
|
||||
/*
|
||||
* First time through the Buffer Descriptor table configuration
|
||||
* set the buffer descriptor table with parameters that will not
|
||||
* change since they are determined by the task itself. The
|
||||
* SramOffsetGlobal variable must be updated to reflect the new SRAM
|
||||
* space used by the buffer descriptor table. The next time through
|
||||
* this function (i.e. TaskSetup called again) the only parameters
|
||||
* that should be changed are the LastPtr pointers and the NumBD part
|
||||
* of the table.
|
||||
*/
|
||||
if (TaskBDIdxTable[TaskNum].BDTablePtr == 0) {
|
||||
TaskBDIdxTable[TaskNum].BDTablePtr = TaskTableFree;
|
||||
TaskBDIdxTable[TaskNum].numPtr = NumPtr;
|
||||
TaskBDIdxTable[TaskNum].apiConfig = ApiConfig;
|
||||
TaskBDIdxTable[TaskNum].BDStartPtr = StartPtr;
|
||||
|
||||
*StartPtr = *BasePtr = (uint32)((uint32)TaskBDIdxTable[TaskNum].BDTablePtr
|
||||
+ MBarPhysOffsetGlobal);
|
||||
|
||||
switch (NumPtr) {
|
||||
case 1:
|
||||
SramOffsetGlobal += MaxBD*sizeof(TaskBD1_t);
|
||||
break;
|
||||
case 2:
|
||||
SramOffsetGlobal += MaxBD*sizeof(TaskBD2_t);
|
||||
break;
|
||||
default:
|
||||
/* error */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
TaskBDIdxTable[TaskNum].currBDInUse = 0;
|
||||
TaskBDIdxTable[TaskNum].numBD = (uint16)NumBD;
|
||||
switch (NumPtr) {
|
||||
case 1:
|
||||
*LastPtr = (uint32)(*BasePtr + sizeof(TaskBD1_t) * (NumBD - 1));
|
||||
break;
|
||||
case 2:
|
||||
*LastPtr = (uint32)(*BasePtr + sizeof(TaskBD2_t) * (NumBD - 1));
|
||||
break;
|
||||
default:
|
||||
/* error */
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set the status bits. Clear the data pointers.
|
||||
*/
|
||||
if (MaxBD > 0) {
|
||||
ptr = TaskBDIdxTable[TaskNum].BDTablePtr;
|
||||
for (i = 0; i < NumBD; i++) {
|
||||
*(ptr++) = Status;
|
||||
for (j = 0; j < NumPtr; j++) {
|
||||
*(ptr++) = 0x0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_CRC16_DP_0
|
||||
#define TASK_API TASK_CRC16_DP_0_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_CRC16_DP_0
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_CRC16_DP_1
|
||||
#define TASK_API TASK_CRC16_DP_1_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_CRC16_DP_1
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,39 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_FEC_RX
|
||||
#define TASK_API TASK_FEC_RX_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_FEC_RX
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
#define MISALIGNED_START 1
|
||||
|
||||
#define INITIATOR_DATA INITIATOR_FEC_RX
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 256
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 0
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,39 @@
|
||||
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_FEC_TX
|
||||
#define TASK_API TASK_FEC_TX_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_FEC_TX
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
#define MISALIGNED_START 1
|
||||
|
||||
#define INITIATOR_DATA INITIATOR_FEC_TX
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 256
|
||||
#define BD_FLAG 1
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 0
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_DP_0
|
||||
#define TASK_API TASK_GEN_DP_0_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_DP_0
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_DP_1
|
||||
#define TASK_API TASK_GEN_DP_1_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_DP_1
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_DP_2
|
||||
#define TASK_API TASK_GEN_DP_2_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_DP_2
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_DP_3
|
||||
#define TASK_API TASK_GEN_DP_3_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_DP_3
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_DP_BD_0
|
||||
#define TASK_API TASK_GEN_DP_BD_0_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_DP_BD_0
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 128
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_DP_BD_1
|
||||
#define TASK_API TASK_GEN_DP_BD_1_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_DP_BD_1
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 32
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_RX_BD
|
||||
#define TASK_API TASK_GEN_RX_BD_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_RX_BD
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 64
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 0
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_GEN_TX_BD
|
||||
#define TASK_API TASK_GEN_TX_BD_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_GEN_TX_BD
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -1
|
||||
#define ITERATIONS -1
|
||||
|
||||
#define MAX_BD 64
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 0
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_LPC
|
||||
#define TASK_API TASK_LPC_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_LPC
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 0
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 1
|
||||
|
||||
#define INITIATOR_DATA -1
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 1
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_PCI_RX
|
||||
#define TASK_API TASK_PCI_RX_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_PCI_RX
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 1
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
|
||||
#define INITIATOR_DATA INITIATOR_SCPCI_RX
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 0
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 0
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 1
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,38 @@
|
||||
|
||||
/*
|
||||
* Generated by GUI, one per configured tasks.
|
||||
*/
|
||||
|
||||
#define TASK_BASE TASK_PCI_TX
|
||||
#define TASK_API TASK_PCI_TX_api_t
|
||||
#define TASKSETUP_NAME TaskSetup_TASK_PCI_TX
|
||||
|
||||
/* Pragma settings */
|
||||
#define PRECISE_INC 0
|
||||
#define NO_ERROR_RST 0
|
||||
#define PACK_DATA 0
|
||||
#define INTEGER_MODE 1
|
||||
#define SPEC_READS 1
|
||||
#define WRITE_LINE_BUFFER 1
|
||||
#define READ_LINE_BUFFER 1
|
||||
|
||||
#define MISALIGNED 0
|
||||
|
||||
#define INITIATOR_DATA INITIATOR_SCPCI_TX
|
||||
|
||||
#define AUTO_START -2
|
||||
#define ITERATIONS 0
|
||||
|
||||
#define MAX_BD 0
|
||||
#define BD_FLAG 0
|
||||
|
||||
#define INCR_TYPE_SRC 1
|
||||
#define INCR_SRC 0
|
||||
#define TYPE_SRC FLEX_T
|
||||
|
||||
#define INCR_TYPE_DST 0
|
||||
#define INCR_DST 0
|
||||
#define TYPE_DST FLEX_T
|
||||
|
||||
#include "../bestcomm/task_api/tasksetup_general.h"
|
||||
|
||||
@@ -0,0 +1,22 @@
|
||||
%rename lib old_lib
|
||||
%rename endfile old_endfile
|
||||
%rename startfile old_startfile
|
||||
%rename link old_link
|
||||
|
||||
*lib:
|
||||
%{!qrtems: %(old_lib)} %{!nostdlib: %{qrtems: --start-group \
|
||||
%{!qrtems_debug: -lrtemsbsp -lrtemscpu} %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \
|
||||
-lc -lgcc --end-group \
|
||||
%{!qnolinkcmds: -T linkcmds%s}}}
|
||||
|
||||
*startfile:
|
||||
%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s \
|
||||
%{!qrtems_debug: start.o%s} \
|
||||
%{qrtems_debug: start_g.o%s}}}
|
||||
|
||||
*endfile:
|
||||
%{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s}
|
||||
|
||||
*link:
|
||||
%{!qrtems: %(old_link)} %{qrtems: -dc -dp -u __vectors -N -u start -e start}
|
||||
|
||||
@@ -0,0 +1,474 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: clock.c
|
||||
+-----------------------------------------------------------------+
|
||||
| Partially based on the code references which are named below. |
|
||||
| Adaptions, modifications, enhancements and any recent parts of |
|
||||
| the code are: |
|
||||
| Copyright (c) 2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| this file contains the clock driver functions |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.9 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.8 2005/12/06 14:30:42 thomas
|
||||
|* updated name for peripheral register block
|
||||
|*
|
||||
|* Revision 1.7 2005/12/06 14:11:11 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* Module: clock.c */
|
||||
/* Date: 07/17/2003 */
|
||||
/* Purpose: RTEMS MPC5x00 clock driver */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Description: Use one of the GPTs for time base generation */
|
||||
/* instead of the decrementer. The routine initializes */
|
||||
/* the General Purpose Timer GPT6 on the MPC5x00. */
|
||||
/* The tick frequency is specified by the bsp. */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Code */
|
||||
/* References: Clock driver for PPC403 */
|
||||
/* Module: clock.c */
|
||||
/* Project: RTEMS 4.6.0pre1 / PPC403 BSP */
|
||||
/* Version 1.16 */
|
||||
/* Date: 2002/11/01 */
|
||||
/* Author(s) / Copyright(s): */
|
||||
/* */
|
||||
/* Author: Jay Monkman (jmonkman@frasca.com) */
|
||||
/* Copyright (C) 1998 by Frasca International, Inc. */
|
||||
/* */
|
||||
/* Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c: */
|
||||
/* */
|
||||
/* Author: Andrew Bray <andy@i-cubed.co.uk> */
|
||||
/* */
|
||||
/* COPYRIGHT (c) 1995 by i-cubed ltd. */
|
||||
/* */
|
||||
/* To anyone who acknowledges that this file is provided "AS IS" */
|
||||
/* without any express or implied warranty: */
|
||||
/* permission to use, copy, modify, and distribute this file */
|
||||
/* for any purpose is hereby granted without fee, provided that */
|
||||
/* the above copyright notice and this notice appears in all */
|
||||
/* copies, and that the name of i-cubed limited not be used in */
|
||||
/* advertising or publicity pertaining to distribution of the */
|
||||
/* software without specific, written prior permission. */
|
||||
/* i-cubed limited makes no representations about the suitability */
|
||||
/* of this software for any purpose. */
|
||||
/* */
|
||||
/* Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c: */
|
||||
/* */
|
||||
/* Modifications for deriving timer clock from cpu system clock by */
|
||||
/* Thomas Doerfler <td@imd.m.isar.de> */
|
||||
/* for these modifications: */
|
||||
/* COPYRIGHT (c) 1997 by IMD, Puchheim, Germany. */
|
||||
/* */
|
||||
/* COPYRIGHT (c) 1989-1999. */
|
||||
/* On-Line Applications Research Corporation (OAR). */
|
||||
/* */
|
||||
/* The license and distribution terms for this file may be */
|
||||
/* found in the file LICENSE in this distribution or at */
|
||||
/* http://www.OARcorp.com/rtems/license.html. */
|
||||
/* */
|
||||
/* Modifications for PPC405GP by Dennis Ehlin */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Partially based on the code references which are named above. */
|
||||
/* Adaptions, modifications, enhancements and any recent parts of */
|
||||
/* the code are under the right of */
|
||||
/* */
|
||||
/* IPR Engineering, Dachauer Straße 38, D-80335 München */
|
||||
/* Copyright(C) 2003 */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* IPR Engineering makes no representation or warranties with */
|
||||
/* respect to the performance of this computer program, and */
|
||||
/* specifically disclaims any responsibility for any damages, */
|
||||
/* special or consequential, connected with the use of this program. */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Version history: 1.0 */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
/*#include "../include/bsp.h"*/
|
||||
#include "../include/bsp.h"
|
||||
#include <rtems/bspIo.h>
|
||||
/*#include "../irq/irq.h"*/
|
||||
#include "../irq/irq.h"
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/clockdrv.h>
|
||||
#include <rtems/libio.h>
|
||||
|
||||
#include <stdlib.h> /* for atexit() */
|
||||
#include "../include/bsp.h"
|
||||
#include "../irq/irq.h"
|
||||
#include "../include/mpc5200.h"
|
||||
|
||||
volatile uint32_t Clock_driver_ticks;
|
||||
|
||||
void Clock_exit(void);
|
||||
|
||||
uint32_t counter_value;
|
||||
|
||||
volatile int ClockInitialized = 0;
|
||||
|
||||
|
||||
/*
|
||||
* These are set by clock driver during its init
|
||||
*/
|
||||
rtems_device_major_number rtems_clock_major = ~0;
|
||||
rtems_device_minor_number rtems_clock_minor;
|
||||
|
||||
|
||||
/*
|
||||
* ISR Handlers
|
||||
*/
|
||||
void mpc5200_gpt_clock_isr(rtems_irq_hdl_param handle)
|
||||
{
|
||||
uint32_t status;
|
||||
struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)handle;
|
||||
|
||||
status = gpt->status;
|
||||
|
||||
|
||||
if(ClockInitialized && (status & GPT_STATUS_TEXP))
|
||||
{
|
||||
|
||||
gpt->status |= GPT_STATUS_TEXP;
|
||||
|
||||
|
||||
Clock_driver_ticks++;
|
||||
rtems_clock_tick();
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Initialize MPC5x00 GPT
|
||||
*/
|
||||
void mpc5200_init_gpt(uint32_t gpt_no)
|
||||
{
|
||||
struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
|
||||
|
||||
gpt->status = GPT_STATUS_RESET;
|
||||
gpt->emsel = GPT_EMSEL_CE | GPT_EMSEL_ST_CONT | GPT_EMSEL_INTEN | GPT_EMSEL_GPIO_OUT_HIGH | GPT_EMSEL_TIMER_MS_GPIO;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Set MPC5x00 GPT counter
|
||||
*/
|
||||
void mpc5200_set_gpt_count(uint32_t counter_value, uint32_t gpt_no)
|
||||
{
|
||||
uint32_t prescaler_value = 1;
|
||||
struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
|
||||
|
||||
/* Calculate counter/prescaler value, e.g. IPB_Clock=33MHz -> Int. every 0,3 nsecs. - 130 secs.*/
|
||||
while((counter_value >= (1 << 16)) && (prescaler_value < (1 << 16)))
|
||||
{
|
||||
|
||||
prescaler_value++;
|
||||
counter_value /= prescaler_value;
|
||||
|
||||
}
|
||||
|
||||
counter_value = (uint16_t)counter_value;
|
||||
|
||||
gpt->count_in = (prescaler_value << 16) + counter_value;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Enable MPC5x00 GPT interrupt
|
||||
*/
|
||||
void mpc5200_enable_gpt_int(uint32_t gpt_no)
|
||||
{
|
||||
struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
|
||||
|
||||
gpt->emsel |= GPT_EMSEL_CE | GPT_EMSEL_INTEN;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Disable MPC5x00 GPT interrupt
|
||||
*/
|
||||
void mpc5200_disable_gpt_int(uint32_t gpt_no)
|
||||
{
|
||||
struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
|
||||
|
||||
gpt->emsel &= ~(GPT_EMSEL_CE | GPT_EMSEL_INTEN);
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Check MPC5x00 GPT status
|
||||
*/
|
||||
uint32_t mpc5200_check_gpt_status(uint32_t gpt_no)
|
||||
{
|
||||
struct mpc5200_gpt *gpt = (struct mpc5200_gpt *)(&mpc5200.gpt[gpt_no]);
|
||||
|
||||
return ((gpt->emsel) & (GPT_EMSEL_CE | GPT_EMSEL_INTEN));
|
||||
|
||||
}
|
||||
|
||||
|
||||
void clockOn(const rtems_irq_connect_data* irq)
|
||||
{
|
||||
uint32_t gpt_no;
|
||||
|
||||
|
||||
gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
|
||||
|
||||
counter_value = rtems_configuration_get_microseconds_per_tick() *
|
||||
rtems_cpu_configuration_get_clicks_per_usec();
|
||||
|
||||
mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no);
|
||||
mpc5200_enable_gpt_int((uint32_t)gpt_no);
|
||||
|
||||
Clock_driver_ticks = 0;
|
||||
ClockInitialized = 1;
|
||||
|
||||
}
|
||||
|
||||
|
||||
void clockOff(const rtems_irq_connect_data* irq)
|
||||
{
|
||||
uint32_t gpt_no;
|
||||
|
||||
gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
|
||||
|
||||
mpc5200_disable_gpt_int((uint32_t)gpt_no);
|
||||
|
||||
ClockInitialized = 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
int clockIsOn(const rtems_irq_connect_data* irq)
|
||||
{
|
||||
uint32_t gpt_no;
|
||||
|
||||
gpt_no = BSP_SIU_IRQ_TMR0 - (irq->name);
|
||||
|
||||
if(mpc5200_check_gpt_status(gpt_no) && ClockInitialized)
|
||||
return ClockInitialized;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int BSP_get_clock_irq_level()
|
||||
{
|
||||
|
||||
/*
|
||||
* Caution : if you change this, you must change the
|
||||
* definition of BSP_PERIODIC_TIMER accordingly
|
||||
*/
|
||||
return BSP_PERIODIC_TIMER;
|
||||
}
|
||||
|
||||
|
||||
int BSP_disconnect_clock_handler (void)
|
||||
{
|
||||
rtems_irq_connect_data clockIrqData;
|
||||
clockIrqData.name = BSP_PERIODIC_TIMER;
|
||||
|
||||
|
||||
if (!BSP_get_current_rtems_irq_handler(&clockIrqData))
|
||||
{
|
||||
|
||||
printk("Unable to stop system clock\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
|
||||
}
|
||||
|
||||
return BSP_remove_rtems_irq_handler (&clockIrqData);
|
||||
|
||||
}
|
||||
|
||||
|
||||
int BSP_connect_clock_handler (uint32_t gpt_no)
|
||||
{
|
||||
|
||||
rtems_irq_hdl hdl = 0;
|
||||
rtems_irq_connect_data clockIrqData;
|
||||
|
||||
|
||||
/*
|
||||
* Reinit structure
|
||||
*/
|
||||
|
||||
clockIrqData.name = BSP_PERIODIC_TIMER;
|
||||
|
||||
if(!BSP_get_current_rtems_irq_handler(&clockIrqData))
|
||||
{
|
||||
|
||||
printk("Unable to get system clock handler\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
|
||||
}
|
||||
|
||||
if(!BSP_remove_rtems_irq_handler (&clockIrqData))
|
||||
{
|
||||
|
||||
printk("Unable to remove current system clock handler\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
|
||||
}
|
||||
|
||||
if ((gpt_no >= GPT0) ||
|
||||
(gpt_no <= GPT7)) {
|
||||
hdl = (rtems_irq_hdl_param )&mpc5200.gpt[gpt_no];
|
||||
}
|
||||
else {
|
||||
printk("Unable to set system clock handler\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
}
|
||||
|
||||
clockIrqData.hdl = mpc5200_gpt_clock_isr;
|
||||
clockIrqData.handle = (rtems_irq_hdl_param) hdl;
|
||||
clockIrqData.on = clockOn;
|
||||
clockIrqData.off = clockOff;
|
||||
clockIrqData.isOn = clockIsOn;
|
||||
|
||||
return BSP_install_rtems_irq_handler (&clockIrqData);
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Called via atexit()
|
||||
* Remove the clock interrupt handler by setting handler to NULL
|
||||
*/
|
||||
void Clock_exit(void)
|
||||
{
|
||||
|
||||
(void) BSP_disconnect_clock_handler ();
|
||||
|
||||
}
|
||||
|
||||
|
||||
void Install_clock(rtems_device_minor_number gpt_no)
|
||||
{
|
||||
|
||||
Clock_driver_ticks = 0;
|
||||
|
||||
counter_value = rtems_configuration_get_microseconds_per_tick() *
|
||||
rtems_cpu_configuration_get_clicks_per_usec();
|
||||
|
||||
mpc5200_init_gpt((uint32_t)gpt_no);
|
||||
mpc5200_set_gpt_count(counter_value, (uint32_t)gpt_no);
|
||||
|
||||
|
||||
BSP_connect_clock_handler(gpt_no);
|
||||
|
||||
ClockInitialized = 1;
|
||||
|
||||
atexit(Clock_exit);
|
||||
|
||||
}
|
||||
|
||||
void ReInstall_clock(uint32_t gpt_no)
|
||||
{
|
||||
|
||||
BSP_connect_clock_handler(gpt_no);
|
||||
|
||||
}
|
||||
|
||||
|
||||
rtems_device_driver Clock_initialize
|
||||
(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void *pargp
|
||||
)
|
||||
{
|
||||
/* force minor according to definitions in irq.h */
|
||||
minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0;
|
||||
|
||||
Install_clock((uint32_t)minor);
|
||||
|
||||
/*
|
||||
* make major/minor avail to others such as shared memory driver
|
||||
*/
|
||||
rtems_clock_major = major;
|
||||
rtems_clock_minor = minor;
|
||||
|
||||
return RTEMS_SUCCESSFUL;
|
||||
|
||||
}
|
||||
|
||||
rtems_device_driver Clock_control
|
||||
(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void *pargp
|
||||
) {
|
||||
|
||||
rtems_libio_ioctl_args_t *args = pargp;
|
||||
|
||||
/* forec minor according to definitions in irq.h */
|
||||
minor = BSP_PERIODIC_TIMER - BSP_SIU_IRQ_TMR0;
|
||||
|
||||
if(args != 0) {
|
||||
/*
|
||||
* This is hokey, but until we get a defined interface
|
||||
* to do this, it will just be this simple...
|
||||
*/
|
||||
if(args->command == rtems_build_name('I', 'S', 'R', ' ')) {
|
||||
if ((minor >= GPT0) ||
|
||||
(minor <= GPT7)) {
|
||||
mpc5200_gpt_clock_isr((rtems_irq_hdl_param )&mpc5200.gpt[minor]);
|
||||
}
|
||||
else {
|
||||
printk("Unable to call system clock handler\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
}
|
||||
}
|
||||
else if(args->command == rtems_build_name('N', 'E', 'W', ' ')) {
|
||||
ReInstall_clock((uint32_t)minor);
|
||||
}
|
||||
}
|
||||
return RTEMS_SUCCESSFUL;
|
||||
|
||||
}
|
||||
|
||||
@@ -0,0 +1,36 @@
|
||||
## Process this file with autoconf to produce a configure script.
|
||||
##
|
||||
## $Id$
|
||||
|
||||
AC_PREREQ(2.59)
|
||||
AC_INIT([rtems-c-src-lib-libbsp-powerpc-gen5200],[_RTEMS_VERSION],[rtems-bugs@rtems.com])
|
||||
AC_CONFIG_SRCDIR([bsp_specs])
|
||||
RTEMS_TOP(../../../../../..)
|
||||
|
||||
RTEMS_CANONICAL_TARGET_CPU
|
||||
AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.9])
|
||||
RTEMS_BSP_CONFIGURE
|
||||
|
||||
RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
|
||||
RTEMS_CANONICALIZE_TOOLS
|
||||
RTEMS_PROG_CCAS
|
||||
|
||||
RTEMS_BSPOPTS_SET([DATA_CACHE_ENABLE],[*],[1])
|
||||
RTEMS_BSPOPTS_HELP([DATA_CACHE_ENABLE],
|
||||
[If defined, the data cache will be enabled after address translation
|
||||
is turned on.])
|
||||
|
||||
RTEMS_BSPOPTS_SET([INSTRUCTION_CACHE_ENABLE],[*],[1])
|
||||
RTEMS_BSPOPTS_HELP([INSTRUCTION_CACHE_ENABLE],
|
||||
[If defined, the instruction cache will be enabled after address translation
|
||||
is turned on.])
|
||||
|
||||
RTEMS_CHECK_NETWORKING
|
||||
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
|
||||
|
||||
# Explicitly list all Makefiles here
|
||||
AC_CONFIG_FILES([Makefile])
|
||||
|
||||
RTEMS_PPC_EXCEPTIONS
|
||||
|
||||
AC_OUTPUT
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,315 @@
|
||||
/* I2C bus common (driver-independent) primitives implementation.
|
||||
*
|
||||
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
|
||||
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* @(#) i2c.c,v 1.5 2004/04/21 16:01:34 ralf Exp
|
||||
*/
|
||||
|
||||
#include "../include/bsp.h"
|
||||
#include "../include/i2c.h"
|
||||
|
||||
/* i2c_transfer_sema_done_func --
|
||||
* This function called from I2C driver layer to signal that I2C
|
||||
* transfer is finished. This function resumes of task execution which
|
||||
* has invoked blocking I2C primitive.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* arg - done function argument; it is RTEMS semaphore ID.
|
||||
*/
|
||||
static void
|
||||
i2c_transfer_sema_done_func(uint32_t arg)
|
||||
{
|
||||
rtems_id sema = (rtems_id)arg;
|
||||
rtems_semaphore_release(sema);
|
||||
}
|
||||
|
||||
/* i2c_transfer_poll_done_func --
|
||||
* This function called from I2C driver layer to signal that I2C
|
||||
* transfer is finished. This function set the flag polled by waiting
|
||||
* function.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* arg - done function argument; address of poll_done_flag
|
||||
*/
|
||||
static void
|
||||
i2c_transfer_poll_done_func(uint32_t arg)
|
||||
{
|
||||
rtems_boolean *poll_done_flag = (rtems_boolean *)arg;
|
||||
*poll_done_flag = 1;
|
||||
}
|
||||
|
||||
/* i2c_transfer_wait_sema --
|
||||
* Initiate I2C bus transfer and block on temporary created semaphore
|
||||
* until this transfer will be finished.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* msg - pointer to transfer messages array
|
||||
* nmsg - number of messages in transfer
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL, if tranfer finished successfully,
|
||||
* or RTEMS status code if semaphore operations has failed.
|
||||
*/
|
||||
static i2c_message_status
|
||||
i2c_transfer_wait_sema(i2c_bus_number bus, i2c_message *msg, int nmsg)
|
||||
{
|
||||
rtems_status_code sc;
|
||||
rtems_id sema;
|
||||
sc = rtems_semaphore_create(
|
||||
rtems_build_name('I', '2', 'C', 'S'),
|
||||
0,
|
||||
RTEMS_COUNTING_SEMAPHORE | RTEMS_NO_INHERIT_PRIORITY |
|
||||
RTEMS_NO_PRIORITY_CEILING | RTEMS_LOCAL,
|
||||
0,
|
||||
&sema
|
||||
);
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
return I2C_RESOURCE_NOT_AVAILABLE;
|
||||
sc = i2c_transfer(bus, nmsg, msg, i2c_transfer_sema_done_func, sema);
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
{
|
||||
rtems_semaphore_delete(sema);
|
||||
return sc;
|
||||
}
|
||||
rtems_semaphore_obtain(sema, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
|
||||
sc = rtems_semaphore_delete(sema);
|
||||
return sc;
|
||||
}
|
||||
|
||||
/* i2c_transfer_wait_poll --
|
||||
* Initiate I2C bus transfer and wait by poll transaction done flag until
|
||||
* this transfer will be finished.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* msg - pointer to transfer messages array
|
||||
* nmsg - number of messages in transfer
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL
|
||||
*/
|
||||
static rtems_status_code
|
||||
i2c_transfer_wait_poll(i2c_bus_number bus, i2c_message *msg, int nmsg)
|
||||
{
|
||||
volatile rtems_boolean poll_done_flag;
|
||||
rtems_status_code sc;
|
||||
poll_done_flag = 0;
|
||||
sc = i2c_transfer(bus, nmsg, msg, i2c_transfer_poll_done_func,
|
||||
(uint32_t)&poll_done_flag);
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
return sc;
|
||||
while (poll_done_flag == 0)
|
||||
{
|
||||
i2c_poll(bus);
|
||||
}
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* i2c_transfer_wait --
|
||||
* Initiate I2C bus transfer and block until this transfer will be
|
||||
* finished. This function wait the semaphore if system in
|
||||
* SYSTEM_STATE_UP state, or poll done flag in other states.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* msg - pointer to transfer messages array
|
||||
* nmsg - number of messages in transfer
|
||||
*
|
||||
* RETURNS:
|
||||
* I2C_SUCCESSFUL, if tranfer finished successfully,
|
||||
* I2C_RESOURCE_NOT_AVAILABLE, if semaphore operations has failed,
|
||||
* value of status field of first error-finished message in transfer,
|
||||
* if something wrong.
|
||||
*/
|
||||
i2c_message_status
|
||||
i2c_transfer_wait(i2c_bus_number bus, i2c_message *msg, int nmsg)
|
||||
{
|
||||
rtems_status_code sc;
|
||||
int i;
|
||||
if (_System_state_Is_up(_System_state_Get()))
|
||||
{
|
||||
sc = i2c_transfer_wait_sema(bus, msg, nmsg);
|
||||
}
|
||||
else
|
||||
{
|
||||
sc = i2c_transfer_wait_poll(bus, msg, nmsg);
|
||||
}
|
||||
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
return I2C_RESOURCE_NOT_AVAILABLE;
|
||||
|
||||
for (i = 0; i < nmsg; i++)
|
||||
{
|
||||
if (msg[i].status != I2C_SUCCESSFUL)
|
||||
{
|
||||
return msg[i].status;
|
||||
}
|
||||
}
|
||||
return I2C_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* i2c_write --
|
||||
* Send single message over specified I2C bus to addressed device and
|
||||
* wait while transfer is finished.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* addr - address of I2C device
|
||||
* buf - data to be sent to device
|
||||
* size - data buffer size
|
||||
*
|
||||
* RETURNS:
|
||||
* transfer status
|
||||
*/
|
||||
i2c_message_status
|
||||
i2c_write(i2c_bus_number bus, i2c_address addr, void *buf, int size)
|
||||
{
|
||||
i2c_message msg;
|
||||
msg.addr = addr;
|
||||
msg.flags = I2C_MSG_WR;
|
||||
if (addr > 0xff)
|
||||
msg.flags |= I2C_MSG_ADDR_10;
|
||||
msg.status = 0;
|
||||
msg.len = size;
|
||||
msg.buf = buf;
|
||||
return i2c_transfer_wait(bus, &msg, 1);
|
||||
}
|
||||
|
||||
/* i2c_wrbyte --
|
||||
* Send single one-byte long message over specified I2C bus to
|
||||
* addressed device and wait while transfer is finished.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* addr - address of I2C device
|
||||
* cmd - byte message to be sent to device
|
||||
*
|
||||
* RETURNS:
|
||||
* transfer status
|
||||
*/
|
||||
i2c_message_status
|
||||
i2c_wrbyte(i2c_bus_number bus, i2c_address addr, uint8_t cmd)
|
||||
{
|
||||
i2c_message msg;
|
||||
uint8_t data = cmd;
|
||||
msg.addr = addr;
|
||||
msg.flags = I2C_MSG_WR;
|
||||
if (addr > 0xff)
|
||||
msg.flags |= I2C_MSG_ADDR_10;
|
||||
msg.status = 0;
|
||||
msg.len = sizeof(data);
|
||||
msg.buf = &data;
|
||||
return i2c_transfer_wait(bus, &msg, 1);
|
||||
}
|
||||
|
||||
/* i2c_read --
|
||||
* receive single message over specified I2C bus from addressed device.
|
||||
* This call will wait while transfer is finished.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* addr - address of I2C device
|
||||
* buf - buffer for received message
|
||||
* size - receive buffer size
|
||||
*
|
||||
* RETURNS:
|
||||
* transfer status
|
||||
*/
|
||||
i2c_message_status
|
||||
i2c_read(i2c_bus_number bus, i2c_address addr, void *buf, int size)
|
||||
{
|
||||
i2c_message msg;
|
||||
msg.addr = addr;
|
||||
msg.flags = 0;
|
||||
if (addr > 0xff)
|
||||
msg.flags |= I2C_MSG_ADDR_10;
|
||||
msg.status = 0;
|
||||
msg.len = size;
|
||||
msg.buf = buf;
|
||||
return i2c_transfer_wait(bus, &msg, 1);
|
||||
}
|
||||
|
||||
/* i2c_wrrd --
|
||||
* Send message over I2C bus to specified device and receive message
|
||||
* from the same device during single transfer.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* addr - address of I2C device
|
||||
* bufw - data to be sent to device
|
||||
* sizew - send data buffer size
|
||||
* bufr - buffer for received message
|
||||
* sizer - receive buffer size
|
||||
*
|
||||
* RETURNS:
|
||||
* transfer status
|
||||
*/
|
||||
i2c_message_status
|
||||
i2c_wrrd(i2c_bus_number bus, i2c_address addr, void *bufw, int sizew,
|
||||
void *bufr, int sizer)
|
||||
{
|
||||
i2c_message msg[2];
|
||||
msg[0].addr = addr;
|
||||
msg[0].flags = I2C_MSG_WR | I2C_MSG_ERRSKIP;
|
||||
if (addr > 0xff)
|
||||
msg[0].flags |= I2C_MSG_ADDR_10;
|
||||
msg[0].status = 0;
|
||||
msg[0].len = sizew;
|
||||
msg[0].buf = bufw;
|
||||
|
||||
msg[1].addr = addr;
|
||||
msg[1].flags = 0;
|
||||
if (addr > 0xff)
|
||||
msg[1].flags |= I2C_MSG_ADDR_10;
|
||||
msg[1].status = 0;
|
||||
msg[1].len = sizer;
|
||||
msg[1].buf = bufr;
|
||||
|
||||
return i2c_transfer_wait(bus, msg, 2);
|
||||
}
|
||||
|
||||
/* i2c_wbrd --
|
||||
* Send one-byte message over I2C bus to specified device and receive
|
||||
* message from the same device during single transfer.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* addr - address of I2C device
|
||||
* cmd - one-byte message to be sent over I2C bus
|
||||
* bufr - buffer for received message
|
||||
* sizer - receive buffer size
|
||||
*
|
||||
* RETURNS:
|
||||
* transfer status
|
||||
*/
|
||||
i2c_message_status
|
||||
i2c_wbrd(i2c_bus_number bus, i2c_address addr, uint8_t cmd,
|
||||
void *bufr, int sizer)
|
||||
{
|
||||
i2c_message msg[2];
|
||||
uint8_t bufw = cmd;
|
||||
msg[0].addr = addr;
|
||||
msg[0].flags = I2C_MSG_WR | I2C_MSG_ERRSKIP;
|
||||
if (addr > 0xff)
|
||||
msg[0].flags |= I2C_MSG_ADDR_10;
|
||||
msg[0].status = 0;
|
||||
msg[0].len = sizeof(bufw);
|
||||
msg[0].buf = &bufw;
|
||||
|
||||
msg[1].addr = addr;
|
||||
msg[1].flags = I2C_MSG_ERRSKIP;
|
||||
if (addr > 0xff)
|
||||
msg[1].flags |= I2C_MSG_ADDR_10;
|
||||
msg[1].status = 0;
|
||||
msg[1].len = sizer;
|
||||
msg[1].buf = bufr;
|
||||
|
||||
return i2c_transfer_wait(bus, msg, 2);
|
||||
}
|
||||
@@ -0,0 +1,309 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: i2cdrv.c
|
||||
+-----------------------------------------------------------------+
|
||||
| Copyright (c) 2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| I2C driver for MPC5200 |
|
||||
+-----------------------------------------------------------------+
|
||||
| This file has been adapted from an existing source code file, |
|
||||
| see the original file header below for reference |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.8 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.7 2005/12/06 14:11:11 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
|
||||
/* I2C driver for MCF5206eLITE board. I2C bus accessed through on-chip
|
||||
* MCF5206e MBUS controller.
|
||||
*
|
||||
* The purpose of this module is to perform I2C driver initialization
|
||||
* and serialize I2C transfers.
|
||||
*
|
||||
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
|
||||
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* @(#) i2cdrv.c,v 1.6 2004/04/21 16:01:34 ralf Exp
|
||||
*/
|
||||
|
||||
#include "../include/bsp.h"
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "../include/i2c.h"
|
||||
#include "../include/i2cdrv.h"
|
||||
#include "mpc5200mbus.h"
|
||||
|
||||
#ifndef I2C_NUMBER_OF_BUSES
|
||||
#define I2C_NUMBER_OF_BUSES (2)
|
||||
#endif
|
||||
|
||||
#ifndef I2C_SELECT_BUS
|
||||
#define I2C_SELECT_BUS(bus)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Few I2C transfers may be posted simultaneously, but MBUS driver is able
|
||||
* to process it one-by-one. To serialize transfers, function i2c_transfer
|
||||
* put transfer information to the queue and initiate new transfers if MBUS
|
||||
* driver is not busy. When driver is busy, next transfer is dequeued
|
||||
* when current active transfer is finished.
|
||||
*/
|
||||
|
||||
/*
|
||||
* i2c_qel - I2C transfers queue element; contain information about
|
||||
* delayed transfer
|
||||
*/
|
||||
typedef struct i2c_qel {
|
||||
i2c_bus_number bus; /* I2C bus number */
|
||||
i2c_message *msg; /* pointer to the transfer' messages array */
|
||||
int nmsg; /* number of messages in transfer */
|
||||
i2c_transfer_done done; /* transfer done callback function */
|
||||
uint32_t done_arg; /* arbitrary argument to done callback */
|
||||
} i2c_qel;
|
||||
|
||||
/* Memory for I2C transfer queue. This queue represented like a ring buffer */
|
||||
static i2c_qel *tqueue;
|
||||
|
||||
/* Maximum number of elements in transfer queue */
|
||||
static int tqueue_size;
|
||||
|
||||
/* Position of next free element in a ring buffer */
|
||||
static volatile int tqueue_head;
|
||||
|
||||
/* Position of the first element in transfer queue */
|
||||
static volatile int tqueue_tail;
|
||||
|
||||
/* MBus I2C bus controller busy flag */
|
||||
static volatile rtems_boolean mbus_busy;
|
||||
|
||||
/* MBus I2C bus controller descriptor */
|
||||
static mpc5200mbus mbus[I2C_NUMBER_OF_BUSES];
|
||||
|
||||
/* Clock rate selected for each of bus */
|
||||
static int i2cdrv_bus_clock_div[I2C_NUMBER_OF_BUSES];
|
||||
|
||||
/* Currently selected I2C bus clock rate */
|
||||
static int i2cdrv_bus_clock_div_current;
|
||||
|
||||
/* Forward function declaration */
|
||||
static void i2cdrv_unload(void);
|
||||
|
||||
/* i2cdrv_done --
|
||||
* Callback function which is called from MBus low-level driver when
|
||||
* transfer is finished.
|
||||
*/
|
||||
static void
|
||||
i2cdrv_done(uint32_t arg)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
i2c_qel *qel = tqueue + tqueue_tail;
|
||||
qel->done(qel->done_arg);
|
||||
rtems_interrupt_disable(level);
|
||||
tqueue_tail = (tqueue_tail + 1) % tqueue_size;
|
||||
mbus_busy = 0;
|
||||
rtems_interrupt_enable(level);
|
||||
i2cdrv_unload();
|
||||
}
|
||||
|
||||
/* i2cdrv_unload --
|
||||
* If MBUS controller is not busy and transfer waiting in a queue,
|
||||
* initiate processing of the next transfer in queue.
|
||||
*/
|
||||
static void
|
||||
i2cdrv_unload(void)
|
||||
{
|
||||
rtems_interrupt_level level;
|
||||
i2c_qel *qel;
|
||||
rtems_status_code sc;
|
||||
rtems_interrupt_disable(level);
|
||||
if (!mbus_busy && (tqueue_head != tqueue_tail))
|
||||
{
|
||||
mbus_busy = 1;
|
||||
rtems_interrupt_enable(level);
|
||||
qel = tqueue + tqueue_tail;
|
||||
|
||||
I2C_SELECT_BUS(qel->bus);
|
||||
if (i2cdrv_bus_clock_div[qel->bus] != i2cdrv_bus_clock_div_current)
|
||||
{
|
||||
i2cdrv_bus_clock_div_current = i2cdrv_bus_clock_div[qel->bus];
|
||||
mpc5200mbus_select_clock_divider(&mbus[qel->bus], i2cdrv_bus_clock_div_current);
|
||||
}
|
||||
sc = mpc5200mbus_i2c_transfer(&mbus[qel->bus], qel->nmsg, qel->msg, i2cdrv_done,
|
||||
(uint32_t)qel);
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < qel->nmsg; i++)
|
||||
{
|
||||
qel->msg[i].status = I2C_RESOURCE_NOT_AVAILABLE;
|
||||
}
|
||||
i2cdrv_done((uint32_t)qel);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
rtems_interrupt_enable(level);
|
||||
}
|
||||
}
|
||||
|
||||
/* i2c_transfer --
|
||||
* Initiate multiple-messages transfer over specified I2C bus or
|
||||
* put request into queue if bus or some other resource is busy. (This
|
||||
* is non-blocking function).
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* nmsg - number of messages
|
||||
* msg - pointer to messages array
|
||||
* done - function which is called when transfer is finished
|
||||
* done_arg - arbitrary argument passed to done funciton
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL if transfer initiated successfully, or error
|
||||
* code if something failed.
|
||||
*/
|
||||
rtems_status_code
|
||||
i2c_transfer(i2c_bus_number bus, int nmsg, i2c_message *msg,
|
||||
i2c_transfer_done done, uint32_t done_arg)
|
||||
{
|
||||
i2c_qel qel;
|
||||
rtems_interrupt_level level;
|
||||
|
||||
if (bus >= I2C_NUMBER_OF_BUSES)
|
||||
{
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
}
|
||||
|
||||
if (msg == NULL)
|
||||
{
|
||||
return RTEMS_INVALID_ADDRESS;
|
||||
}
|
||||
|
||||
qel.bus = bus;
|
||||
qel.msg = msg;
|
||||
qel.nmsg = nmsg;
|
||||
qel.done = done;
|
||||
qel.done_arg = done_arg;
|
||||
rtems_interrupt_disable(level);
|
||||
if ((tqueue_head + 1) % tqueue_size == tqueue_tail)
|
||||
{
|
||||
rtems_interrupt_enable(level);
|
||||
return RTEMS_TOO_MANY;
|
||||
}
|
||||
memcpy(tqueue + tqueue_head, &qel, sizeof(qel));
|
||||
tqueue_head = (tqueue_head + 1) % tqueue_size;
|
||||
rtems_interrupt_enable(level);
|
||||
i2cdrv_unload();
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* i2cdrv_initialize --
|
||||
* I2C driver initialization (rtems I/O driver primitive)
|
||||
*/
|
||||
rtems_device_driver
|
||||
i2cdrv_initialize(rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void *arg)
|
||||
{
|
||||
int i;
|
||||
rtems_status_code sc;
|
||||
mbus_busy = 0;
|
||||
tqueue_tail = tqueue_head = 0;
|
||||
tqueue_size = 32;
|
||||
tqueue = calloc(tqueue_size, sizeof(i2c_qel));
|
||||
|
||||
for (i = 0; i < I2C_NUMBER_OF_BUSES; i++)
|
||||
{
|
||||
mbus[i].bus_idx = i;
|
||||
sc = mpc5200mbus_initialize(&mbus[i]);
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
return sc;
|
||||
}
|
||||
|
||||
for (i = 0; i < I2C_NUMBER_OF_BUSES; i++)
|
||||
{
|
||||
sc = i2c_select_clock_rate(i, 100000);
|
||||
if (sc != RTEMS_SUCCESSFUL)
|
||||
return sc;
|
||||
}
|
||||
i2cdrv_bus_clock_div_current = -1;
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* i2c_select_clock_rate --
|
||||
* select I2C bus clock rate for specified bus. Some bus controller do not
|
||||
* allow to select arbitrary clock rate; in this case nearest possible
|
||||
* slower clock rate is selected.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - I2C bus number
|
||||
* bps - data transfer rate for this bytes in bits per second
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL, if operation performed successfully,
|
||||
* RTEMS_INVALID_NUMBER, if wrong bus number is specified,
|
||||
* RTEMS_UNSATISFIED, if bus do not support data transfer rate selection
|
||||
* or specified data transfer rate could not be used.
|
||||
*/
|
||||
rtems_status_code
|
||||
i2c_select_clock_rate(i2c_bus_number bus, int bps)
|
||||
{
|
||||
int div;
|
||||
if (bus >= I2C_NUMBER_OF_BUSES)
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
|
||||
if (bps == 0)
|
||||
return RTEMS_UNSATISFIED;
|
||||
|
||||
div = IPB_CLOCK / bps;
|
||||
i2cdrv_bus_clock_div[bus] = div;
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
/* i2c_poll --
|
||||
* Poll I2C bus controller for events and hanle it. This function is
|
||||
* used when I2C driver operates in poll-driven mode.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - bus number to be polled
|
||||
*
|
||||
* RETURNS:
|
||||
* none
|
||||
*/
|
||||
void
|
||||
i2c_poll(i2c_bus_number bus)
|
||||
{
|
||||
mpc5200mbus_poll(&mbus[bus]);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,171 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: mpc5200mbus.h
|
||||
+-----------------------------------------------------------------+
|
||||
| Copyright (c) 2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| MBUS module (I2C bus) definitions |
|
||||
+-----------------------------------------------------------------+
|
||||
| This file has been adapted from an existing source code file, |
|
||||
| see the original file header below for reference |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.5 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.4 2005/12/06 14:11:11 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
/*
|
||||
* MCF5206e MBUS module (I2C bus) driver header file
|
||||
*
|
||||
* Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
|
||||
* Author: Victor V. Vengerov <vvv@oktet.ru>
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
*
|
||||
* http://www.rtems.com/license/LICENSE.
|
||||
*
|
||||
* @(#) mcfmbus.h,v 1.3 2004/03/31 01:59:32 ralf Exp
|
||||
*/
|
||||
|
||||
#ifndef __MPC5200BSP_MPC5200MBUS_H__
|
||||
#define __MPC5200BSP_MPC5200MBUS_H__
|
||||
|
||||
#include "../include/mpc5200.h"
|
||||
#include "../include/i2c.h"
|
||||
|
||||
/* States of I2C machine */
|
||||
typedef enum mpc5200mbus_i2c_state {
|
||||
STATE_UNINITIALIZED,
|
||||
STATE_IDLE,
|
||||
STATE_ADDR_7,
|
||||
STATE_ADDR_1_W,
|
||||
STATE_ADDR_1_R,
|
||||
STATE_SENDING,
|
||||
STATE_RECEIVING
|
||||
} mpc5200mbus_i2c_state;
|
||||
|
||||
typedef struct mpc5200_mbus {
|
||||
enum mpc5200mbus_i2c_state state;/* State of I2C machine */
|
||||
i2c_message *msg; /* Pointer to the first message in transfer */
|
||||
int nmsg; /* Number of messages in transfer */
|
||||
i2c_message *cmsg; /* Current message */
|
||||
int byte; /* Byte number in current message */
|
||||
rtems_id sema; /* MBUS semaphore */
|
||||
i2c_transfer_done done; /* Transfer done function */
|
||||
uint32_t done_arg; /* Done function argument */
|
||||
int bus_idx; /* bus index: 0 or 1 */
|
||||
} mpc5200mbus;
|
||||
|
||||
/* mpc5200mbus_initialize --
|
||||
* Initialize ColdFire MBUS I2C bus controller.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* i2c_bus - pointer to the bus descriptor structure
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL, or RTEMS error code when initialization failed.
|
||||
*/
|
||||
rtems_status_code
|
||||
mpc5200mbus_initialize(mpc5200mbus *i2c_bus);
|
||||
|
||||
/* mpc5200mbus_select_clock_divider --
|
||||
* Select divider for system clock which is used for I2C bus clock
|
||||
* generation. Not each divider can be selected for I2C bus; this
|
||||
* function select nearest larger or equal divider, or maximum
|
||||
* possible divider, if passed value greater.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* i2c_bus - pointer to the bus descriptor structure
|
||||
* divider - system frequency divider for I2C serial clock.
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL, if operation performed successfully, or
|
||||
* RTEMS error code when failed.
|
||||
*/
|
||||
rtems_status_code
|
||||
mpc5200mbus_select_clock_divider(mpc5200mbus *i2c_bus, int divider);
|
||||
|
||||
/* mpc5200mbus_i2c_transfer --
|
||||
* Initiate multiple-messages transfer over I2C bus via ColdFire MBUS
|
||||
* controller.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - pointer to MBUS controller descriptor
|
||||
* nmsg - number of messages
|
||||
* msg - pointer to messages array
|
||||
* done - function which is called when transfer is finished
|
||||
* done_arg - arbitrary argument passed to done funciton
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL if transfer initiated successfully, or error
|
||||
* code when failed.
|
||||
*/
|
||||
rtems_status_code
|
||||
mpc5200mbus_i2c_transfer(mpc5200mbus *bus, int nmsg, i2c_message *msg,
|
||||
i2c_transfer_done done, uint32_t done_arg);
|
||||
|
||||
/* mpc5200mbus_i2c_done --
|
||||
* Close ColdFire MBUS I2C bus controller and release all resources.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - pointer to MBUS controller descriptor
|
||||
*
|
||||
* RETURNS:
|
||||
* RTEMS_SUCCESSFUL, if transfer initiated successfully, or error
|
||||
* code when failed.
|
||||
*/
|
||||
rtems_status_code
|
||||
mpc5200mbus_i2c_done(mpc5200mbus *i2c_bus);
|
||||
|
||||
/* mpc5200mbus_i2c_interrupt_handler --
|
||||
* ColdFire MBUS I2C bus controller interrupt handler. This function
|
||||
* called from real interrupt handler, and pointer to MBUS descriptor
|
||||
* structure passed to this function.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* bus - pointert to the bus descriptor structure
|
||||
*
|
||||
* RETURNS:
|
||||
* none
|
||||
*/
|
||||
void mpc5200mbus_i2c_interrupt_handler(mpc5200mbus *bus);
|
||||
|
||||
/* mpc5200mbus_poll --
|
||||
* MBUS module poll routine; used to poll events when I2C driver
|
||||
* operates in poll-driven mode.
|
||||
*
|
||||
* PARAMETERS:
|
||||
* none
|
||||
*
|
||||
* RETURNS:
|
||||
* none
|
||||
*/
|
||||
void mpc5200mbus_poll(mpc5200mbus *bus);
|
||||
|
||||
#endif /* __MPC5200BSP_MPC5200MBUS_H__ */
|
||||
@@ -0,0 +1,123 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: idecfg.c
|
||||
+-----------------------------------------------------------------+
|
||||
| Copyright (c) 2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| this file contains the IDE configuration |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.5 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.4 2005/12/06 14:30:42 thomas
|
||||
|* updated name for peripheral register block
|
||||
|*
|
||||
|* Revision 1.3 2005/12/06 14:11:11 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
#include <rtems.h>
|
||||
#include "../include/bsp.h"
|
||||
#include "../irq/irq.h"
|
||||
#include "../include/mpc5200.h"
|
||||
#include "./pcmcia_ide.h"
|
||||
|
||||
#include <libchip/ide_ctrl.h>
|
||||
#include <libchip/ide_ctrl_cfg.h>
|
||||
#include <libchip/ide_ctrl_io.h>
|
||||
|
||||
/*
|
||||
* The following table configures the IDE driver used in this BSP.
|
||||
*/
|
||||
extern ide_ctrl_fns_t mpc5200_pcmciaide_ctrl_fns;
|
||||
|
||||
volatile uint32_t * mpc5200_ata_drive_regs[] =
|
||||
{
|
||||
(uint32_t *)&(mpc5200.ata_ddr), /* data (offset 0x00) */
|
||||
(uint32_t *)&(mpc5200.ata_dfr_der), /* features / error (offset 0x01) */
|
||||
(uint32_t *)&(mpc5200.ata_dscr), /* sector count (offset 0x02) */
|
||||
(uint32_t *)&(mpc5200.ata_dsnr), /* sector no. / lba0 (offset 0x03) */
|
||||
(uint32_t *)&(mpc5200.ata_dclr), /* cylinder low / lba1 (offset 0x04) */
|
||||
(uint32_t *)&(mpc5200.ata_dchr), /* cylinder high/ lba2 (offset 0x05) */
|
||||
(uint32_t *)&(mpc5200.ata_ddhr), /* device head / lba3 (offset 0x06) */
|
||||
(uint32_t *)&(mpc5200.ata_dcr_dsr), /* command /status (offset 0x07) */
|
||||
|
||||
(uint32_t *)&(mpc5200.ata_dctr_dasr), /* device control / alternate status (offset 0x08) */
|
||||
(uint32_t *)&(mpc5200.ata_ddr), /* (offset 0x09) */
|
||||
(uint32_t *)&(mpc5200.ata_ddr), /* (offset 0x0A) */
|
||||
NULL, /* (offset 0x0B) */
|
||||
NULL, /* (offset 0x0C) */
|
||||
NULL, /* (offset 0x0D) */
|
||||
NULL, /* (offset 0x0E) */
|
||||
NULL /* (offset 0x0F) */
|
||||
};
|
||||
|
||||
/* IDE controllers Table */
|
||||
ide_controller_bsp_table_t IDE_Controller_Table[] =
|
||||
{
|
||||
{
|
||||
"/dev/idepcmcia",
|
||||
IDE_CUSTOM, /* PCMCIA Flash cards emulate custom IDE controller */
|
||||
&mpc5200_pcmciaide_ctrl_fns, /* pointer to function set used for IDE drivers in this BSP */
|
||||
NULL, /* no BSP dependent probe needed */
|
||||
FALSE, /* not (yet) initialized */
|
||||
(uint32_t)0, /* no port address but custom reg.set in params is used */
|
||||
#ifdef ATA_USE_INT
|
||||
TRUE, /* interrupt driven */
|
||||
#else
|
||||
FALSE, /* non interrupt driven */
|
||||
#endif
|
||||
BSP_SIU_IRQ_ATA, /* interrupt vector */
|
||||
NULL /* no additional parameters */
|
||||
}
|
||||
};
|
||||
|
||||
/* Number of rows in IDE_Controller_Table */
|
||||
unsigned long IDE_Controller_Count = sizeof(IDE_Controller_Table)/sizeof(IDE_Controller_Table[0]);
|
||||
|
||||
uint32_t ata_pio_timings[2][6] =
|
||||
{
|
||||
/* PIO3 timings in nanosconds */
|
||||
{
|
||||
180, /* t0 cycle time */
|
||||
80, /* t2 DIOR-/DIOW pulse width 8 bit */
|
||||
80, /* t1 DIOR-/DIOW pulse width 16 bit */
|
||||
10, /* t4 DIOW- data hold */
|
||||
30, /* t1 Addr.valid to DIOR-/DIOW setup */
|
||||
35, /* ta IORDY setup time */
|
||||
},
|
||||
/* PIO4 timings in nanosconds */
|
||||
{
|
||||
120, /* t0 cycle time */
|
||||
70, /* t1 DIOR-/DIOW pulse width 8 bit */
|
||||
70, /* t1 DIOR-/DIOW pulse width 16 bit */
|
||||
10, /* t4 DIOW- data hold */
|
||||
25, /* t1 Addr.valid to DIOR-/DIOW setup */
|
||||
35, /* ta IORDY setup time */
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,124 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: pcmcia_ide.h
|
||||
+-----------------------------------------------------------------+
|
||||
| Partially based on the code references which are named below. |
|
||||
| Adaptions, modifications, enhancements and any recent parts of |
|
||||
| the code are: |
|
||||
| Copyright (c) 2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| this file contains declarations for the PCMCIA IDE Interface |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.5 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.4 2005/12/06 14:11:12 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
/***********************************************************************/
|
||||
/* */
|
||||
/* Module: pcmcia_ide.h */
|
||||
/* Date: 17/07/2003 */
|
||||
/* Purpose: RTEMS MPC5x00 PCMCIA IDE harddisk header file */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Description: */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Code */
|
||||
/* References: none */
|
||||
/* Module: */
|
||||
/* Project: */
|
||||
/* Version */
|
||||
/* Date: */
|
||||
/* */
|
||||
/* Author(s) / Copyright(s): */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Partially based on the code references which are named above. */
|
||||
/* Adaptions, modifications, enhancements and any recent parts of */
|
||||
/* the code are under the right of */
|
||||
/* */
|
||||
/* IPR Engineering, Dachauer Straße 38, D-80335 München */
|
||||
/* Copyright(C) 2003 */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* IPR Engineering makes no representation or warranties with */
|
||||
/* respect to the performance of this computer program, and */
|
||||
/* specifically disclaims any responsibility for any damages, */
|
||||
/* special or consequential, connected with the use of this program. */
|
||||
/* */
|
||||
/*---------------------------------------------------------------------*/
|
||||
/* */
|
||||
/* Version history: 1.0 */
|
||||
/* */
|
||||
/***********************************************************************/
|
||||
|
||||
#ifndef __PCMCIA_IDE_h
|
||||
#define __PCMCIA_IDE_h
|
||||
|
||||
/*#include "../include/bsp.h"*/
|
||||
#include "../include/bsp.h"
|
||||
|
||||
#define GPIOPCR_ATA_CS_4_5 (1 << 24)
|
||||
|
||||
/*#define DEBUG_OUT*/
|
||||
#define GET_UP_BYTE_OF_MPC5200_ATA_DRIVE_REG(val32) ((uint16_t)((val32) >> 24))
|
||||
#define SET_UP_BYTE_OF_MPC5200_ATA_DRIVE_REG(val8) ((uint32_t)((val8) << 24))
|
||||
#define GET_UP_WORD_OF_MPC5200_ATA_DRIVE_REG(val32) ((uint16_t)((val32) >> 16))
|
||||
#define SET_UP_WORD_OF_MPC5200_ATA_DRIVE_REG(val16) ((uint32_t)((val16) << 16))
|
||||
|
||||
#define ATA_HCFG_SMR (1 << 31)
|
||||
#define ATA_HCFG_FR (1 << 30)
|
||||
#define ATA_HCFG_IORDY (1 << 24)
|
||||
#define ATA_HCFG_IE (1 << 25)
|
||||
|
||||
#if 0
|
||||
#define COUNT_VAL(nsec) (((nsec)%(IPB_CLOCK/1000000)) ? (((nsec)/(IPB_CLOCK/1000000)) + 1) : ((nsec)/(IPB_CLOCK/1000000)))
|
||||
#else
|
||||
#define COUNT_VAL(nsec) (((nsec)*(IPB_CLOCK/1000000)/1000) + 1)
|
||||
#endif
|
||||
|
||||
#define PIO_3 0
|
||||
#define PIO_4 1
|
||||
|
||||
#define T0 0
|
||||
#define T2_8 1
|
||||
#define T2_16 2
|
||||
#define T4 3
|
||||
#define T1 4
|
||||
#define TA 5
|
||||
|
||||
#define ATA_PIO_TIMING_1(t0,t2_8,t2_16) (((COUNT_VAL(t0)) << 24) | ((COUNT_VAL(t2_8)) << 16) | ((COUNT_VAL(t2_16)) << 8))
|
||||
#define ATA_PIO_TIMING_2(t4,t1,ta) (((COUNT_VAL(t4)) << 24) | ((COUNT_VAL(t1)) << 16) | ((COUNT_VAL(ta)) << 8))
|
||||
|
||||
#endif
|
||||
/* end of include file */
|
||||
@@ -0,0 +1 @@
|
||||
bspopts.h
|
||||
@@ -0,0 +1,245 @@
|
||||
/*===============================================================*\
|
||||
| Project: RTEMS generic MPC5200 BSP |
|
||||
+-----------------------------------------------------------------+
|
||||
| File: bsp.h
|
||||
+-----------------------------------------------------------------+
|
||||
| Partially based on the code references which are named below. |
|
||||
| Adaptions, modifications, enhancements and any recent parts of |
|
||||
| the code are: |
|
||||
| Copyright (c) 2005 |
|
||||
| Embedded Brains GmbH |
|
||||
| Obere Lagerstr. 30 |
|
||||
| D-82178 Puchheim |
|
||||
| Germany |
|
||||
| rtems@embedded-brains.de |
|
||||
+-----------------------------------------------------------------+
|
||||
| The license and distribution terms for this file may be |
|
||||
| found in the file LICENSE in this distribution or at |
|
||||
| |
|
||||
| http://www.rtems.com/license/LICENSE. |
|
||||
| |
|
||||
+-----------------------------------------------------------------+
|
||||
| this file contains board specific definitions |
|
||||
+-----------------------------------------------------------------+
|
||||
| date history ID |
|
||||
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
|
||||
| 01.12.05 creation doe |
|
||||
|*****************************************************************|
|
||||
|*CVS information: |
|
||||
|*(the following information is created automatically, |
|
||||
|*do not edit here) |
|
||||
|*****************************************************************|
|
||||
|* $Log$
|
||||
|* Revision 1.11 2005/12/09 08:57:03 thomas
|
||||
|* added/modifed file headers
|
||||
|*
|
||||
|* Revision 1.10 2005/12/06 14:11:12 thomas
|
||||
|* added EB file headers
|
||||
|*
|
||||
*
|
||||
|*****************************************************************|
|
||||
\*===============================================================*/
|
||||
|
||||
#ifndef __GEN5200_BSP_h
|
||||
#define __GEN5200_BSP_h
|
||||
|
||||
/*
|
||||
* distinguish board characteristics
|
||||
*/
|
||||
/*
|
||||
* for PM520 mdule on a ZE30 carrier
|
||||
*/
|
||||
#if defined(PM520_ZE30)
|
||||
#define PM520
|
||||
#define GPIOPCR_INITMASK 0x337F3F77
|
||||
#define GPIOPCR_INITVAL 0x01552114
|
||||
/* we have PSC1/4/5/6 */
|
||||
/* #define GEN5200_UART_AVAIL_MASK 0x39 */
|
||||
#define GEN5200_UART_AVAIL_MASK 0x39
|
||||
#endif
|
||||
/*
|
||||
* for PM520 mdule on a CR825 carrier
|
||||
*/
|
||||
#if defined(PM520_CR825)
|
||||
#define PM520
|
||||
#define GPIOPCR_INITMASK 0x330F0F77
|
||||
#define GPIOPCR_INITVAL 0x01050444
|
||||
/* we have PSC1/2/3*/
|
||||
#define GEN5200_UART_AVAIL_MASK 0x07
|
||||
#endif
|
||||
|
||||
#if defined(BRS5L)
|
||||
/*
|
||||
* IMD Custom Board BRS5L
|
||||
*/
|
||||
#define GPIOPCR_INITMASK 0xb30F0F77
|
||||
#define GPIOPCR_INITVAL 0x91050444
|
||||
/* we have PSC1/2/3 */
|
||||
#define GEN5200_UART_AVAIL_MASK 0x07
|
||||
/*
|
||||
* address range definitions
|
||||
*/
|
||||
/* ROM definitions (2 MB) */
|
||||
#define ROM_START 0xFFE00000
|
||||
#define ROM_END 0xFFFFFFFF
|
||||
#define BOOT_START ROM_START
|
||||
#define BOOT_END ROM_END
|
||||
|
||||
/* SDRAM definitions (256 MB) */
|
||||
#define RAM_START 0x00000000
|
||||
#define RAM_END 0x0FFFFFFF
|
||||
|
||||
/* DPRAM definitions (64 KB) */
|
||||
#define DPRAM_START 0xFF000000
|
||||
#define DPRAM_END 0xFF0003FF
|
||||
|
||||
/* internal memory map definitions (64 KB) */
|
||||
#define MBAR 0xF0000000
|
||||
|
||||
/* we need the low level initialization in start.S*/
|
||||
#define NEED_LOW_LEVEL_INIT
|
||||
|
||||
#define HAS_NVRAM_93CXX
|
||||
#elif defined (PM520)
|
||||
|
||||
/*
|
||||
* MicroSys PM520 internal memory map definitions
|
||||
*/
|
||||
#define MBAR 0xF0000000
|
||||
#define HAS_UBOOT
|
||||
|
||||
#else
|
||||
#error "board type not defined"
|
||||
#endif
|
||||
|
||||
#ifndef ASM
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "bspopts.h"
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/console.h>
|
||||
#include <rtems/clockdrv.h>
|
||||
#include <i2cdrv.h>
|
||||
|
||||
#if defined(HAS_UBOOT)
|
||||
#define CONFIG_MPC5xxx
|
||||
#include <u-boot.h>
|
||||
extern bd_t *uboot_bdinfo_ptr;
|
||||
extern bd_t uboot_bdinfo_copy;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Network driver configuration
|
||||
*/
|
||||
struct rtems_bsdnet_ifconfig;
|
||||
extern int rtems_mpc5200_fec_driver_attach_detach (struct rtems_bsdnet_ifconfig *config, int attaching);
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth1"
|
||||
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach
|
||||
|
||||
/* miscellaneous stuff assumed to exist */
|
||||
|
||||
extern rtems_configuration_table BSP_Configuration;
|
||||
/*
|
||||
* We need to decide how much memory will be non-cacheable. This
|
||||
* will mainly be memory that will be used in DMA (network and serial
|
||||
* buffers).
|
||||
*/
|
||||
/*
|
||||
#define NOCACHE_MEM_SIZE 512*1024
|
||||
*/
|
||||
|
||||
/*
|
||||
* Define the time limits for RTEMS Test Suite test durations.
|
||||
* Long test and short test duration limits are provided. These
|
||||
* values are in seconds and need to be converted to ticks for the
|
||||
* application.
|
||||
*
|
||||
*/
|
||||
|
||||
#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
|
||||
#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
|
||||
|
||||
/*
|
||||
* Stuff for Time Test 27
|
||||
*/
|
||||
#define MUST_WAIT_FOR_INTERRUPT 0
|
||||
|
||||
/*
|
||||
* Device Driver Table Entries
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Console driver entry
|
||||
*/
|
||||
|
||||
/*
|
||||
* NOTE: Use the standard Clock driver entry
|
||||
*/
|
||||
|
||||
#ifdef HAS_NVRAM_93CXX
|
||||
#define NVRAM_DRIVER_TABLE_ENTRY \
|
||||
{ nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \
|
||||
nvram_driver_read, nvram_driver_write, NULL }
|
||||
#endif
|
||||
|
||||
#define RTC_DRIVER_TABLE_ENTRY \
|
||||
{ rtc_initialize, NULL, NULL, NULL, NULL, NULL }
|
||||
extern rtems_device_driver rtc_initialize(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void *arg
|
||||
);
|
||||
|
||||
/*
|
||||
* indicate, that BSP has IDE driver
|
||||
*/
|
||||
#define RTEMS_BSP_HAS_IDE_DRIVER
|
||||
|
||||
/*
|
||||
* How many libio files we want
|
||||
*/
|
||||
#define BSP_LIBIO_MAX_FDS 20
|
||||
|
||||
/* functions */
|
||||
|
||||
void bsp_cleanup(void);
|
||||
|
||||
/* console modes (only termios) */
|
||||
#ifdef PRINTK_MINOR
|
||||
#undef PRINTK_MINOR
|
||||
#endif
|
||||
#define PRINTK_MINOR PSC1_MINOR
|
||||
|
||||
#define SINGLE_CHAR_MODE
|
||||
#define UARTS_USE_TERMIOS_INT 1
|
||||
|
||||
/* ata modes */
|
||||
#undef ATA_USE_INT
|
||||
|
||||
/* clock settings */
|
||||
#if defined(HAS_UBOOT)
|
||||
#define IPB_CLOCK (uboot_bdinfo_ptr->bi_ipbfreq)
|
||||
#define XLB_CLOCK (uboot_bdinfo_ptr->bi_busfreq)
|
||||
#define G2_CLOCK (uboot_bdinfo_ptr->bi_intfreq)
|
||||
#else
|
||||
#define IPB_CLOCK 33000000 /* 33 MHz */
|
||||
#define XLB_CLOCK 66000000 /* 66 MHz */
|
||||
#define G2_CLOCK 231000000 /* 231 MHz */
|
||||
#endif
|
||||
|
||||
/* slicetimer settings */
|
||||
#define USE_SLICETIMER_0 TRUE
|
||||
#define USE_SLICETIMER_1 FALSE
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ASM */
|
||||
|
||||
#endif /* GEN5200 */
|
||||
/* end of include file */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user