mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-08-21 05:38:26 +08:00
applied patches for PR1117/1118/1119/1120
This commit is contained in:
Thomas Doerfler
@@ -25,6 +25,7 @@ AC_DEFUN([_RTEMS_BSP_ALIAS],
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pc586) $2=pc386 ;; # i386 - PC with Pentium
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pc686) $2=pc386 ;; # i386 - PC with PentiumPro
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pck6) $2=pc386 ;; # i386 - PC with K6
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brs5l*) $2=gen5200 ;; # MPC5200 based board
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pm520*) $2=gen5200 ;; # MPC5200 based board
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simcpu32) $2=sim68000 ;; # BSVC CPU32 variant
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simsh7032) $2=shsim ;; # SH7032 simulator
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@@ -26,7 +26,7 @@ AC_MSG_CHECKING([for available BSPs])
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bsps="$bsps mbx860_002"
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bsps="$bsps mbx860_005b"
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;;
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gen5200) bsps="pm520_cr825 pm520_ze30";;
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gen5200) bsps="pm520_cr825 pm520_ze30 brs5l";;
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motorola_powerpc) bsps="mvme2307 mcp750 mtx603e mvme2100";;
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pc386) bsps="pc386 pc386dx pc486 pc586 pc686 pck6";;
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erc32) bsps="erc32 erc32nfp sis";;
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@@ -29,7 +29,7 @@ start.$(OBJEXT): start/start.S
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$(CPPASCOMPILE) -DASM -o $@ -c $<
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project_lib_DATA = start.$(OBJEXT)
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dist_project_lib_DATA += startup/linkcmds startup/linkcmds.pm520
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dist_project_lib_DATA += startup/linkcmds.brs5l startup/linkcmds.pm520
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noinst_PROGRAMS += bestcomm.rel
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bestcomm_rel_SOURCES = bestcomm/include/ppctypes.h \
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@@ -90,11 +90,13 @@ noinst_PROGRAMS += nvram.rel
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nvram_rel_SOURCES = nvram/nvram.c nvram/nvram.h nvram/m93cxx.h
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nvram_rel_CPPFLAGS = $(AM_CPPFLAGS)
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nvram_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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include_bsp_HEADERS += nvram/nvram.h
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noinst_PROGRAMS += slicetimer.rel
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slicetimer_rel_SOURCES = slicetimer/slicetimer.c slicetimer/slicetimer.h
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slicetimer_rel_CPPFLAGS = $(AM_CPPFLAGS)
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slicetimer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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include_bsp_HEADERS += slicetimer/slicetimer.h
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noinst_PROGRAMS += tod.rel
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tod_rel_SOURCES = tod/todcfg.c tod/pcf8563.c tod/pcf8563.h \
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@@ -108,7 +110,7 @@ noinst_PROGRAMS += startup.rel
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startup_rel_SOURCES = ../../shared/bspclean.c ../../shared/bsplibc.c \
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../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
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../../shared/main.c ../../shared/sbrk.c \
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../../shared/gnatinstallhandler.c startup/cpuinit.c
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../../shared/gnatinstallhandler.c startup/cpuinit.c start/start.S
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startup_rel_CPPFLAGS = $(AM_CPPFLAGS)
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startup_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
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@@ -46,12 +46,15 @@ void bestcomm_glue_irq_enable
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| none |
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\*=========================================================================*/
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{
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rtems_interrupt_level level;
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if (0 != ((1UL<<bestcomm_taskno) & SDMA_INT_BIT_IMPL)) {
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rtems_interrupt_disable(level);
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/*
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* valid task number
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* enable interrupt in bestcomm mask
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*/
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SDMA_INT_ENABLE(&mpc5200.IntMask,bestcomm_taskno);
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rtems_interrupt_enable(level);
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}
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}
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@@ -73,12 +76,15 @@ void bestcomm_glue_irq_disable
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| none |
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\*=========================================================================*/
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{
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rtems_interrupt_level level;
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if (0 != ((1UL<<bestcomm_taskno) & SDMA_INT_BIT_IMPL)) {
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rtems_interrupt_disable(level);
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/*
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* valid task number
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* disable interrupt in bestcomm mask
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*/
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SDMA_INT_DISABLE(&mpc5200.IntMask,bestcomm_taskno);
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rtems_interrupt_enable(level);
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}
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}
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@@ -245,7 +251,7 @@ void bestcomm_glue_init
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TasksLoadImage( (void *)&(mpc5200.taskBar));
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/*
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* FIXME: initialize interrupt dispatcher
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* initialize interrupt dispatcher
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*/
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if(!BSP_install_rtems_irq_handler (&bestcomm_glue_irq_data)) {
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rtems_panic ("Can't attach MPC5x00 BestComm interrupt handler\n");
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@@ -10,9 +10,9 @@
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%{!qnolinkcmds: -T linkcmds%s}}}
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*startfile:
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%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: ecrti%O%s \
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%{!qrtems_debug: start.o%s} \
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%{qrtems_debug: start_g.o%s}}}
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%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems: \
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%{!qrtems_debug: } \
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%{qrtems_debug: } ecrti%O%s}}
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*endfile:
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%{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s}
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@@ -116,7 +116,7 @@
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uint32_t mpc5200_uart_avail_mask = GEN5200_UART_AVAIL_MASK;
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uint8_t psc_minor_to_irqname[NUM_PORTS] =
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uint8_t psc_minor_to_irqname[NUM_PORTS] =
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{BSP_SIU_IRQ_PSC1,
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BSP_SIU_IRQ_PSC2,
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BSP_SIU_IRQ_PSC3,
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@@ -166,7 +166,7 @@ struct per_channel_info
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/* Used to handle more than one channel */
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struct per_channel_info channel_info[NUM_PORTS];
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/*
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/*
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* XXX: there are only 6 PSCs, but PSC6 has an extra register gap
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* from PSC5, therefore we instantiate seven(!) PSC register sets
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*/
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@@ -179,7 +179,7 @@ int mpc5200_psc_setAttributes(int minor, const struct termios *t)
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{
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int baud;
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uint8_t csize=0, cstopb, parenb, parodd;
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struct mpc5200_psc *psc =
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struct mpc5200_psc *psc =
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(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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/* Baud rate */
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@@ -212,8 +212,9 @@ int mpc5200_psc_setAttributes(int minor, const struct termios *t)
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/*
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* Calculate baud rate
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* round divider to nearest!
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*/
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baud = IPB_CLOCK / (baud * 32);
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baud = (IPB_CLOCK + baud *16) / (baud * 32);
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}
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@@ -314,7 +315,7 @@ static void mpc5200_psc_interrupt_handler(rtems_irq_hdl_param handle)
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uint16_t isr;
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int nb_overflow;
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int minor = (int)handle;
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struct mpc5200_psc *psc =
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struct mpc5200_psc *psc =
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(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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/*
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@@ -341,9 +342,10 @@ static void mpc5200_psc_interrupt_handler(rtems_irq_hdl_param handle)
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*/
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c = (psc->rb_tb >> 24);
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nb_overflow = rtems_termios_enqueue_raw_characters((void *)ttyp[minor], (char *)&c, (int)1);
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channel_info[minor].rx_characters++;
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if (ttyp[minor] != NULL) {
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nb_overflow = rtems_termios_enqueue_raw_characters((void *)ttyp[minor], (char *)&c, (int)1);
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channel_info[minor].rx_characters++;
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}
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#ifndef SINGLE_CHAR_MODE
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}
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@@ -364,16 +366,17 @@ static void mpc5200_psc_interrupt_handler(rtems_irq_hdl_param handle)
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*/
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psc->isr_imr = channel_info[minor].shadow_imr &= ~(IMR_TX_RDY);
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if (ttyp[minor] != NULL) {
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#ifndef SINGLE_CHAR_MODE
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rtems_termios_dequeue_characters((void *)ttyp[minor], channel_info[minor].cur_tx_len);
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rtems_termios_dequeue_characters((void *)ttyp[minor], channel_info[minor].cur_tx_len);
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channel_info[minor].tx_characters += channel_info[minor].cur_tx_len;
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channel_info[minor].tx_characters += channel_info[minor].cur_tx_len;
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#else
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rtems_termios_dequeue_characters((void *)ttyp[minor], (int)1);
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rtems_termios_dequeue_characters((void *)ttyp[minor], (int)1);
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channel_info[minor].tx_characters++;
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channel_info[minor].tx_characters++;
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#endif
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}
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}
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if(isr & ISR_ERROR)
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@@ -403,10 +406,10 @@ static void mpc5200_psc_interrupt_handler(rtems_irq_hdl_param handle)
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void mpc5200_psc_enable(const rtems_irq_connect_data* ptr) {
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struct mpc5200_psc *psc;
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int minor = mpc5200_psc_irqname_to_minor(ptr->name);
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if (minor >= 0) {
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psc = (struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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psc->isr_imr = channel_info[minor].shadow_imr |=
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psc->isr_imr = channel_info[minor].shadow_imr |=
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(IMR_RX_RDY_FULL | IMR_TX_RDY);
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}
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}
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@@ -415,10 +418,10 @@ void mpc5200_psc_enable(const rtems_irq_connect_data* ptr) {
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void mpc5200_psc_disable(const rtems_irq_connect_data* ptr) {
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struct mpc5200_psc *psc;
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int minor = mpc5200_psc_irqname_to_minor(ptr->name);
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if (minor >= 0) {
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psc = (struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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psc->isr_imr = channel_info[minor].shadow_imr &=
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psc->isr_imr = channel_info[minor].shadow_imr &=
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~(IMR_RX_RDY_FULL | IMR_TX_RDY);
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}
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}
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@@ -427,7 +430,7 @@ void mpc5200_psc_disable(const rtems_irq_connect_data* ptr) {
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int mpc5200_psc_isOn(const rtems_irq_connect_data* ptr) {
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struct mpc5200_psc *psc;
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int minor = mpc5200_psc_irqname_to_minor(ptr->name);
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if (minor >= 0) {
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psc = (struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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return ((psc->isr_imr & IMR_RX_RDY_FULL) & (psc->isr_imr & IMR_TX_RDY));
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@@ -443,7 +446,7 @@ static rtems_irq_connect_data consoleIrqData;
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void mpc5200_uart_psc_initialize(int minor) {
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uint32_t baud_divider;
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struct mpc5200_psc *psc =
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struct mpc5200_psc *psc =
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(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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/*
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@@ -504,7 +507,7 @@ void mpc5200_uart_psc_initialize(int minor) {
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/*
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* Set lower timer counter
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*/
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psc->ctlr = baud_divider & 0x0000ffff;
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/*
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@@ -572,7 +575,7 @@ void mpc5200_uart_psc_initialize(int minor) {
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int mpc5200_uart_pollRead(int minor)
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{
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unsigned char c;
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struct mpc5200_psc *psc =
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struct mpc5200_psc *psc =
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(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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if(psc->sr_csr & (1 << 8))
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@@ -588,7 +591,7 @@ int mpc5200_uart_pollRead(int minor)
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int mpc5200_uart_pollWrite(int minor, const char *buf, int len)
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{
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const char *tmp_buf = buf;
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struct mpc5200_psc *psc =
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struct mpc5200_psc *psc =
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(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
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while(len--)
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@@ -614,7 +617,7 @@ int mpc5200_uart_write(int minor, const char *buf, int len)
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{
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int frame_len = len;
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const char *frame_buf = buf;
|
||||
struct mpc5200_psc *psc =
|
||||
struct mpc5200_psc *psc =
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(struct mpc5200_psc *)(&mpc5200.psc[psc_minor_to_regset[minor]]);
|
||||
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||||
/*
|
||||
@@ -684,30 +687,37 @@ rtems_device_driver console_initialize(rtems_device_major_number major, rtems_de
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rtems_status_code status;
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rtems_device_minor_number console_minor;
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char dev_name[] = "/dev/ttyx";
|
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uint32_t tty_num = 0;
|
||||
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||||
/*
|
||||
* Always use and set up TERMIOS
|
||||
*/
|
||||
console_minor = PSC1_MINOR;
|
||||
rtems_termios_initialize();
|
||||
|
||||
for (console_minor = PSC1_MINOR;
|
||||
console_minor < PSC1_MINOR + NUM_PORTS;
|
||||
console_minor++) {
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/*
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* check, whether UART is available for this board
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*/
|
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for (console_minor = PSC1_MINOR;
|
||||
console_minor < PSC1_MINOR + NUM_PORTS;
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console_minor++) {
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||||
/*
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* check, whether UART is available for this board
|
||||
*/
|
||||
if (0 != ((1 << console_minor) & (mpc5200_uart_avail_mask))) {
|
||||
/*
|
||||
* Do device-specific initialization and registration for Motorola IceCube
|
||||
*/
|
||||
mpc5200_uart_psc_initialize(console_minor); /* /dev/tty0 */
|
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dev_name[8] = '0' + console_minor - PSC1_MINOR;
|
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dev_name[8] = '0' + tty_num;
|
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status = rtems_io_register_name (dev_name, major, console_minor);
|
||||
|
||||
|
||||
if(status != RTEMS_SUCCESSFUL)
|
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rtems_fatal_error_occurred(status);
|
||||
{
|
||||
rtems_fatal_error_occurred(status);
|
||||
}
|
||||
|
||||
tty_num++;
|
||||
}
|
||||
}
|
||||
|
||||
/* Now register the RTEMS console */
|
||||
status = rtems_io_register_name ("/dev/console", major, PSC1_MINOR);
|
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|
||||
@@ -780,8 +790,9 @@ rtems_device_driver console_close(rtems_device_major_number major, rtems_device_
|
||||
if ( minor > NUM_PORTS-1 )
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
|
||||
return rtems_termios_close( arg );
|
||||
ttyp[minor] = NULL; /* mark for int handler: tty no longer open */
|
||||
|
||||
return rtems_termios_close( arg );
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
@@ -61,13 +61,15 @@
|
||||
*/
|
||||
/* ROM definitions (2 MB) */
|
||||
#define ROM_START 0xFFE00000
|
||||
#define ROM_END 0xFFFFFFFF
|
||||
#define ROM_SIZE 0x00200000
|
||||
#define ROM_END (ROM_START+ROM_SIZE-1)
|
||||
#define BOOT_START ROM_START
|
||||
#define BOOT_END ROM_END
|
||||
|
||||
/* SDRAM definitions (256 MB) */
|
||||
#define RAM_START 0x00000000
|
||||
#define RAM_END 0x0FFFFFFF
|
||||
#define RAM_START 0x00000000
|
||||
#define RAM_SIZE 0x10000000
|
||||
#define RAM_END (RAM_START+RAM_SIZE-1)
|
||||
|
||||
/* DPRAM definitions (64 KB) */
|
||||
#define DPRAM_START 0xFF000000
|
||||
@@ -198,7 +200,8 @@ void bsp_cleanup(void);
|
||||
#define UARTS_USE_TERMIOS_INT 1
|
||||
|
||||
/* ata modes */
|
||||
#undef ATA_USE_INT
|
||||
/* #undef ATA_USE_INT */
|
||||
#define ATA_USE_INT
|
||||
|
||||
/* clock settings */
|
||||
#if defined(HAS_UBOOT)
|
||||
@@ -211,6 +214,21 @@ void bsp_cleanup(void);
|
||||
#define G2_CLOCK 231000000 /* 231 MHz */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Convert decrement value to tenths of microsecnds (used by
|
||||
* shared timer driver).
|
||||
*
|
||||
* + CPU has a XLB_CLOCK bus,
|
||||
* + There are 4 bus cycles per click
|
||||
* + We return value in 1/10 microsecond units.
|
||||
* Modified following equation to integer equation to remove
|
||||
* floating point math.
|
||||
* (int) ((float)(_value) / ((XLB_CLOCK/1000000 * 0.1) / 4.0))
|
||||
*/
|
||||
|
||||
#define BSP_Convert_decrementer( _value ) \
|
||||
(int) (((_value) * 4000) / (XLB_CLOCK/10000))
|
||||
|
||||
/* slicetimer settings */
|
||||
#define USE_SLICETIMER_0 TRUE
|
||||
#define USE_SLICETIMER_1 FALSE
|
||||
|
||||
@@ -300,12 +300,15 @@ typedef struct mpc5200_
|
||||
#define GPT_STATUS_RESET 0x0000000F
|
||||
#define GPT_STATUS_TEXP (1 << 3)
|
||||
#define GPT_STATUS_PIN (1 << 8)
|
||||
#define GPT_EMSEL_GPIO_DIR (2 << 4)
|
||||
#define GPT_EMSEL_GPIO_OUT (1 << 4)
|
||||
#define GPT_EMSEL_GPIO_OUT_HIGH (3 << 4)
|
||||
#define GPT_EMSEL_TIMER_MS_GPIO (4 << 0)
|
||||
#define GPT_EMSEL_GPIO_IN (0 << 0)
|
||||
#define GPT_EMSEL_CE (1 << 12)
|
||||
#define GPT_EMSEL_ST_CONT (1 << 10)
|
||||
#define GPT_EMSEL_INTEN (1 << 8)
|
||||
#define GPT_EMSEL_WDEN (1 << 15)
|
||||
|
||||
#define GPT0 0
|
||||
#define GPT1 1
|
||||
|
||||
@@ -15,28 +15,49 @@
|
||||
#ifndef __tm27_h
|
||||
#define __tm27_h
|
||||
|
||||
#include <bsp/irq.h>
|
||||
|
||||
/*
|
||||
* Stuff for Time Test 27
|
||||
*/
|
||||
|
||||
#define MUST_WAIT_FOR_INTERRUPT 0
|
||||
#define MUST_WAIT_FOR_INTERRUPT 1
|
||||
|
||||
#define Install_tm27_vector( handler ) \
|
||||
do { \
|
||||
static rtems_irq_connect_data scIrqData = { \
|
||||
PPC_IRQ_SCALL, \
|
||||
(rtems_irq_hdl) handler, \
|
||||
NULL, \
|
||||
NULL, \
|
||||
NULL \
|
||||
}; \
|
||||
BSP_install_rtems_irq_handler (&scIrqData); \
|
||||
} while(0)
|
||||
void nullFunc() {}
|
||||
|
||||
#define Cause_tm27_intr() asm volatile ("sc")
|
||||
static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
|
||||
0,
|
||||
(rtems_irq_enable)nullFunc,
|
||||
(rtems_irq_disable)nullFunc,
|
||||
(rtems_irq_is_enabled) nullFunc};
|
||||
void Install_tm27_vector(void (*_handler)())
|
||||
{
|
||||
clockIrqData.hdl = _handler;
|
||||
if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
|
||||
printk("Error installing clock interrupt handler!\n");
|
||||
rtems_fatal_error_occurred(1);
|
||||
}
|
||||
}
|
||||
|
||||
#define Clear_tm27_intr() /* empty */
|
||||
#define Cause_tm27_intr() \
|
||||
do { \
|
||||
uint32_t _clicks = 8; \
|
||||
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
|
||||
} while (0)
|
||||
|
||||
#define Lower_tm27_intr() /* empty */
|
||||
#define Clear_tm27_intr() \
|
||||
do { \
|
||||
uint32_t _clicks = 0xffffffff; \
|
||||
asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
|
||||
} while (0)
|
||||
|
||||
#define Lower_tm27_intr() \
|
||||
do { \
|
||||
uint32_t _msr = 0; \
|
||||
_ISR_Set_level( 0 ); \
|
||||
asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
|
||||
_msr |= 0x8002; \
|
||||
asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
|
||||
} while (0)
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -26,6 +26,11 @@
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define MIN_NO_OF_TQ 7
|
||||
#define NO_OF_TABLE_ENTRIES 4
|
||||
#define TSEG_1 1
|
||||
#define TSEG_2 2
|
||||
#define SJW 3
|
||||
|
||||
#define MSCAN_MAX_DATA_BYTES 8
|
||||
#define MSCAN_RX_BUFF_NUM 4
|
||||
@@ -34,13 +39,19 @@ extern "C" {
|
||||
|
||||
#define MSCAN_A_DEV_NAME "/dev/mscana"
|
||||
#define MSCAN_B_DEV_NAME "/dev/mscanb"
|
||||
#define MSCAN_0_DEV_NAME "/dev/mscan0"
|
||||
#define MSCAN_1_DEV_NAME "/dev/mscan1"
|
||||
#define MSCAN_A 0
|
||||
#define MSCAN_B 1
|
||||
|
||||
#define MSCAN_INITIALIZED_MODE 0
|
||||
#define MSCAN_INIT_NORMAL_MODE 1
|
||||
#define MSCAN_NORMAL_MODE 2
|
||||
#define MSCAN_SLEEP_MODE 4
|
||||
#define MSCAN_NON_INITIALIZED_MODE 0
|
||||
#define MSCAN_INITIALIZED_MODE 1
|
||||
#define MSCAN_INIT_NORMAL_MODE 2
|
||||
#define MSCAN_NORMAL_MODE 4
|
||||
#define MSCAN_SLEEP_MODE 8
|
||||
|
||||
#define CAN_BIT_RATE_MAX 1000000
|
||||
#define CAN_BIT_RATE_MIN 100000
|
||||
|
||||
#define CAN_BIT_RATE 100000
|
||||
#define CAN_MAX_NO_OF_TQ 25
|
||||
@@ -54,7 +65,10 @@ extern "C" {
|
||||
#define MSCAN_GET_RX_ID_MASK 4
|
||||
#define MSCAN_SET_TX_ID 5
|
||||
#define MSCAN_GET_TX_ID 6
|
||||
|
||||
#define TOUCAN_MSCAN_INIT 7
|
||||
#define MSCAN_SET_BAUDRATE 8
|
||||
#define SET_TX_BUF_NO 9
|
||||
|
||||
#define MSCAN_RX_BUFF_NOACTIVE (0 << 4)
|
||||
#define MSCAN_RX_BUFF_EMPTY (1 << 6)
|
||||
@@ -62,8 +76,7 @@ extern "C" {
|
||||
#define MSCAN_RX_BUFF_OVERRUN ((MSCAN_RX_BUFF_EMPTY) | (MSCAN_RX_BUFF_FULL))
|
||||
#define MSCAN_RX_BUFF_BUSY (1 << 4)
|
||||
|
||||
#define MSCAN_A_MBUFF_MASK 0x07
|
||||
#define MSCAN_B_MBUFF_MASK 0x07
|
||||
#define MSCAN_MBUFF_MASK 0x07
|
||||
|
||||
#define MSCAN_TX_BUFF0 (1 << 0)
|
||||
#define MSCAN_TX_BUFF1 (1 << 1)
|
||||
@@ -175,7 +188,7 @@ extern "C" {
|
||||
#define SET_IDR7(u16) SET_IDR1(u16)
|
||||
|
||||
#define GET_IDR0(u16) ((uint16_t) ((u16) << 3))
|
||||
#define GET_IDR1(u16) ((uint16_t)((u16) >> 5))
|
||||
#define GET_IDR1(u16) ((uint16_t)(((u16) >> 5)&0x0007))
|
||||
|
||||
#define GET_IDR2(u16) GET_IDR0(u16)
|
||||
#define GET_IDR3(u16) GET_IDR1(u16)
|
||||
@@ -186,8 +199,31 @@ extern "C" {
|
||||
#define GET_IDR6(u16) GET_IDR0(u16)
|
||||
#define GET_IDR7(u16) GET_IDR1(u16)
|
||||
|
||||
#define NO_OF_MSCAN_A_RX_BUFF 20
|
||||
#define NO_OF_MSCAN_B_RX_BUFF 20
|
||||
#define SET_IDMR0(u16) ((uint8_t)((u16) >> 3))
|
||||
#define SET_IDMR1(u16) ((uint8_t)((((u16) & 0x0007) << 5))|0x001F)
|
||||
|
||||
#define SET_IDMR2(u16) SET_IDMR0(u16)
|
||||
#define SET_IDMR3(u16) SET_IDMR1(u16)
|
||||
|
||||
#define SET_IDMR4(u16) SET_IDMR0(u16)
|
||||
#define SET_IDMR5(u16) SET_IDMR1(u16)
|
||||
|
||||
#define SET_IDMR6(u16) SET_IDMR0(u16)
|
||||
#define SET_IDMR7(u16) SET_IDMR1(u16)
|
||||
|
||||
#define GET_IDMR0(u16) ((uint16_t) ((u16) << 3))
|
||||
#define GET_IDMR1(u16) ((uint16_t)(((u16) >> 5)&0x0007))
|
||||
|
||||
#define GET_IDMR2(u16) GET_IDMR0(u16)
|
||||
#define GET_IDMR3(u16) GET_IDMR1(u16)
|
||||
|
||||
#define GET_IDMR4(u16) GET_IDMR0(u16)
|
||||
#define GET_IDMR5(u16) GET_IDMR1(u16)
|
||||
|
||||
#define GET_IDMR6(u16) GET_IDMR0(u16)
|
||||
#define GET_IDMR7(u16) GET_IDMR1(u16)
|
||||
|
||||
#define NO_OF_MSCAN_RX_BUFF 20
|
||||
#define MSCAN_MESSAGE_SIZE(size) (((size)%CPU_ALIGNMENT) ? (((size) + CPU_ALIGNMENT)-((size) + CPU_ALIGNMENT)%CPU_ALIGNMENT) : (size))
|
||||
|
||||
#define TX_BUFFER_0 0
|
||||
@@ -199,6 +235,11 @@ extern "C" {
|
||||
#define RX_BUFFER_2 2
|
||||
#define RX_BUFFER_3 3
|
||||
|
||||
#define NO_OF_MSCAN_TX_BUFF 20
|
||||
#define RING_BUFFER_EMPTY(rbuff) ((((rbuff)->head) == ((rbuff)->tail)) ? TRUE : FALSE)
|
||||
#define RING_BUFFER_FULL(rbuff) ((((rbuff)->head) == ((rbuff)->tail)) ? TRUE : FALSE)
|
||||
|
||||
|
||||
typedef struct _mscan_handle
|
||||
{
|
||||
uint8_t mscan_channel;
|
||||
@@ -212,22 +253,33 @@ struct can_message
|
||||
uint16_t mess_time_stamp;
|
||||
uint8_t mess_data[MSCAN_MAX_DATA_BYTES];
|
||||
uint8_t mess_len;
|
||||
uint32_t toucan_tx_id;
|
||||
};
|
||||
|
||||
volatile struct ring_buf
|
||||
{
|
||||
volatile struct can_message *buf_ptr;
|
||||
volatile struct can_message *head_ptr;
|
||||
volatile struct can_message *tail_ptr;
|
||||
};
|
||||
|
||||
struct mpc5200_rx_cntrl
|
||||
{
|
||||
struct can_message can_rx_message[MSCAN_RX_BUFF_NUM];
|
||||
};
|
||||
|
||||
|
||||
struct mscan_channel_info
|
||||
{
|
||||
volatile struct mpc5200_mscan *regs;
|
||||
uint32_t int_rx_err;
|
||||
rtems_id rx_qid;
|
||||
rtems_id rx_qid;
|
||||
uint32_t rx_qname;
|
||||
rtems_id tx_rb_sid;
|
||||
uint32_t tx_rb_sname;
|
||||
uint8_t id_extended;
|
||||
uint8_t mode;
|
||||
uint8_t tx_buf_no;
|
||||
volatile struct ring_buf tx_ring_buf;
|
||||
};
|
||||
|
||||
struct mscan_rx_parms
|
||||
@@ -248,6 +300,8 @@ struct mscan_ctrl_parms
|
||||
uint32_t ctrl_id;
|
||||
uint32_t ctrl_id_mask;
|
||||
uint8_t ctrl_reg_no;
|
||||
uint8_t ctrl_tx_buf_no;
|
||||
uint32_t ctrl_can_bitrate;
|
||||
void (*toucan_cb_fnc)(int16_t);
|
||||
};
|
||||
|
||||
@@ -304,6 +358,8 @@ void mpc5200_mscan_perform_init_mode_settings(volatile struct mpc5200_mscan *);
|
||||
void mpc5200_mscan_perform_normal_mode_settings(volatile struct mpc5200_mscan *);
|
||||
rtems_status_code mpc5200_mscan_set_mode(rtems_device_minor_number, uint8_t);
|
||||
rtems_status_code mscan_channel_initialize(rtems_device_major_number, rtems_device_minor_number);
|
||||
uint8_t prescaler_calculation(uint32_t, uint32_t, uint8_t *);
|
||||
void mpc5200_mscan_perform_bit_time_settings(volatile struct mpc5200_mscan *, uint32_t, uint32_t);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -77,9 +77,13 @@ $(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
|
||||
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
|
||||
|
||||
$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
|
||||
$(PROJECT_LIB)/linkcmds.brs5l: startup/linkcmds.brs5l $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.brs5l
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.brs5l
|
||||
|
||||
$(PROJECT_LIB)/linkcmds.pm520: startup/linkcmds.pm520 $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.pm520
|
||||
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.pm520
|
||||
|
||||
$(PROJECT_LIB)/linkcmds.pm520: startup/linkcmds.pm520 $(PROJECT_LIB)/$(dirstamp)
|
||||
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.pm520
|
||||
|
||||
@@ -111,8 +111,8 @@
|
||||
.endm
|
||||
|
||||
.macro LWI reg, value
|
||||
lis \reg , \value@h
|
||||
ori \reg , \reg, \value@l
|
||||
lis \reg , (\value)@h
|
||||
ori \reg , \reg, (\value)@l
|
||||
sync
|
||||
.endm
|
||||
|
||||
@@ -286,7 +286,7 @@ start:
|
||||
|
||||
|
||||
|
||||
#ifdef RSM5LOG
|
||||
#ifdef BRS5L
|
||||
LWI r30, CSBOOTROM_VAL
|
||||
stw r30, CSBOOTROM(r31) /* Set CSBOOTROM */
|
||||
|
||||
@@ -299,7 +299,9 @@ start:
|
||||
rlwinm r30, r30,17,15,31
|
||||
stw r30, CS0STR(r31) /* Set CS0STR */
|
||||
|
||||
LWI r30, ROM_END
|
||||
lis r30, ROM_END@h
|
||||
ori r30, r30, ROM_END@l
|
||||
|
||||
rlwinm r30, r30,17,15,31
|
||||
stw r30, CS0STP(r31) /* Set CS0STP */
|
||||
|
||||
@@ -327,7 +329,7 @@ reloc_in_CS0:
|
||||
ori r30,r30,0x1a /* size code: bank is 128MByte */
|
||||
stw r30,SDRAMCS0(r31) /* Set SDRAMCS0 */
|
||||
|
||||
LWI r30,(RAM_END+1-RAM_START)/2
|
||||
LWI r30,(RAM_SIZE)>>1
|
||||
ori r30,r30,0x1a /* size code: bank is 128MByte */
|
||||
stw r30, SDRAMCS1(r31) /* Set SDRAMCS1 */
|
||||
|
||||
@@ -441,12 +443,13 @@ skip_ROM_start:
|
||||
stw r30,ADREN(r31) /* enable CS1 */
|
||||
|
||||
/* clear entire on chip SRAM (unique for ROM startup) */
|
||||
LWI r30, (MBAR+ONCHIP_SRAM_OFFSET) /* get start address of onchip SRAM */
|
||||
lis r30, (MBAR+ONCHIP_SRAM_OFFSET)@h /* get start address of onchip SRAM */
|
||||
ori r30,r30,(MBAR+ONCHIP_SRAM_OFFSET)@l
|
||||
LWI r29, ONCHIP_SRAM_SIZE /* get size of onchip SRAM */
|
||||
|
||||
bl clr_mem /* Clear onchip SRAM */
|
||||
|
||||
#endif /* defined(RSM5LOG) */
|
||||
#endif /* defined(BRS5L) */
|
||||
/* clear .bss section (unique for ROM startup) */
|
||||
LWI r30, _bss_start /* get start address of bss section */
|
||||
LWI r29, _bss_size /* get size of bss section */
|
||||
@@ -522,7 +525,7 @@ SDRAM_init:
|
||||
LWI r30, 0xCCC70004 /* Burst2Read Prec.delay=0x8, Burst Write delay=0x8 */
|
||||
stw r30, CFG2(r31) /* Burst Read2Write delay=0xB, Burst length=0x7, Read Tap=0x4 */
|
||||
|
||||
#ifdef RSM5LOG
|
||||
#ifdef BRS5L
|
||||
LWI r30, 0xD1470000 /* Mode Set enabled, Clock enabled, Auto refresh enabled, Mem. data drv */
|
||||
stw r30, CTRL(r31) /* Refresh counter=0xFFFF */
|
||||
|
||||
@@ -608,7 +611,7 @@ copy_image_byte:
|
||||
|
||||
copy_image_end:
|
||||
blr
|
||||
#endif /* defined(RSM5LOG) */
|
||||
#endif /* defined(BRS5L) */
|
||||
|
||||
FID_DCache:
|
||||
mflr r26
|
||||
@@ -740,10 +743,6 @@ FPU_init:
|
||||
mtfsfi 6, 0
|
||||
mtfsfi 7, 0
|
||||
|
||||
|
||||
CLRBITS r30, r29, MSR_FP /* disable FPU and FPU exceptions */
|
||||
mtmsr r30
|
||||
|
||||
blr
|
||||
|
||||
SPRG_init: /* initialize registers */
|
||||
|
||||
@@ -148,7 +148,7 @@ pcf8563_get_time(int minor, rtems_time_of_day *time)
|
||||
v1 = info[PCF8563_DAY_ADR-PCF8563_SECOND_ADR] & PCF8563_DAY_MASK;
|
||||
time->day = From_BCD(v1);
|
||||
|
||||
v1 = info[PCF8563_HOUR_ADR-PCF8563_SECOND_ADR] & PCF8563_HOUR_ADR;
|
||||
v1 = info[PCF8563_HOUR_ADR-PCF8563_SECOND_ADR] & PCF8563_HOUR_MASK;
|
||||
time->hour = From_BCD(v1);
|
||||
|
||||
v1 = info[PCF8563_MINUTE_ADR-PCF8563_SECOND_ADR] & PCF8563_MINUTE_MASK;
|
||||
@@ -211,7 +211,7 @@ pcf8563_set_time(int minor, rtems_time_of_day *time)
|
||||
*/
|
||||
try = 0;
|
||||
do {
|
||||
status = i2c_write(bus, addr, info, 8);
|
||||
status = i2c_write(bus, addr, info,sizeof(info));
|
||||
try++;
|
||||
} while ((status != I2C_SUCCESSFUL) && (try < 10));
|
||||
|
||||
|
||||
@@ -1012,6 +1012,7 @@ ata_initialize(rtems_device_major_number major,
|
||||
char name[ATA_MAX_NAME_LENGTH];
|
||||
dev_t device;
|
||||
ata_int_st_t *int_st;
|
||||
|
||||
#if defined(ATA_USE_OLD_EXCEPTIONS)
|
||||
rtems_isr_entry old_isr;
|
||||
#else
|
||||
@@ -1045,7 +1046,9 @@ ata_initialize(rtems_device_major_number major,
|
||||
*/
|
||||
status = rtems_task_create(
|
||||
rtems_build_name ('A', 'T', 'A', 'T'),
|
||||
ATA_DRIVER_TASK_PRIORITY,
|
||||
((ata_driver_task_priority > 0)
|
||||
? ata_driver_task_priority
|
||||
: ATA_DRIVER_TASK_DEFAULT_PRIORITY),
|
||||
ATA_DRIVER_TASK_STACK_SIZE,
|
||||
RTEMS_PREEMPT | RTEMS_NO_TIMESLICE | RTEMS_ASR |
|
||||
RTEMS_INTERRUPT_LEVEL(0),
|
||||
|
||||
@@ -41,9 +41,9 @@ rtems_device_driver ata_initialize(
|
||||
* FIXME: should be configured more easy...
|
||||
*/
|
||||
#define ATA_DRIVER_MESSAGE_QUEUE_SIZE 50
|
||||
#define ATA_DRIVER_TASK_PRIORITY 140
|
||||
#define ATA_DRIVER_TASK_STACK_SIZE 16*1024
|
||||
|
||||
#define ATA_DRIVER_TASK_DEFAULT_PRIORITY 140
|
||||
extern rtems_task_priority ata_driver_task_priority;
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -91,6 +91,9 @@ typedef struct rtems_bdbuf_config {
|
||||
extern rtems_bdbuf_config rtems_bdbuf_configuration[];
|
||||
extern int rtems_bdbuf_configuration_size;
|
||||
|
||||
#define SWAPOUT_TASK_DEFAULT_PRIORITY 15
|
||||
extern rtems_task_priority swapout_task_priority;
|
||||
|
||||
/* rtems_bdbuf_init --
|
||||
* Prepare buffering layer to work - initialize buffer descritors
|
||||
* and (if it is neccessary) buffers. Buffers will be allocated accoriding
|
||||
|
||||
@@ -28,8 +28,7 @@
|
||||
#define BLKDEV_FATAL_BDBUF_SWAPOUT BLKDEV_FATAL_ERROR(2)
|
||||
|
||||
|
||||
#define SWAPOUT_PRIORITY 15
|
||||
#define SWAPOUT_STACK_SIZE (RTEMS_MINIMUM_STACK_SIZE * 2)
|
||||
#define SWAPOUT_TASK_STACK_SIZE (RTEMS_MINIMUM_STACK_SIZE * 2)
|
||||
|
||||
#define READ_MULTIPLE
|
||||
|
||||
@@ -863,9 +862,11 @@ rtems_bdbuf_init(rtems_bdbuf_config *conf_table, int size)
|
||||
|
||||
/* Create and start swapout task */
|
||||
rc = rtems_task_create(
|
||||
rtems_build_name('B', 'S', 'W', 'P'),
|
||||
SWAPOUT_PRIORITY,
|
||||
SWAPOUT_STACK_SIZE,
|
||||
rtems_build_name('B', 'S', 'W', 'P'),
|
||||
((swapout_task_priority > 0)
|
||||
? swapout_task_priority
|
||||
: SWAPOUT_TASK_DEFAULT_PRIORITY),
|
||||
SWAPOUT_TASK_STACK_SIZE,
|
||||
RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
|
||||
RTEMS_DEFAULT_ATTRIBUTES,
|
||||
&bd_ctx.swapout_task);
|
||||
|
||||
@@ -116,6 +116,7 @@
|
||||
#define __pure
|
||||
#define __pure2
|
||||
#define __unused
|
||||
#define __used
|
||||
#define __attribute__(x)
|
||||
#endif
|
||||
#if __GNUC__ == 2 && __GNUC_MINOR__ < 5
|
||||
@@ -124,6 +125,7 @@
|
||||
#define __pure __const
|
||||
#define __pure2
|
||||
#define __unused
|
||||
#define __used
|
||||
#endif
|
||||
#if __GNUC__ == 2 && __GNUC_MINOR__ >= 5 && __GNUC_MINOR__ < 7
|
||||
#define __dead
|
||||
@@ -131,6 +133,7 @@
|
||||
#define __pure
|
||||
#define __pure2 __attribute__((__const__))
|
||||
#define __unused
|
||||
#define __used
|
||||
#endif
|
||||
#if __GNUC__ == 2 && __GNUC_MINOR__ >= 7 || __GNUC__ >= 3
|
||||
#define __dead
|
||||
@@ -138,6 +141,7 @@
|
||||
#define __pure
|
||||
#define __pure2 __attribute__((__const__))
|
||||
#define __unused __attribute__((__unused__))
|
||||
#define __used __attribute__((__used__))
|
||||
#endif
|
||||
|
||||
#ifdef __GNUC__
|
||||
|
||||
@@ -80,7 +80,15 @@ typedef struct {
|
||||
* max_filesize with blocks of 512 is 1,082,195,456
|
||||
*/
|
||||
|
||||
#define IMFS_MEMFILE_BYTES_PER_BLOCK 128
|
||||
#define IMFS_MEMFILE_DEFAULT_BYTES_PER_BLOCK 128
|
||||
extern int imfs_rq_memfile_bytes_per_block;
|
||||
/*
|
||||
* FIXME: make and use derivates from this,
|
||||
* a shift count and a mask
|
||||
*/
|
||||
extern int imfs_memfile_bytes_per_block;
|
||||
|
||||
#define IMFS_MEMFILE_BYTES_PER_BLOCK imfs_memfile_bytes_per_block
|
||||
#define IMFS_MEMFILE_BLOCK_SLOTS \
|
||||
(IMFS_MEMFILE_BYTES_PER_BLOCK / sizeof(void *))
|
||||
|
||||
|
||||
@@ -30,6 +30,37 @@
|
||||
#include <stdio.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* IMFS_determine_bytes_per_block
|
||||
*/
|
||||
int imfs_memfile_bytes_per_block = 0;
|
||||
|
||||
static int IMFS_determine_bytes_per_block(
|
||||
int *dest_bytes_per_block,
|
||||
int requested_bytes_per_block,
|
||||
int default_bytes_per_block
|
||||
)
|
||||
{
|
||||
rtems_boolean is_valid = FALSE;
|
||||
int bit_mask;
|
||||
/*
|
||||
* check, whether requested bytes per block is valid
|
||||
*/
|
||||
for (bit_mask = 16;
|
||||
!is_valid && (bit_mask <= 512);
|
||||
bit_mask <<= 1) {
|
||||
if (bit_mask == requested_bytes_per_block) {
|
||||
is_valid = TRUE;
|
||||
}
|
||||
}
|
||||
*dest_bytes_per_block = ((is_valid)
|
||||
? requested_bytes_per_block
|
||||
: default_bytes_per_block);
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* IMFS_initialize
|
||||
*/
|
||||
@@ -44,6 +75,13 @@ int IMFS_initialize_support(
|
||||
IMFS_fs_info_t *fs_info;
|
||||
IMFS_jnode_t *jnode;
|
||||
|
||||
/*
|
||||
* determine/check value for imfs_memfile_bytes_per_block
|
||||
*/
|
||||
IMFS_determine_bytes_per_block(&imfs_memfile_bytes_per_block,
|
||||
imfs_rq_memfile_bytes_per_block,
|
||||
IMFS_MEMFILE_DEFAULT_BYTES_PER_BLOCK);
|
||||
|
||||
/*
|
||||
* Create the root node
|
||||
*
|
||||
|
||||
@@ -543,6 +543,15 @@ rtems_task shell_shell(rtems_task_argument task_argument) {
|
||||
rtems_current_user_env->euid=
|
||||
rtems_current_user_env->egid=0;
|
||||
|
||||
/*
|
||||
* newlib delays the creation of default stdio 'til the
|
||||
* first I/O operation, therefore we must perform dummy
|
||||
* operations before we redirect stdio
|
||||
*/
|
||||
ftell(stdin);
|
||||
ftell(stdout);
|
||||
ftell(stderr);
|
||||
|
||||
stdin =fopen(devname,"r+");
|
||||
|
||||
if (!stdin) {
|
||||
|
||||
@@ -43,6 +43,7 @@
|
||||
* Kernel variables for tcp.
|
||||
*/
|
||||
|
||||
#ifdef __BSD_VISIBLE
|
||||
/*
|
||||
* Tcp control block, one per tcp; fields:
|
||||
*/
|
||||
@@ -196,6 +197,7 @@ struct rmxp_tao {
|
||||
#define intotcpcb(ip) ((struct tcpcb *)(ip)->inp_ppcb)
|
||||
#define intotw(ip) ((struct tcptw *)(ip)->inp_ppcb)
|
||||
#define sototcpcb(so) (intotcpcb(sotoinpcb(so)))
|
||||
#endif /* __BSD_VISIBLE */
|
||||
|
||||
/*
|
||||
* The smoothed round-trip time and estimated variance
|
||||
|
||||
@@ -42,7 +42,7 @@
|
||||
#ifdef __GNUC__
|
||||
#define __MAKE_SET(set, sym) \
|
||||
static void const * const __set_##set##_sym_##sym \
|
||||
__attribute((section("set_" #set))) __unused = &sym
|
||||
__attribute((section("set_" #set))) __used = &sym
|
||||
#else /* !__GNUC__ */
|
||||
#ifndef lint
|
||||
#error "This file needs to be compiled by GCC or lint"
|
||||
|
||||
@@ -123,8 +123,15 @@ extern int rtems_telnetd_maximum_ptys;
|
||||
|
||||
#include <rtems/imfs.h>
|
||||
|
||||
#ifndef CONFIGURE_IMFS_MEMFILE_BYTES_PER_BLOCK
|
||||
#define CONFIGURE_IMFS_MEMFILE_BYTES_PER_BLOCK \
|
||||
IMFS_MEMFILE_DEFAULT_BYTES_PER_BLOCK
|
||||
#endif
|
||||
#ifdef CONFIGURE_INIT
|
||||
int imfs_rq_memfile_bytes_per_block = CONFIGURE_IMFS_MEMFILE_BYTES_PER_BLOCK;
|
||||
#endif /* CONFIGURE_INIT */
|
||||
|
||||
#ifdef CONFIGURE_INIT
|
||||
#ifndef CONFIGURE_HAS_OWN_MOUNT_TABLE
|
||||
rtems_filesystem_mount_table_t configuration_mount_table = {
|
||||
#ifdef CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM
|
||||
@@ -296,6 +303,18 @@ rtems_initialization_tasks_table Initialization_tasks[] = {
|
||||
#include <rtems/devnull.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_IDE_DRIVER
|
||||
/* the ide driver needs the ATA driver */
|
||||
# ifndef CONFIGURE_APPLICATION_NEEDS_ATA_DRIVER
|
||||
# define CONFIGURE_APPLICATION_NEEDS_ATA_DRIVER
|
||||
# endif
|
||||
#include <libchip/ide_ctrl.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_ATA_DRIVER
|
||||
#include <libchip/ata.h>
|
||||
#endif
|
||||
|
||||
#ifndef CONFIGURE_HAS_OWN_DEVICE_DRIVER_TABLE
|
||||
|
||||
#ifdef CONFIGURE_INIT
|
||||
@@ -312,12 +331,20 @@ rtems_driver_address_table Device_drivers[] = {
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_STUB_DRIVER
|
||||
DEVNULL_DRIVER_TABLE_ENTRY,
|
||||
#endif
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_IDE_DRIVER
|
||||
IDE_CONTROLLER_DRIVER_TABLE_ENTRY,
|
||||
#endif
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_ATA_DRIVER
|
||||
ATA_DRIVER_TABLE_ENTRY,
|
||||
#endif
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_NULL_DRIVER
|
||||
NULL_DRIVER_TABLE_ENTRY
|
||||
#elif !defined(CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER) && \
|
||||
!defined(CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER) && \
|
||||
!defined(CONFIGURE_APPLICATION_NEEDS_RTC_DRIVER) && \
|
||||
!defined(CONFIGURE_APPLICATION_NEEDS_STUB_DRIVER)
|
||||
!defined(CONFIGURE_APPLICATION_NEEDS_STUB_DRIVER) && \
|
||||
!defined(CONFIGURE_APPLICATION_NEEDS_IDE_DRIVER) && \
|
||||
!defined(CONFIGURE_APPLICATION_NEEDS_ATA_DRIVER)
|
||||
NULL_DRIVER_TABLE_ENTRY
|
||||
#endif
|
||||
};
|
||||
@@ -346,6 +373,52 @@ rtems_driver_address_table Device_drivers[] = {
|
||||
#define CONFIGURE_MAXIMUM_DEVICES 20
|
||||
#endif
|
||||
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_ATA_DRIVER
|
||||
/*
|
||||
* configure the priority of the ATA driver task
|
||||
*/
|
||||
# ifndef CONFIGURE_ATA_DRIVER_TASK_PRIORITY
|
||||
# define CONFIGURE_ATA_DRIVER_TASK_PRIORITY ATA_DRIVER_TASK_DEFAULT_PRIORITY
|
||||
# endif
|
||||
# ifdef CONFIGURE_INIT
|
||||
rtems_task_priority ata_driver_task_priority
|
||||
= CONFIGURE_ATA_DRIVER_TASK_PRIORITY;
|
||||
# endif /* CONFIGURE_INIT */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* add bdbuf configuration and values for swapout task priority
|
||||
*/
|
||||
#ifdef CONFIGURE_APPLICATION_NEEDS_LIBBLOCK
|
||||
#include <rtems/bdbuf.h>
|
||||
/*
|
||||
* configure the priority of the bdbuf swapout task
|
||||
*/
|
||||
#ifndef CONFIGURE_SWAPOUT_TASK_PRIORITY
|
||||
#define CONFIGURE_SWAPOUT_TASK_PRIORITY SWAPOUT_TASK_DEFAULT_PRIORITY
|
||||
#endif
|
||||
#ifdef CONFIGURE_INIT
|
||||
rtems_task_priority swapout_task_priority
|
||||
= CONFIGURE_SWAPOUT_TASK_PRIORITY;
|
||||
#endif /* CONFIGURE_INIT */
|
||||
#ifndef CONFIGURE_HAS_OWN_BDBUF_TABLE
|
||||
|
||||
#ifndef CONFIGURE_BDBUF_BUFFER_COUNT
|
||||
#define CONFIGURE_BDBUF_BUFFER_COUNT 64
|
||||
#endif /* CONFIGURE_BDBUF_BUFFER_COUNT */
|
||||
|
||||
#ifndef CONFIGURE_BDBUF_BUFFER_SIZE
|
||||
#define CONFIGURE_BDBUF_BUFFER_SIZE 512
|
||||
#endif /* CONFIGURE_BDBUF_BUFFER_SIZE */
|
||||
#ifdef CONFIGURE_INIT
|
||||
rtems_bdbuf_config rtems_bdbuf_configuration[] = {
|
||||
{CONFIGURE_BDBUF_BUFFER_SIZE,CONFIGURE_BDBUF_BUFFER_COUNT,NULL}
|
||||
};
|
||||
int rtems_bdbuf_configuration_size =( sizeof(rtems_bdbuf_configuration)
|
||||
/sizeof(rtems_bdbuf_configuration[0]));
|
||||
#endif /* CONFIGURE_INIT */
|
||||
#endif /* CONFIGURE_HAS_OWN_BDBUF_TABLE */
|
||||
#endif /* CONFIGURE_APPLICATION_NEEDS_LIBBLOCK */
|
||||
/*
|
||||
* Default Multiprocessing Configuration Table. The defaults are
|
||||
* appropriate for most of the RTEMS Multiprocessor Test Suite. Each
|
||||
|
||||
@@ -22,7 +22,7 @@ CPU_CFLAGS = -mcpu=603e -mstrict-align -Dmpc8260
|
||||
# optimize flag: typically -0, could use -O4 or -fast
|
||||
# -O4 is ok for RTEMS
|
||||
# NOTE: some level of -O may be actually required by inline assembler
|
||||
CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions
|
||||
CFLAGS_OPTIMIZE_V=-O4 -fno-keep-inline-functions -g
|
||||
|
||||
# The following are definitions of make-exe which will work using ld as
|
||||
# is currently required. It is expected that as of gcc 2.8, the end user
|
||||
|
||||
@@ -32,31 +32,10 @@ rtems_task Init(
|
||||
|
||||
#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
|
||||
#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
|
||||
#define CONFIGURE_APPLICATION_NEEDS_IDE_DRIVER
|
||||
#define CONFIGURE_APPLICATION_NEEDS_LIBBLOCK
|
||||
#define CONFIGURE_USE_IMFS_AS_BASE_FILESYSTEM
|
||||
|
||||
#define CONFIGURE_HAS_OWN_DEVICE_DRIVER_TABLE
|
||||
|
||||
#ifdef CONFIGURE_INIT
|
||||
rtems_driver_address_table Device_drivers[] =
|
||||
{
|
||||
CONSOLE_DRIVER_TABLE_ENTRY
|
||||
,CLOCK_DRIVER_TABLE_ENTRY
|
||||
#ifdef RTEMS_BSP_HAS_IDE_DRIVER
|
||||
,IDE_CONTROLLER_DRIVER_TABLE_ENTRY
|
||||
/* important: ATA driver must be after ide drivers */
|
||||
,ATA_DRIVER_TABLE_ENTRY
|
||||
#endif
|
||||
};
|
||||
|
||||
#include <rtems/bdbuf.h>
|
||||
rtems_bdbuf_config rtems_bdbuf_configuration[] = {
|
||||
{512,128,NULL}
|
||||
};
|
||||
int rtems_bdbuf_configuration_size =( sizeof(rtems_bdbuf_configuration)
|
||||
/sizeof(rtems_bdbuf_configuration[0]));
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* XXX: these values are higher than needed...
|
||||
*/
|
||||
|
||||
Reference in New Issue
Block a user