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cpukit/microblaze: Clarify interrupt frame usage

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Avoid use of magic numbers in favor of named constants and add MSR to
the interrupt frame so that thread dispatch can occur on exceptions as
well.
This commit is contained in:
Kinsey Moore authored and Joel Sherrill committed 2022-02-04 11:30:59 -06:00
1 parent ace9955fc4
commit c6d8d1cb2b
3 files changed
+17 -6
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bsps/microblaze/microblaze_fpga/start/_interrupt_handler.S
+3 -1
View File
@@ -31,6 +31,8 @@
*/
#include <rtems/score/cpuimpl.h>
.text
.globl _interrupt_handler # Interrupt Handler Label
.align 2
@@ -41,7 +43,7 @@
nop
#else /* __rtems__ */
/* Subtract stack frame */
addik r1, r1, -52
addik r1, r1, -(CPU_INTERRUPT_FRAME_SIZE)
swi r5, r1, 8
cpukit/score/cpu/microblaze/cpu_asm.S
+12 -4
View File
@@ -53,6 +53,8 @@ _ISR_Handler:
swi r12, r1, MICROBLAZE_INTERRUPT_FRAME_R12
swi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
swi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
mfs r3, rmsr
swi r3, r1, MICROBLAZE_INTERRUPT_FRAME_MSR
/* Disable dispatching */
lwi r3, r0, _Per_CPU_Information + 16
@@ -76,7 +78,7 @@ _ISR_Handler:
switch_to_interrupt_stack:
add r4, r0, r1
lwi r1, r0, _Per_CPU_Information + 4
addik r1, r1, -52
addik r1, r1, -(CPU_INTERRUPT_FRAME_SIZE)
swi r4, r1, 0
on_interrupt_stack:
@@ -118,6 +120,8 @@ after_stack_switch:
quick_exit:
/* Simple return from nested interrupt */
/* Restore registers */
lwi r3, r1, MICROBLAZE_INTERRUPT_FRAME_MSR
mts rmsr, r3
lwi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
lwi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
lwi r5, r1, MICROBLAZE_INTERRUPT_FRAME_R5
@@ -133,14 +137,14 @@ quick_exit:
lwi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
/* Remove stack frame */
addik r1, r1, 52
addik r1, r1, CPU_INTERRUPT_FRAME_SIZE
rtid r14, 0
nop
thread_dispatch:
/* Reserve stack */
addik r1, r1, -52
addik r1, r1, -(CPU_INTERRUPT_FRAME_SIZE)
/* Save scratch registers */
swi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
swi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
@@ -155,11 +159,15 @@ thread_dispatch:
swi r14, r1, MICROBLAZE_INTERRUPT_FRAME_R14
swi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
swi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
mfs r3, rmsr
swi r3, r1, MICROBLAZE_INTERRUPT_FRAME_MSR
bralid r15, _Thread_Dispatch
nop
/* Restore scratch registers */
lwi r3, r1, MICROBLAZE_INTERRUPT_FRAME_MSR
mts rmsr, r3
lwi r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
lwi r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
lwi r5, r1, MICROBLAZE_INTERRUPT_FRAME_R5
@@ -174,6 +182,6 @@ thread_dispatch:
lwi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
lwi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
/* Free stack space */
addik r1, r1, 52
addik r1, r1, CPU_INTERRUPT_FRAME_SIZE
bri quick_exit
cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h
+2 -1
View File
@@ -49,7 +49,7 @@
*/
#define CPU_PER_CPU_CONTROL_SIZE 0
#define CPU_INTERRUPT_FRAME_SIZE 52
#define CPU_INTERRUPT_FRAME_SIZE 56
#define MICROBLAZE_INTERRUPT_FRAME_R3 0
#define MICROBLAZE_INTERRUPT_FRAME_R4 4
@@ -64,6 +64,7 @@
#define MICROBLAZE_INTERRUPT_FRAME_R14 40
#define MICROBLAZE_INTERRUPT_FRAME_R15 44
#define MICROBLAZE_INTERRUPT_FRAME_R18 48
#define MICROBLAZE_INTERRUPT_FRAME_MSR 52
#ifndef ASM