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2008-09-14 Joel Sherrill <joel.sherrill@oarcorp.com>

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* Makefile.am, configure.ac, startup/bspstart.c: Create
	bsp_get_work_area() into its own file and use BSP Framework to
	perform more initialization.
	* startup/bspgetworkarea.c: New file.
This commit is contained in:
Joel Sherrill
2008-09-14 23:33:05 +00:00
parent 5c8d42b7b2
commit c4515a1491
5 changed files with 134 additions and 161 deletions
Download Patch File Download Diff File Expand all files Collapse all files
c/src/lib/libbsp/powerpc/haleakala/ChangeLog
+7
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@@ -1,3 +1,10 @@
2008-09-14 Joel Sherrill <joel.sherrill@oarcorp.com>
* Makefile.am, configure.ac, startup/bspstart.c: Create
bsp_get_work_area() into its own file and use BSP Framework to
perform more initialization.
* startup/bspgetworkarea.c: New file.
2008-09-06 Ralf Corsépius <ralf.corsepius@rtems.org>
* startup/bspstart.c: Convert to "bool".
c/src/lib/libbsp/powerpc/haleakala/Makefile.am
+2 -1
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@@ -30,7 +30,8 @@ dist_project_lib_DATA += startup/linkcmds
startup_SOURCES = startup/bspclean.c ../../shared/bsplibc.c \
../../shared/bsppost.c startup/bspstart.c ../../shared/bootcard.c \
../../shared/sbrk.c \
../../shared/bsppredriverhook.c startup/bspgetworkarea.c \
../../shared/bsppretaskinghook.c ../../shared/sbrk.c \
../../shared/gnatinstallhandler.c
dlentry_SOURCES = dlentry/dlentry.S
c/src/lib/libbsp/powerpc/haleakala/configure.ac
+1
View File
@@ -31,6 +31,7 @@ RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE],
[This defines the base address of the exception table.
NOTE: Vectors are actually at 0xFFF00000 but file starts at offset.])
RTEMS_BSP_BOOTCARD_HANDLES_RAM_ALLOCATION
# Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile])
c/src/lib/libbsp/powerpc/haleakala/startup/bspgetworkarea.c
+37
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@@ -0,0 +1,37 @@
/*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <bsp.h>
#include <bsp/bootcard.h>
#include <stdint.h>
extern void *_WorkspaceStart;
extern void *_RAMEnd;
/*
* This method returns the base address and size of the area which
* is to be allocated between the RTEMS Workspace and the C Program
* Heap.
*/
void bsp_get_work_area(
void **work_area_start,
size_t *work_area_size,
void **heap_start,
size_t *heap_size
)
{
uintptr_t size;
size = (uintptr_t)&_RAMEnd - (uintptr_t)&_WorkspaceStart;
*work_area_start = (void *)&_WorkspaceStart;
*work_area_size = size;
*heap_start = BSP_BOOTCARD_HEAP_USES_WORK_AREA;
*heap_size = BSP_BOOTCARD_HEAP_SIZE_DEFAULT;
}
c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c
+87 -160
View File
@@ -9,7 +9,7 @@
*
* OUTPUT: NONE
*
* Author: Thomas Doerfler <td@imd.m.isar.de>
* Author: Thomas Doerfler <td@imd.m.isar.de>
* IMD Ingenieurbuero fuer Microcomputertechnik
*
* COPYRIGHT (c) 1998 by IMD
@@ -17,7 +17,7 @@
* Changes from IMD are covered by the original distributions terms.
* This file has been derived from the papyrus BSP:
*
* Author: Andrew Bray <andy@i-cubed.co.uk>
* Author: Andrew Bray <andy@i-cubed.co.uk>
*
* COPYRIGHT (c) 1995 by i-cubed ltd.
*
@@ -63,8 +63,6 @@
#include <bsp.h>
#include <bsp/uart.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <bsp/irq.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h>
@@ -80,125 +78,72 @@
*/
/* Expected by clock.c */
uint32_t bsp_clicks_per_usec;
bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */
uint32_t bsp_timer_least_valid;
uint32_t bsp_timer_average_overhead;
/* Initialize whatever libc we are using
* called from postdriver hook
*/
void bsp_postdriver_hook(void);
void bsp_libc_init( void *, uint32_t, int );
/*
*
* bsp_predriver_hook
*
* Before drivers are setup.
*/
void bsp_predriver_hook(void)
{
}
/*
* Function: bsp_pretasking_hook
* Created: 95/03/10
*
* Description:
* BSP pretasking hook. Called just before drivers are initialized.
* Used to setup libc and install any BSP extensions.
*
* NOTES:
* Must not use libc (to do io) from here, since drivers are
* not yet initialized.
*
*/
extern uint8_t _RAMEnd; /* Defined in linkcmds */
void bsp_pretasking_hook(void)
/* Initialise libc with the address and size of the heap, which runs
from the end of the RTEMS workspace to the top of RAM */
{
uint32_t heap_start;
heap_start = ( (uint32_t)Configuration.work_space_start +
rtems_configuration_get_work_space_size() );
bsp_libc_init((void *)heap_start, (uint32_t)(&_RAMEnd) - heap_start, 0);
#ifdef RTEMS_DEBUG
rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
#endif
}
uint32_t bsp_clicks_per_usec;
bool bsp_timer_internal_clock; /* true, when timer runs with CPU clk */
uint32_t bsp_timer_least_valid;
uint32_t bsp_timer_average_overhead;
/*-------------------- Haleakala-specific UART setup -------------------------*/
static void
EarlyUARTInit(int baudRate)
{
uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
int divider = BSP_UART_BAUD_BASE / baudRate;
up[LCR] = DLAB; /* Access DLM/DLL */
up[DLL] = divider & 0x0FF;
up[DLM] = divider >> 8;
up[LCR] = CHR_8_BITS;
up[MCR] = DTR | RTS;
up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
up[THR] = '+';
uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
int divider = BSP_UART_BAUD_BASE / baudRate;
up[LCR] = DLAB; /* Access DLM/DLL */
up[DLL] = divider & 0x0FF;
up[DLM] = divider >> 8;
up[LCR] = CHR_8_BITS;
up[MCR] = DTR | RTS;
up[FCR] = FIFO_EN | XMIT_RESET | RCV_RESET;
up[THR] = '+';
}
static void
InitUARTClock(void)
{
uint32_t reg;
mfsdr(SDR0_UART0,reg);
reg &= ~0x008000FF;
reg |= 0x00800001; /* Ext clock, div 1 */
mtsdr(SDR0_UART0,reg);
uint32_t reg;
mfsdr(SDR0_UART0,reg);
reg &= ~0x008000FF;
reg |= 0x00800001; /* Ext clock, div 1 */
mtsdr(SDR0_UART0,reg);
}
void GPIO_AlternateSelect(int bitnum, int source)
/* PPC405EX: select a GPIO function for the specified pin */
{
int shift;
unsigned long value, mask;
GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
int shift;
unsigned long value, mask;
GPIORegisters* gpioPtr = (GPIORegisters*)(GPIOAddress);
shift = (31 - bitnum) & 0xF;
value = (source & 3) << (shift*2);
mask = 3 << (shift*2);
if (bitnum <= 15) {
gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
} else {
gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
}
shift = (31 - bitnum) & 0xF;
value = (source & 3) << (shift*2);
mask = 3 << (shift*2);
if (bitnum <= 15) {
gpioPtr->OSRL = (gpioPtr->OSRL & ~mask) | value;
gpioPtr->TSRL = (gpioPtr->TSRL & ~mask) | value;
} else {
gpioPtr->OSRH = (gpioPtr->OSRH & ~mask) | value;
gpioPtr->TSRH = (gpioPtr->TSRH & ~mask) | value;
}
}
void Init_FPGA(void)
{
/* Have to write to the FPGA to enable the UART drivers */
/* Have to enable CS2 as an output in GPIO to get the FPGA working */
mtebc(EBC0_B2CR,0xF0018000); /* Set up CS2 at 0xF0000000 */
mtebc(EBC0_B2AP,0x9400C800);
GPIO_AlternateSelect(9,1); /* GPIO9 = PerCS2 */
{
unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
unsigned long n;
n = *(fpgaPtr);
n &= ~0x00100; /* User LEDs on */
n |= 0x30000; /* UART 0 and 1 transcievers on! */
*fpgaPtr = n;
}
/* Have to write to the FPGA to enable the UART drivers */
/* Have to enable CS2 as an output in GPIO to get the FPGA working */
mtebc(EBC0_B2CR,0xF0018000); /* Set up CS2 at 0xF0000000 */
mtebc(EBC0_B2AP,0x9400C800);
GPIO_AlternateSelect(9,1); /* GPIO9 = PerCS2 */
{
unsigned long *fpgaPtr = (unsigned long*)(0xF0000000);
unsigned long n;
n = *(fpgaPtr);
n &= ~0x00100; /* User LEDs on */
n |= 0x30000; /* UART 0 and 1 transcievers on! */
*fpgaPtr = n;
}
}
/*===================================================================*/
@@ -206,17 +151,16 @@ void Init_FPGA(void)
static void
DirectUARTWrite(const char c)
{
uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
while ((up[LSR] & THRE) == 0) { ; }
up[THR] = c;
if (c=='\n')
DirectUARTWrite('\r');
uint8_t* up = (uint8_t*)(BSP_UART_IOBASE_COM1);
while ((up[LSR] & THRE) == 0) { ; }
up[THR] = c;
if (c=='\n')
DirectUARTWrite('\r');
}
/* We will provide our own printk output function as it may get used early */
BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
/*===================================================================*/
@@ -225,66 +169,51 @@ BSP_output_char_function_type BSP_output_char = DirectUARTWrite;
*
* This routine does the bulk of the system initialization.
*/
void bsp_start( void )
{
LINKER_SYMBOL(intrStack_start);
LINKER_SYMBOL(intrStack_size);
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
LINKER_SYMBOL(intrStack_start);
LINKER_SYMBOL(intrStack_size);
ppc_cpu_id_t myCpu;
ppc_cpu_revision_t myCpuRevision;
/* Get the UART clock initialized first in case we call printk */
/* Get the UART clock initialized first in case we call printk */
InitUARTClock();
Init_FPGA();
EarlyUARTInit(115200);
InitUARTClock();
Init_FPGA();
EarlyUARTInit(115200);
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
* function store the result in global variables
* so that it can be used later...
*/
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
/*
* Get CPU identification dynamically. Note that the get_ppc_cpu_type()
* function store the result in global variables
* so that it can be used later...
*/
myCpu = get_ppc_cpu_type();
myCpuRevision = get_ppc_cpu_revision();
/*
* initialize the device driver parameters
*/
/*
* initialize the device driver parameters
*/
/* Set globals visible to clock.c */
bsp_clicks_per_usec = 400; /* timebase register ticks/microsecond = CPU Clk in MHz */
bsp_timer_internal_clock = TRUE;
bsp_timer_average_overhead = 2;
bsp_timer_least_valid = 3;
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t) intrStack_start,
(uint32_t) intrStack_size);
/* Set globals visible to clock.c */
/* timebase register ticks/microsecond = CPU Clk in MHz */
bsp_clicks_per_usec = 400;
/*
* Install our own set of exception vectors
*/
BSP_rtems_irq_mng_init(0);
/*
* Allocate the memory for the RTEMS Work Space. This can come from
* a variety of places: hard coded address, malloc'ed from outside
* RTEMS world (e.g. simulator or primitive memory manager), or (as
* typically done by stock BSPs) by subtracting the required amount
* of work space from the last physical address on the CPU board.
*/
/* In this case we allocate space at an address defined in linkcmds
which points to a block above the stack and below the heap */
{
extern uint8_t _WorkspaceStart;
Configuration.work_space_start = &_WorkspaceStart;
}
bsp_timer_internal_clock = TRUE;
bsp_timer_average_overhead = 2;
bsp_timer_least_valid = 3;
/*
* Initialize default raw exception handlers.
*/
ppc_exc_initialize(
PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
(uint32_t) intrStack_start,
(uint32_t) intrStack_size);
/*
* Install our own set of exception vectors
*/
BSP_rtems_irq_mng_init(0);
}
void BSP_ask_for_reset(void)
@@ -304,5 +233,3 @@ void _BSP_Fatal_error(unsigned int v)
printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
BSP_ask_for_reset();
}