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bsps/arm: Add cache size support for CP15

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This commit is contained in:
Sebastian Huber
2018-12-21 11:57:49 +01:00
parent 41a557bc2f
commit c37807e97c
1 changed files with 41 additions and 0 deletions
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bsps/arm/shared/cache/cache-cp15.c
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+41
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@@ -29,6 +29,8 @@
#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
#if __ARM_ARCH >= 7 && (__ARM_ARCH_PROFILE == 65 || __ARM_ARCH_PROFILE == 82)
#define CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
#endif
@@ -180,4 +182,43 @@ static inline void _CPU_cache_disable_instruction(void)
rtems_interrupt_local_enable(level);
}
static inline size_t arm_cp15_get_cache_size(
uint32_t level,
uint32_t which
)
{
uint32_t clidr;
uint32_t loc;
uint32_t ccsidr;
clidr = arm_cp15_get_cache_level_id();
loc = arm_clidr_get_level_of_coherency(clidr);
if (level >= loc) {
return 0;
}
if (level == 0) {
level = loc - 1;
}
ccsidr = arm_cp15_get_cache_size_id_for_level(
ARM_CP15_CACHE_CSS_LEVEL(level) | which
);
return (1U << arm_ccsidr_get_line_power(ccsidr))
* arm_ccsidr_get_associativity(ccsidr)
* arm_ccsidr_get_num_sets(ccsidr);
}
static inline size_t _CPU_cache_get_data_cache_size(uint32_t level)
{
return arm_cp15_get_cache_size(level, ARM_CP15_CACHE_CSS_ID_DATA);
}
static inline size_t _CPU_cache_get_instruction_cache_size(uint32_t level)
{
return arm_cp15_get_cache_size(level, ARM_CP15_CACHE_CSS_ID_INSTRUCTION);
}
#include "../../shared/cache/cacheimpl.h"