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sparc: Simplify trap table initialization

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Move _ISR_Handler() to a separate file since it is now only used if a handler
is installed by _CPU_ISR_install_raw_handler().

Statically initialize the traps for external interrupts to use the new
_SPARC_Interrupt_trap() which directly dispatches the interrupt handlers
installed by rtems_interrupt_handler_install() via the BSP-provided
_SPARC_Interrupt_dispatch().

Since the trap table is now fully statically initialized, there is no longer a
dependency on the Cache Manager in the default configuration.

Update #4458.
This commit is contained in:
Sebastian Huber committed 2021-06-24 11:36:28 +02:00
1 parent 005c79beb9
commit be96cb4345
15 files changed
+705 -171
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bsps/sparc/erc32/include/bsp.h
-6
View File
@@ -95,12 +95,6 @@ void BSP_fatal_exit(uint32_t error);
/* Interrupt Service Routine (ISR) pointer */
typedef void (*bsp_shared_isr)(void *arg);
/* Initializes the Shared System Interrupt service */
extern void BSP_shared_interrupt_init(void);
/* Called directly from IRQ trap handler TRAP[0x10..0x1F] = IRQ[0..15] */
void bsp_isr_handler(rtems_vector_number vector);
/* Registers a shared IRQ handler, and enable it at IRQ controller. Multiple
* interrupt handlers may use the same IRQ number, all ISRs will be called
* when an interrupt on that line is fired.
bsps/sparc/erc32/start/bspstart.c
+4 -11
View File
@@ -12,22 +12,15 @@
#include <bsp.h>
#include <bsp/bootcard.h>
#include <bsp/irq-generic.h>
#include <rtems/sysinit.h>
/*
* Called just before drivers are initialized. Is used to initialize shared
* interrupt handling.
* Initialize shared interrupt handling, must be done after IRQ controller has
* been found and initialized.
*/
static void erc32_pre_driver_hook( void )
{
/* Initialize shared interrupt handling, must be done after IRQ
* controller has been found and initialized.
*/
BSP_shared_interrupt_init();
}
RTEMS_SYSINIT_ITEM(
erc32_pre_driver_hook,
bsp_interrupt_initialize,
RTEMS_SYSINIT_BSP_PRE_DRIVERS,
RTEMS_SYSINIT_ORDER_MIDDLE
);
bsps/sparc/leon2/include/bsp.h
-6
View File
@@ -119,12 +119,6 @@ void BSP_fatal_exit(uint32_t error);
/* Interrupt Service Routine (ISR) pointer */
typedef void (*bsp_shared_isr)(void *arg);
/* Initializes the Shared System Interrupt service */
extern void BSP_shared_interrupt_init(void);
/* Called directly from IRQ trap handler TRAP[0x10..0x1F] = IRQ[0..15] */
void bsp_isr_handler(rtems_vector_number vector);
/* Registers a shared IRQ handler, and enable it at IRQ controller. Multiple
* interrupt handlers may use the same IRQ number, all ISRs will be called
* when an interrupt on that line is fired.
bsps/sparc/leon2/start/bspstart.c
+1 -1
View File
@@ -111,7 +111,7 @@ static void leon2_pre_driver_hook( void )
/* Initialize shared interrupt handling, must be done after IRQ
* controller has been found and initialized.
*/
BSP_shared_interrupt_init();
bsp_interrupt_initialize();
#ifdef RTEMS_DRVMGR_STARTUP
leon2_root_register(&leon2_bus_config, &leon2_amba_res);
bsps/sparc/leon3/include/bsp.h
-6
View File
@@ -139,12 +139,6 @@ void rtems_bsp_delay(int usecs);
/* Interrupt Service Routine (ISR) pointer */
typedef void (*bsp_shared_isr)(void *arg);
/* Initializes the Shared System Interrupt service */
extern void BSP_shared_interrupt_init(void);
/* Called directly from IRQ trap handler TRAP[0x10..0x1F] = IRQ[0..15] */
void bsp_isr_handler(rtems_vector_number vector);
/* Registers a shared IRQ handler, and enable it at IRQ controller. Multiple
* interrupt handlers may use the same IRQ number, all ISRs will be called
* when an interrupt on that line is fired.
bsps/sparc/leon3/start/bspsmp.c
+20 -4
View File
@@ -18,6 +18,7 @@
#include <bsp/fatal.h>
#include <leon.h>
#include <rtems/bspIo.h>
#include <rtems/sysinit.h>
#include <rtems/score/assert.h>
#include <rtems/score/smpimpl.h>
#include <stdlib.h>
@@ -55,13 +56,10 @@ void bsp_start_on_secondary_processor(Per_CPU_Control *cpu_self)
_SMP_Start_multitasking_on_secondary_processor(cpu_self);
}
uint32_t _CPU_SMP_Initialize( void )
static void leon3_install_inter_processor_interrupt( void )
{
rtems_status_code sc;
if ( !leon3_data_cache_snooping_enabled() )
bsp_fatal( LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR );
sc = rtems_interrupt_handler_install(
LEON3_mp_irq,
"IPI",
@@ -70,6 +68,16 @@ uint32_t _CPU_SMP_Initialize( void )
NULL
);
_Assert_Unused_variable_equals( sc, RTEMS_SUCCESSFUL );
}
uint32_t _CPU_SMP_Initialize( void )
{
if ( !leon3_data_cache_snooping_enabled() )
bsp_fatal( LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR );
#if !defined(RTEMS_DRVMGR_STARTUP)
leon3_install_inter_processor_interrupt();
#endif
return leon3_get_cpu_count(LEON3_IrqCtrl_Regs);
}
@@ -102,3 +110,11 @@ void _CPU_SMP_Send_interrupt(uint32_t target_processor_index)
/* send interrupt to destination CPU */
LEON3_IrqCtrl_Regs->force[target_processor_index] = 1 << LEON3_mp_irq;
}
#if defined(RTEMS_DRVMGR_STARTUP)
RTEMS_SYSINIT_ITEM(
leon3_install_inter_processor_interrupt,
RTEMS_SYSINIT_DRVMGR_LEVEL_1,
RTEMS_SYSINIT_ORDER_LAST_BUT_4
);
#endif
bsps/sparc/leon3/start/bspstart.c
+7 -27
View File
@@ -20,6 +20,7 @@
*/
#include <bsp.h>
#include <bsp/irq-generic.h>
#include <leon.h>
#include <bsp/bootcard.h>
#include <rtems/sysinit.h>
@@ -66,6 +67,10 @@ static inline int set_snooping(void)
void bsp_start( void )
{
CPU_SPARC_HAS_SNOOPING = set_snooping();
#ifndef RTEMS_DRVMGR_STARTUP
bsp_interrupt_initialize();
#endif
}
static void leon3_cpu_index_init(void)
@@ -84,38 +89,13 @@ RTEMS_SYSINIT_ITEM(
RTEMS_SYSINIT_ORDER_FIRST
);
static void leon3_interrupt_common_init( void )
{
/* Initialize shared interrupt handling, must be done after IRQ
* controller has been found and initialized.
*/
BSP_shared_interrupt_init();
}
/*
* Called just before drivers are initialized. Is used to initialize shared
* interrupt handling.
*/
static void leon3_pre_driver_hook( void )
{
#ifndef RTEMS_DRVMGR_STARTUP
leon3_interrupt_common_init();
#endif
}
RTEMS_SYSINIT_ITEM(
leon3_pre_driver_hook,
RTEMS_SYSINIT_BSP_PRE_DRIVERS,
RTEMS_SYSINIT_ORDER_MIDDLE
);
#ifdef RTEMS_DRVMGR_STARTUP
/*
* Initialize shared interrupt handling, must be done after IRQ controller has
* been found and initialized.
*/
#ifdef RTEMS_DRVMGR_STARTUP
RTEMS_SYSINIT_ITEM(
leon3_interrupt_common_init,
bsp_interrupt_initialize,
RTEMS_SYSINIT_DRVMGR_LEVEL_1,
RTEMS_SYSINIT_ORDER_LAST_BUT_5
);
bsps/sparc/shared/irq/bsp_isr_handler.c
+10 -19
View File
@@ -8,28 +8,19 @@
*
*/
#include <rtems.h>
#include <bsp.h>
#include <bsp/irq-generic.h>
static inline void bsp_dispatch_irq(int irq)
/*
* This function is called directly from _SPARC_Interrupt_trap() for
* traps 0x10 to 0x1F which correspond to IRQ 0 to 15 respectively.
*/
void _SPARC_Interrupt_dispatch( uint32_t irq )
{
bsp_interrupt_handler_entry *e =
&bsp_interrupt_handler_table[bsp_interrupt_handler_index(irq)];
bsp_interrupt_assert( irq < BSP_INTERRUPT_VECTOR_COUNT );
while (e != NULL) {
(*e->handler)(e->arg);
e = e->next;
}
}
/* Called directly from IRQ trap handler TRAP[0x10..0x1F] = IRQ[0..15] */
void bsp_isr_handler(rtems_vector_number vector)
{
int irq = vector - 0x10;
/* Let BSP fixup and/or handle incomming IRQ */
irq = bsp_irq_fixup(irq);
bsp_dispatch_irq(irq);
/* Let BSP fixup and/or handle incoming IRQ */
irq = bsp_irq_fixup( irq );
bsp_interrupt_handler_dispatch_unchecked( irq );
}
bsps/sparc/shared/irq/irq-shared.c
-21
View File
@@ -37,27 +37,6 @@ static inline int bsp_irq_cpu(int irq)
}
#endif
/* Initialize interrupts */
void BSP_shared_interrupt_init(void)
{
rtems_vector_number vector;
rtems_isr_entry previous_isr;
int i;
for (i=0; i <= BSP_INTERRUPT_VECTOR_MAX_STD; i++) {
#if defined(LEON3) && (defined(RTEMS_SMP) || defined(RTEMS_MULTIPROCESSING))
/* Don't install IRQ handler on IPI interrupt */
if (i == LEON3_mp_irq)
continue;
#endif
vector = SPARC_ASYNCHRONOUS_TRAP(i) + 0x10;
rtems_interrupt_catch(bsp_isr_handler, vector, &previous_isr);
}
/* Initalize interrupt support */
bsp_interrupt_initialize();
}
/* Callback from bsp_interrupt_initialize() */
rtems_status_code bsp_interrupt_facility_initialize(void)
{
bsps/sparc/shared/start/start.S
+23 -16
View File
@@ -32,6 +32,13 @@
TRAP_SYM(_vector):; \
TRAP(_vector, _SPARC_Bad_trap)
/*
* External interrupt trap
*/
#define ISR_TRAP(_vector) \
TRAP_SYM(_vector):; \
TRAP(_vector - 0x10, _SPARC_Interrupt_trap)
/*
* System call optimized trap table entry
*/
@@ -128,27 +135,27 @@ TRAP_SYM(0x06):
BAD_TRAP(0x0d) ! 0D undefined
BAD_TRAP(0x0e) ! 0E undefined
BAD_TRAP(0x0f) ! 0F undefined
BAD_TRAP(0x10) ! 10 undefined
/*
* External interrupt traps
*/
BAD_TRAP(0x11) ! 11 external interrupt 1
BAD_TRAP(0x12) ! 12 external interrupt 2
BAD_TRAP(0x13) ! 13 external interrupt 3
BAD_TRAP(0x14) ! 14 external interrupt 4
BAD_TRAP(0x15) ! 15 external interrupt 5
BAD_TRAP(0x16) ! 16 external interrupt 6
BAD_TRAP(0x17) ! 17 external interrupt 7
BAD_TRAP(0x18) ! 18 external interrupt 8
BAD_TRAP(0x19) ! 19 external interrupt 9
BAD_TRAP(0x1a) ! 1A external interrupt 10
BAD_TRAP(0x1b) ! 1B external interrupt 11
BAD_TRAP(0x1c) ! 1C external interrupt 12
BAD_TRAP(0x1d) ! 1D external interrupt 13
BAD_TRAP(0x1e) ! 1E external interrupt 14
BAD_TRAP(0x1f) ! 1F external interrupt 15
ISR_TRAP(0x10) ! 10 undefined
ISR_TRAP(0x11) ! 11 external interrupt 1
ISR_TRAP(0x12) ! 12 external interrupt 2
ISR_TRAP(0x13) ! 13 external interrupt 3
ISR_TRAP(0x14) ! 14 external interrupt 4
ISR_TRAP(0x15) ! 15 external interrupt 5
ISR_TRAP(0x16) ! 16 external interrupt 6
ISR_TRAP(0x17) ! 17 external interrupt 7
ISR_TRAP(0x18) ! 18 external interrupt 8
ISR_TRAP(0x19) ! 19 external interrupt 9
ISR_TRAP(0x1a) ! 1A external interrupt 10
ISR_TRAP(0x1b) ! 1B external interrupt 11
ISR_TRAP(0x1c) ! 1C external interrupt 12
ISR_TRAP(0x1d) ! 1D external interrupt 13
ISR_TRAP(0x1e) ! 1E external interrupt 14
ISR_TRAP(0x1f) ! 1F external interrupt 15
BAD_TRAP(0x20) ! 20 undefined
BAD_TRAP(0x21) ! 21 undefined
cpukit/Makefile.am
+1
View File
@@ -1623,6 +1623,7 @@ librtemscpu_a_SOURCES += score/cpu/sparc/sparc-context-validate.S
librtemscpu_a_SOURCES += score/cpu/sparc/sparc-context-volatile-clobber.S
librtemscpu_a_SOURCES += score/cpu/sparc/sparc-counter-asm.S
librtemscpu_a_SOURCES += score/cpu/sparc/sparc-exception-frame-print.c
librtemscpu_a_SOURCES += score/cpu/sparc/sparc-isr-handler.S
librtemscpu_a_SOURCES += score/cpu/sparc/sparc-isr-install.c
librtemscpu_a_SOURCES += score/cpu/sparc/syscall.S
librtemscpu_a_SOURCES += score/cpu/sparc/window.S
cpukit/score/cpu/sparc/cpu_asm.S
+12 -52
View File
@@ -295,7 +295,7 @@ SYM(_CPU_Context_restore):
mov %i0, %o1 ! in the delay slot
/*
* void _ISR_Handler()
* void _SPARC_Interrupt_trap()
*
* This routine provides the RTEMS interrupt management.
*
@@ -305,28 +305,14 @@ SYM(_CPU_Context_restore):
* l0 = PSR
* l1 = PC
* l2 = nPC
* l3 = trap type
* l3 = interrupt vector number (this is not the trap type)
*
* NOTE: By an executive defined convention, trap type is between 0 and 255 if
* it is an asynchonous trap and 256 and 511 if it is synchronous.
* NOTE: This trap handler is intended to service external interrupts.
*/
.align 4
PUBLIC(_ISR_Handler)
SYM(_ISR_Handler):
/*
* Fix the return address for synchronous traps.
*/
andcc %l3, SPARC_SYNCHRONOUS_TRAP_BIT_MASK, %g0
! Is this a synchronous trap?
be,a win_ovflow ! No, then skip the adjustment
nop ! DELAY
mov %l1, %l6 ! save trapped pc for debug info
mov %l2, %l1 ! do not return to the instruction
add %l2, 4, %l2 ! indicated
win_ovflow:
PUBLIC(_SPARC_Interrupt_trap)
SYM(_SPARC_Interrupt_trap):
/*
* Save the globals this block uses.
*
@@ -413,7 +399,7 @@ dont_do_the_window:
* includes a regular minimum stack frame which will be used if
* needed by register window overflow and underflow handlers.
*
* REGISTERS SAME AS AT _ISR_Handler
* REGISTERS SAME AS AT _SPARC_Interrupt_trap()
*/
sub %fp, CPU_INTERRUPT_FRAME_SIZE, %sp
@@ -439,9 +425,6 @@ dont_do_the_window:
rd %y, %g1
st %g1, [%sp + ISF_Y_OFFSET] ! save y
st %l6, [%sp + ISF_TPC_OFFSET] ! save real trapped pc
mov %sp, %o1 ! 2nd arg to ISR Handler
/*
* Increment ISR nest level and Thread dispatch disable level.
@@ -520,26 +503,16 @@ dont_switch_stacks:
sub %sp, SPARC_MINIMUM_STACK_FRAME_SIZE, %sp
/*
* Check if we have an external interrupt (trap 0x11 - 0x1f). If so,
* set the PIL in the %psr to mask off interrupts with lower priority.
* Set the PIL in the %psr to mask off interrupts with lower priority.
* The original %psr in %l0 is not modified since it will be restored
* when the interrupt handler returns.
*/
mov %l0, %g5
and %l3, 0x0ff, %g4
subcc %g4, 0x11, %g0
bl dont_fix_pil
subcc %g4, 0x1f, %g0
bg dont_fix_pil
sll %g4, 8, %g4
sll %l3, 8, %g4
and %g4, SPARC_PSR_PIL_MASK, %g4
andn %l0, SPARC_PSR_PIL_MASK, %g5
ba pil_fixed
or %g4, %g5, %g5
dont_fix_pil:
or %g5, SPARC_PSR_PIL_MASK, %g5
pil_fixed:
#if SPARC_HAS_FPU == 1
/*
@@ -552,23 +525,10 @@ pil_fixed:
wr %g5, SPARC_PSR_ET_MASK, %psr ! **** ENABLE TRAPS ****
/*
* Vector to user's handler.
*
* NOTE: TBR may no longer have vector number in it since
* we just enabled traps. It is definitely in l3.
* Call _SPARC_Interrupt_dispatch( %l3 )
*/
sethi %hi(SYM(_ISR_Vector_table)), %g4
or %g4, %lo(SYM(_ISR_Vector_table)), %g4
and %l3, 0xFF, %g5 ! remove synchronous trap indicator
sll %g5, 2, %g5 ! g5 = offset into table
ld [%g4 + %g5], %g4 ! g4 = _ISR_Vector_table[ vector ]
! o1 = 2nd arg = address of the ISF
! WAS LOADED WHEN ISF WAS SAVED!!!
mov %l3, %o0 ! o0 = 1st arg = vector number
call %g4
call SYM(_SPARC_Interrupt_dispatch)
#if defined(RTEMS_PROFILING)
mov %o5, %l3 ! save interrupt entry instant
#else
@@ -780,8 +740,8 @@ isr_dispatch:
* The CWP in place at this point may be different from
* that which was in effect at the beginning of the ISR if we
* have been context switched between the beginning of this invocation
* of _ISR_Handler and this point. Thus the CWP and WIM should
* not be changed back to their values at ISR entry time. Any
* of _SPARC_Interrupt_trap() and this point. Thus the CWP and WIM
* should not be changed back to their values at ISR entry time. Any
* changes to the PSR must preserve the CWP.
*/
cpukit/score/cpu/sparc/include/rtems/score/cpu.h
+6 -2
View File
@@ -743,9 +743,13 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template;
#ifndef ASM
/*
* ISR handler macros
/**
* @brief Dispatches the installed interrupt handlers.
*
* @param irq is the interrupt vector number of the external interrupt ranging
* from 0 to 15. This is not a trap number.
*/
void _SPARC_Interrupt_dispatch( uint32_t irq );
/**
* Disable all interrupts for a critical section. The previous
cpukit/score/cpu/sparc/sparc-isr-handler.S
+620
View File
File diff suppressed because it is too large. Load diff
spec/build/cpukit/cpusparc.yml
+1
View File
@@ -39,6 +39,7 @@ source:
- cpukit/score/cpu/sparc/sparc-context-volatile-clobber.S
- cpukit/score/cpu/sparc/sparc-counter-asm.S
- cpukit/score/cpu/sparc/sparc-exception-frame-print.c
- cpukit/score/cpu/sparc/sparc-isr-handler.S
- cpukit/score/cpu/sparc/sparc-isr-install.c
- cpukit/score/cpu/sparc/syscall.S
- cpukit/score/cpu/sparc/window.S