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bsp/xilinx-zynq: Flush TX-Buffer before initializing uart

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Closes #4055
Closes #4056
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Jan Sommer authored and Chris Johns committed 2020-08-22 17:29:25 +10:00
1 parent 1a506170cc
commit b87efa7599
1 file changed
+2
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bsps/arm/shared/serial/zynq-uart-polled.c
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@@ -122,6 +122,8 @@ void zynq_uart_initialize(rtems_termios_device_context *base)
uint32_t brgr = 0x3e;
uint32_t bauddiv = 0x6;
zynq_uart_reset_tx_flush(ctx);
zynq_cal_baud_rate(ZYNQ_UART_DEFAULT_BAUD, &brgr, &bauddiv, regs->mode);
regs->control &= ~(ZYNQ_UART_CONTROL_RXEN | ZYNQ_UART_CONTROL_TXEN);