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GR1553B: fixed build warnings

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This commit is contained in:
Daniel Hellstrom
2015-04-17 01:10:22 +02:00
parent 05ce8bd51b
commit b787bead30
5 changed files with 64 additions and 56 deletions
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c/src/lib/libbsp/sparc/shared/1553/gr1553b.c
+8 -8
View File
@@ -39,15 +39,15 @@ struct gr1553_device_feature {
};
/* Device lists */
struct gr1553_device_feature *gr1553_bm_root = NULL;
struct gr1553_device_feature *gr1553_rt_root = NULL;
struct gr1553_device_feature *gr1553_bc_root = NULL;
static struct gr1553_device_feature *gr1553_bm_root = NULL;
static struct gr1553_device_feature *gr1553_rt_root = NULL;
static struct gr1553_device_feature *gr1553_bc_root = NULL;
/* Driver registered */
int gr1553_driver_registerd = 0;
static int gr1553_driver_registerd = 0;
/* Add 'feat' to linked list pointed to by 'root'. A minor is also assigned. */
void gr1553_list_add
static void gr1553_list_add
(
struct gr1553_device_feature **root,
struct gr1553_device_feature *feat
@@ -79,7 +79,7 @@ retry_new_minor:
curr->next = feat;
}
struct gr1553_device_feature *gr1553_list_find
static struct gr1553_device_feature *gr1553_list_find
(
struct gr1553_device_feature *root,
int minor
@@ -179,7 +179,7 @@ void gr1553_bm_close(struct drvmgr_dev **dev)
d->alloc &= ~ALLOC_BM;
}
int gr1553_init2(struct drvmgr_dev *dev)
static int gr1553_init2(struct drvmgr_dev *dev)
{
struct amba_dev_info *ambadev;
struct ambapp_core *pnpinfo;
@@ -209,7 +209,7 @@ int gr1553_init2(struct drvmgr_dev *dev)
/* Register the different functionalities that the
* core supports.
*/
int gr1553_init3(struct drvmgr_dev *dev)
static int gr1553_init3(struct drvmgr_dev *dev)
{
struct amba_dev_info *ambadev;
struct ambapp_core *pnpinfo;
c/src/lib/libbsp/sparc/shared/1553/gr1553bc.c
+2 -2
View File
@@ -615,7 +615,7 @@ union gr1553bc_bd *gr1553bc_slot_bd
return &minor->bds[slot_no];
}
int gr1553bc_minor_first_avail(struct gr1553bc_minor *minor)
static int gr1553bc_minor_first_avail(struct gr1553bc_minor *minor)
{
int slot_num;
uint32_t alloc;
@@ -1233,7 +1233,7 @@ void gr1553bc_register(void)
gr1553_register();
}
void gr1553bc_isr_std(union gr1553bc_bd *bd, void *data)
static void gr1553bc_isr_std(union gr1553bc_bd *bd, void *data)
{
/* Do nothing */
}
c/src/lib/libbsp/sparc/shared/1553/gr1553bm.c
+2 -2
View File
@@ -17,10 +17,10 @@
#include <gr1553bm.h>
#define GR1553BM_WRITE_MEM(adr, val) *(volatile uint32_t *)(adr) = (val)
#define GR1553BM_WRITE_MEM(adr, val) *(volatile uint32_t *)(adr) = (uint32_t)(val)
#define GR1553BM_READ_MEM(adr) (*(volatile uint32_t *)(adr))
#define GR1553BM_WRITE_REG(adr, val) *(volatile uint32_t *)(adr) = (val)
#define GR1553BM_WRITE_REG(adr, val) *(volatile uint32_t *)(adr) = (uint32_t)(val)
#define GR1553BM_READ_REG(adr) (*(volatile uint32_t *)(adr))
#ifndef IRQ_GLOBAL_PREPARE
c/src/lib/libbsp/sparc/shared/1553/gr1553rt.c
+17 -11
View File
@@ -19,10 +19,10 @@
#include <drvmgr/drvmgr.h>
#include <drvmgr/ambapp_bus.h>
#define GR1553RT_WRITE_MEM(adr, val) *(volatile uint32_t *)(adr) = (val)
#define GR1553RT_WRITE_MEM(adr, val) *(volatile uint32_t *)(adr) = (uint32_t)(val)
#define GR1553RT_READ_MEM(adr) (*(volatile uint32_t *)(adr))
#define GR1553RT_WRITE_REG(adr, val) *(volatile uint32_t *)(adr) = (val)
#define GR1553RT_WRITE_REG(adr, val) *(volatile uint32_t *)(adr) = (uint32_t)(val)
#define GR1553RT_READ_REG(adr) (*(volatile uint32_t *)(adr))
#ifndef IRQ_GLOBAL_PREPARE
@@ -129,14 +129,14 @@ struct gr1553rt_priv {
void gr1553rt_sw_init(struct gr1553rt_priv *priv);
void gr1553rt_sw_free(struct gr1553rt_priv *priv);
int gr1553rt_sw_alloc(struct gr1553rt_priv *priv);
void gr1553rt_isr(void *data);
/* Assign and ID to the list. An LIST ID is needed before scheduling list
* on an RT subaddress.
*
* Only 64 lists can be registered at a time on the same device.
*/
int gr1553rt_list_reg(struct gr1553rt_list *list)
static int gr1553rt_list_reg(struct gr1553rt_list *list)
{
struct gr1553rt_priv *priv = list->rt;
int i;
@@ -156,14 +156,16 @@ int gr1553rt_list_reg(struct gr1553rt_list *list)
return -1;
}
#if 0 /* unused for now */
/* Unregister List from device */
void gr1553rt_list_unreg(struct gr1553rt_list *list)
static void gr1553rt_list_unreg(struct gr1553rt_list *list)
{
struct gr1553rt_priv *priv = list->rt;
priv->lists[list->listid] = NULL;
list->listid = -1;
}
#endif
static int gr1553rt_bdid(void *rt, struct gr1553rt_sw_bd *bd)
{
@@ -178,7 +180,7 @@ static int gr1553rt_bdid(void *rt, struct gr1553rt_sw_bd *bd)
return index;
}
void gr1553rt_bd_alloc_init(void *rt, int count)
static void gr1553rt_bd_alloc_init(void *rt, int count)
{
struct gr1553rt_priv *priv = rt;
int i;
@@ -192,7 +194,7 @@ void gr1553rt_bd_alloc_init(void *rt, int count)
}
/* Allocate a Chain of descriptors */
int gr1553rt_bd_alloc(void *rt, struct gr1553rt_sw_bd **bd, int cnt)
static int gr1553rt_bd_alloc(void *rt, struct gr1553rt_sw_bd **bd, int cnt)
{
struct gr1553rt_priv *priv = rt;
struct gr1553rt_sw_bd *curr;
@@ -222,7 +224,8 @@ int gr1553rt_bd_alloc(void *rt, struct gr1553rt_sw_bd **bd, int cnt)
return 0;
}
void gr1553rt_bd_free(void *rt, struct gr1553rt_sw_bd *bd)
#if 0 /* unused for now */
static void gr1553rt_bd_free(void *rt, struct gr1553rt_sw_bd *bd)
{
struct gr1553rt_priv *priv = rt;
unsigned short index;
@@ -235,6 +238,7 @@ void gr1553rt_bd_free(void *rt, struct gr1553rt_sw_bd *bd)
priv->swbd_free = index;
priv->swbd_free_cnt++;
}
#endif
int gr1553rt_list_init
(
@@ -816,7 +820,7 @@ void gr1553rt_sw_free(struct gr1553rt_priv *priv)
}
/* Free dynamically allocated buffers, if any */
int gr1553rt_sw_alloc(struct gr1553rt_priv *priv)
static int gr1553rt_sw_alloc(struct gr1553rt_priv *priv)
{
int size;
@@ -863,7 +867,8 @@ int gr1553rt_sw_alloc(struct gr1553rt_priv *priv)
size = priv->bds_cnt * sizeof(struct gr1553rt_bd);
if ((unsigned int)priv->cfg.bd_buffer & 1) {
/* Translate Address from HARDWARE (REMOTE) to CPU-LOCAL */
priv->bds_hw = (unsigned int)priv->cfg.bd_buffer & ~0x1;
priv->bds_hw = (struct gr1553rt_bd *)
((unsigned int)priv->cfg.bd_buffer & ~0x1);
priv->bd_buffer = priv->cfg.bd_buffer;
drvmgr_translate_check(
*priv->pdev,
@@ -906,7 +911,8 @@ int gr1553rt_sw_alloc(struct gr1553rt_priv *priv)
/* Allocate Sub address table */
if ((unsigned int)priv->cfg.satab_buffer & 1) {
/* Translate Address from HARDWARE (REMOTE) to CPU-LOCAL */
priv->sas_hw = (unsigned int)priv->cfg.satab_buffer & ~0x1;
priv->sas_hw = (struct gr1553rt_sa *)
((unsigned int)priv->cfg.satab_buffer & ~0x1);
priv->satab_buffer = priv->cfg.satab_buffer;
drvmgr_translate_check(
*priv->pdev,
c/src/lib/libbsp/sparc/shared/include/gr1553b.h
+35 -33
View File
@@ -23,6 +23,8 @@
#ifndef __GR1553B_H__
#define __GR1553B_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
@@ -30,57 +32,57 @@ extern "C" {
/* The GR1553B registers */
struct gr1553b_regs {
/* Common Registers */
volatile unsigned int irq; /* 0x00 IRQ register */
volatile unsigned int imask; /* 0x04 IRQ enable mask */
volatile uint32_t irq; /* 0x00 IRQ register */
volatile uint32_t imask; /* 0x04 IRQ enable mask */
int unused0[(0x10-0x08)/4];
volatile unsigned int hwcfg; /* 0x10 HW config register */
volatile uint32_t hwcfg; /* 0x10 HW config register */
int unused1[(0x40-0x14)/4]; /* Padding */
/* BC Registers */
volatile unsigned int bc_stat; /* 0x40 BC status */
volatile unsigned int bc_ctrl; /* 0x44 BC Action register */
volatile unsigned int bc_bd; /* 0x48 BC transfer list pointer */
volatile unsigned int bc_abd; /* 0x4c BC async list pointer */
volatile unsigned int bc_timer; /* 0x50 BC timer register */
volatile unsigned int bc_wake; /* 0x54 BC wakeup control register */
volatile unsigned int bc_irqptr;/* 0x58 BC transfer IRQ pointer */
volatile unsigned int bc_busmsk;/* 0x5C BC per-RT bus mask register */
volatile uint32_t bc_stat; /* 0x40 BC status */
volatile uint32_t bc_ctrl; /* 0x44 BC Action register */
volatile uint32_t bc_bd; /* 0x48 BC transfer list pointer */
volatile uint32_t bc_abd; /* 0x4c BC async list pointer */
volatile uint32_t bc_timer; /* 0x50 BC timer register */
volatile uint32_t bc_wake; /* 0x54 BC wakeup control register */
volatile uint32_t bc_irqptr; /* 0x58 BC transfer IRQ pointer */
volatile uint32_t bc_busmsk; /* 0x5C BC per-RT bus mask register */
int unused2[(0x68-0x60)/4]; /* Padding */
volatile unsigned int bc_slot; /* 0x48 BC Current BD pointer */
volatile unsigned int bc_aslot; /* 0x4c BC Current async BD pointer */
volatile uint32_t bc_slot; /* 0x48 BC Current BD pointer */
volatile uint32_t bc_aslot; /* 0x4c BC Current async BD pointer */
int unused3[(0x80-0x70)/4]; /* Padding */
/* RT Registers */
volatile unsigned int rt_stat; /* 0x80 RT status */
volatile unsigned int rt_cfg; /* 0x84 RT config register */
volatile unsigned int rt_stat2; /* 0x88 RT bus status bits */
volatile unsigned int rt_statw; /* 0x8c RT status words */
volatile unsigned int rt_sync; /* 0x90 RT bus synchronize */
volatile unsigned int rt_tab; /* 0x94 RT subaddress table base */
volatile unsigned int rt_mcctrl;/* 0x98 RT valid mode code mask */
volatile uint32_t rt_stat; /* 0x80 RT status */
volatile uint32_t rt_cfg; /* 0x84 RT config register */
volatile uint32_t rt_stat2; /* 0x88 RT bus status bits */
volatile uint32_t rt_statw; /* 0x8c RT status words */
volatile uint32_t rt_sync; /* 0x90 RT bus synchronize */
volatile uint32_t rt_tab; /* 0x94 RT subaddress table base */
volatile uint32_t rt_mcctrl; /* 0x98 RT valid mode code mask */
int unused4[(0xa4-0x9c)/4];
volatile unsigned int rt_ttag; /* 0xa4 RT time tag register */
volatile uint32_t rt_ttag; /* 0xa4 RT time tag register */
int unused5; /* 0xa8 RESERVED */
volatile unsigned int rt_evsz; /* 0xac RT event log end pointer */
volatile unsigned int rt_evlog; /* 0xb0 RT event log position */
volatile unsigned int rt_evirq; /* 0xb4 RT event log IRQ position */
volatile uint32_t rt_evsz; /* 0xac RT event log end pointer */
volatile uint32_t rt_evlog; /* 0xb0 RT event log position */
volatile uint32_t rt_evirq; /* 0xb4 RT event log IRQ position */
int unused6[(0xc0-0xb8)/4]; /* Padding */
/* BM Registers */
volatile unsigned int bm_stat; /* 0xc0 BM status */
volatile unsigned int bm_ctrl; /* 0xc4 BM control register */
volatile unsigned int bm_adr; /* 0xc8 BM address filter */
volatile unsigned int bm_subadr;/* 0xcc BM subaddress filter */
volatile unsigned int bm_mc; /* 0xd0 BM mode code filter */
volatile unsigned int bm_start; /* 0xd4 BM log start address */
volatile unsigned int bm_end; /* 0xd8 BM log size/alignment mask */
volatile unsigned int bm_pos; /* 0xdc BM log position */
volatile unsigned int bm_ttag; /* 0xe0 BM time tag register */
volatile uint32_t bm_stat; /* 0xc0 BM status */
volatile uint32_t bm_ctrl; /* 0xc4 BM control register */
volatile uint32_t bm_adr; /* 0xc8 BM address filter */
volatile uint32_t bm_subadr; /* 0xcc BM subaddress filter */
volatile uint32_t bm_mc; /* 0xd0 BM mode code filter */
volatile uint32_t bm_start; /* 0xd4 BM log start address */
volatile uint32_t bm_end; /* 0xd8 BM log size/alignment mask */
volatile uint32_t bm_pos; /* 0xdc BM log position */
volatile uint32_t bm_ttag; /* 0xe0 BM time tag register */
};
#define GR1553BC_KEY 0x15520000