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* vmeUniverse/vme_am_defs.h: Added address modifiers for 2eVME. Added

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flags for 2eSST and DBW16.

	* vmeUniverse/vmeUniverse.h: Removed AM definitions and include vme_am_defs.h
	instead. Declare new routine vmeUniverseMapCRG(). Export 'irq manager' API
	only if __INSIDE_RTEMS_BSP__ defined. Renamed 'shared' argument to
	vmeUniverseInstallIrqMgrAlt() to 'flags' since now more options are available.
	Added new flag to install 'posted-write' workaround.

	* vmeUniverse/vmeUniverse.c: Allow BSP to override BSP_PCI2LOCAL_ADDR()
	macro. Data width of outbound port can now be restricted to 16-bit
	(if new DBW16 flag set in address modifier). Added vmeUniverseMapCRG()
	for mapping local registers onto VME. Interrupt manager now implements
	a workaround (enabled at installation time) which flushes the write-fifo
	after user ISR returns. This requires the universe's registers to be
	accessible from VME (either CSR space or CRG mapped to A16/A24/A32),
	though.

	* vmeUniverse/vmeTsi148.h: vmeTsi148ClearVMEBusErrors() now returns
	the fault address as a 32-bit address (not ulonglong anymore). The
	driver only supports 32-bit addresses. Declare new routine vmeTsi148MapCRG().
	Export 'irq manager' API only if __INSIDE_RTEMS_BSP__ defined.
	Renamed 'shared' argument to vmeTsi148InstallIrqMgrAlt() to 'flags'
	to allow more options to be supported. Added comments explaining the
	'posted-write' workaround implemented by the interrupt manager.

	* vmeUniverse/vmeTsi148.c: Clear 'SYSFAIL' during initialization.
	Allow BSP to override BSP_PCI2LOCAL_ADDR() macro. Added support for
	2eSST when configuring windows (untested - I have no 2eSST).
	Added vmeTsi148MapCRG() for mapping local registers onto VME.
	Implemented 'posted-write' workaround for interrupt manager
	(consult source for details).
This commit is contained in:
Till Straumann committed 2006-12-13 20:04:05 +00:00
1 parent 600a241e3b
commit afd4c7bbff
6 files changed
+923 -233
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c/src/lib/libbsp/shared/ChangeLog
+34
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@@ -1,3 +1,37 @@
2006-12-13 Till Straumann <strauman@slac.stanford.edu>
* vmeUniverse/vme_am_defs.h: Added address modifiers for 2eVME. Added
flags for 2eSST and DBW16.
* vmeUniverse/vmeUniverse.h: Removed AM definitions and include vme_am_defs.h
instead. Declare new routine vmeUniverseMapCRG(). Export 'irq manager' API
only if __INSIDE_RTEMS_BSP__ defined. Renamed 'shared' argument to
vmeUniverseInstallIrqMgrAlt() to 'flags' since now more options are available.
Added new flag to install 'posted-write' workaround.
* vmeUniverse/vmeUniverse.c: Allow BSP to override BSP_PCI2LOCAL_ADDR()
macro. Data width of outbound port can now be restricted to 16-bit
(if new DBW16 flag set in address modifier). Added vmeUniverseMapCRG()
for mapping local registers onto VME. Interrupt manager now implements
a workaround (enabled at installation time) which flushes the write-fifo
after user ISR returns. This requires the universe's registers to be
accessible from VME (either CSR space or CRG mapped to A16/A24/A32),
though.
* vmeUniverse/vmeTsi148.h: vmeTsi148ClearVMEBusErrors() now returns
the fault address as a 32-bit address (not ulonglong anymore). The
driver only supports 32-bit addresses. Declare new routine vmeTsi148MapCRG().
Export 'irq manager' API only if __INSIDE_RTEMS_BSP__ defined.
Renamed 'shared' argument to vmeTsi148InstallIrqMgrAlt() to 'flags'
to allow more options to be supported. Added comments explaining the
'posted-write' workaround implemented by the interrupt manager.
* vmeUniverse/vmeTsi148.c: Clear 'SYSFAIL' during initialization.
Allow BSP to override BSP_PCI2LOCAL_ADDR() macro. Added support for
2eSST when configuring windows (untested - I have no 2eSST).
Added vmeTsi148MapCRG() for mapping local registers onto VME.
Implemented 'posted-write' workaround for interrupt manager
(consult source for details).
2006-12-13 Joel Sherrill <joel@OARcorp.com>
PR 1190/bsps
c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.c
+396 -50
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c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.h
+78 -24
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@@ -7,33 +7,27 @@
* Sept. 2005.
*/
#include <stdint.h>
#include <bsp/vme_am_defs.h>
/* NOTE: A64 currently not implemented */
/* These can be ored with the AM */
/* NOTE: unlike the universe, the tsi148 doesn't allow for disabling posted writes ! */
#define VME_MODE_PREFETCH_ENABLE VME_AM_IS_MEMORY
#define VME_MODE_PREFETCH_SIZE(x) (((x)&3)<<12)
#define VME_MODE_2eSSTM(x) (((x)&7)<<16)
#define _LD_VME_MODE_PREFETCHSZ 24
#define VME_MODE_PREFETCH_SIZE(x) (((x)&3)<<_LD_VME_MODE_PREFETCHSZ)
#define VME_MODE_DBW32_DISABLE (8<<12)
/* Transfer modes:
*
* On a outbound window, only the least significant
* bit that is set is considered.
* On a inbound window, the bitwise OR of modes
* is accepted.
/* These bits can be or'ed with the address-modifier when calling
* the 'XlateAddr' routine below to further qualify the
* search criteria.
*/
#define VME_MODE_BLT (1<<20)
#define VME_MODE_MBLT (1<<21)
#define VME_MODE_2eVME (1<<22)
#define VME_MODE_2eSST (1<<23)
#define VME_MODE_2eSST_BCST (1<<24)
#define VME_MODE_MASK (31<<20)
#define VME_MODE_EXACT_MATCH (1<<31)
#define VME_MODE_MATCH_MASK (3<<30)
#define VME_MODE_EXACT_MATCH (2<<30) /* all bits must match */
#define VME_MODE_AS_MATCH (1<<30) /* only A16/24/32 must match */
#ifdef __cplusplus
extern "C" {
@@ -260,17 +254,43 @@ vmeTsi148DisableAllOutboundPorts(void);
* 0 if no error has occurred since this routine was last called.
* Contents of the 'VEAT' register (bit definitions as above)
* otherwise.
* If a non-NULL 'paddr' argument is provided then the 64-bit error
* address is stored in *paddr (only if return value is non-zero).
* If a non-NULL 'paddr' argument is provided then the lower 32-bit
* of the error address is stored in *paddr (only if return value is
* non-zero).
*
* SIDE EFFECTS: this routine clears the error attribute register, allowing
* for future errors to be latched.
*/
unsigned long
vmeTsi148ClearVMEBusErrorsXX(BERegister *base, unsigned long long *paddr);
vmeTsi148ClearVMEBusErrorsXX(BERegister *base, uint32_t *paddr);
unsigned long
vmeTsi148ClearVMEBusErrors(unsigned long long *paddr);
vmeTsi148ClearVMEBusErrors(uint32_t *paddr);
/* Map internal register block to VME.
*
* This routine is intended for BSP implementors. The registers must be
* accessible from VME so that the interrupt handler can flush the
* bridge FIFO (see below).
*
* vme_base: VME address where the TSI registers (4k) can be mapped.
* This VME address must fall into a range covered by
* any pre-configured outbound window.
* address_space: The desired VME address space.
* (all of SUP/USR/PGM/DATA are always accepted).
*
* See NOTES [vmeTsi148InstallIrqMgrAlt()] below for further information.
*
* RETURNS: 0 on success, nonzero on error. It is not possible (and results
* in a non-zero return code) to change the CRG VME address after
* initializing the interrupt manager as it uses the CRG.
*/
int
vmeTsi148MapCRGXX(BERegister *base, uint32_t vme_base, uint32_t address_space);
int
vmeTsi148MapCRG(uint32_t vme_base, uint32_t address_space);
/* VME Interrupt Handler functionality */
@@ -486,6 +506,10 @@ vmeTsi148IntLoopbackTst(int level, unsigned vector);
#define TSI_NUM_INT_VECS 275
#ifdef __INSIDE_RTEMS_BSP__
#include <stdarg.h>
/* the tsi148 interrupt handler is capable of routing all sorts of
* (VME) interrupts to 4 different lines (some of) which may be hooked up
* in a (board specific) way to a PIC.
@@ -513,15 +537,18 @@ vmeTsi148IntLoopbackTst(int level, unsigned vector);
* from PCI config space is wrong for some boards!
*
* PARAMETERS:
* shared: use the BSP_install_rtems_shared_irq_handler() instead
* flags: VMETSI148_IRQ_MGR_FLAG_SHARED:
* use the BSP_install_rtems_shared_irq_handler() instead
* of BSP_install_rtems_irq_handler(). Use this if the PIC
* line is used by other devices, too.
* CAVEAT: shared interrupts need RTEMS workspace, i.e., the
* VME interrupt manager can only be installed
* *after workspace is initialized* if 'shared' is nonzero
* (i.e., *not* from bspstart()).
*
* tsi_pin_0: to which output pin (of the tsi148) should the 7
* VME irq levels be routed.
*
* pic_pin_0: specifies to which PIC input the 'main' output is
* wired on your board. If passed a value < 0, the driver
* reads this information from PCI config space ("IRQ line").
@@ -530,13 +557,40 @@ vmeTsi148IntLoopbackTst(int level, unsigned vector);
* In any case must the varargs list be terminated by '-1'.
*
* RETURNS: 0 on success, -1 on failure.
*
*
* NOTES: The Tsi148 always does 'posted' writes through a FIFO buffer.
* This effectively makes VME write operations asynchronous
* which can have undesired side-effects.
* In particular, consider the case of an ISR clearing the
* interrupt condition by writing to a CSR. The write operation
* doesn't really do anything but goes into the FIFO and
* the user ISR returns. At this point, the interrupt manager
* may find the IRQ still pending, trying another IACK
* cycle. Because it is probable that at this time the FIFO
* has been flushed and the CSR-write operation been effective,
* the IACK then times out.
* Note that this phenomenon becomes more obvious as CPUs
* become faster.
*
* To avoid this race condition and many VME drivers having
* to be re-written, a VME read (having the desired side-effect
* of flushing the write FIFO) must be issued between the
* user ISR returning and the interrupt manager checking for
* more pending interrupts.
*
* Therefore, the BSP needs to map the Tsi148 register
* block to VME so that a read over VME can be effectuated.
* (In addition to being mapped to VME, the mapped address
* range must be accessible through an outbound window.)
*/
#define VMETSI148_IRQ_MGR_FLAG_SHARED 1
int
vmeTsi148InstallIrqMgrAlt(int shared, int tsi_pin0, int pic_pin0, ...);
int
vmeTsi148InstallIrqMgrVa(int shared, int tsi_pin0, int pic_pin0, va_list ap);
#endif
#ifdef __cplusplus
}
c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.c
+246 -19
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c/src/lib/libbsp/shared/vmeUniverse/vmeUniverse.h
+137 -138
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c/src/lib/libbsp/shared/vmeUniverse/vme_am_defs.h
+32 -2
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@@ -3,6 +3,8 @@
/* vxworks compatible addressing modes */
/* NOTE: 64-bit *addresses* are not supported [data are]. */
#ifndef VME_AM_STD_SUP_BLT
#define VME_AM_STD_SUP_BLT 0x3f
#endif
@@ -63,6 +65,12 @@
#ifndef VME_AM_EXT_USR_MBLT
#define VME_AM_EXT_USR_MBLT 0x08
#endif
#ifndef VME_AM_2eVME_6U
#define VME_AM_2eVME_6U 0x20
#endif
#ifndef VME_AM_2eVME_3U
#define VME_AM_2eVME_3U 0x21
#endif
#ifndef VME_AM_CSR
#define VME_AM_CSR 0x2f
#endif
@@ -99,8 +107,30 @@
#define VME_AM_IS_MEMORY (1<<8)
#endif
/* Flags 1<<11 .. 1<<8 are reserved
* Flags 1<<12 .. 1<<31 are for driver specific options
/* I don't know AMs for 2eSST so we use some extra bits;
* HOWEVER: these are just qualifiers to the VME_AM_2eVME_xx modes
* i.e., if you want 2eSST you must also select 2eVME...
*/
/* 2eSST broadcast; you still need to set one of the speed bits */
#define VME_AM_2eSST_BCST (1<<9)
/* Low speed (driver specific) */
#define VME_AM_2eSST_LO (1<<10)
/* Mid speed (driver specific) */
#define VME_AM_2eSST_MID (2<<10)
/* High speed (driver specific) */
#define VME_AM_2eSST_HI (3<<10)
#define VME_AM_IS_2eSST(am) ((am) & (3<<10))
/* Use 16-bit transfers for coupled- or BLT cycles
* (MBLT, 2exxx are probably always 64-bit)
*/
#define VME_MODE_DBW16 (1<<12)
/* Unused Flags 1<<12 .. 1<<23 are reserved
* Flags 1<<24 .. 1<<31 are for driver specific options
*/
#endif