mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2026-08-23 21:39:49 +08:00
BSP submitted by Thomas Doerfler <td@imd.m.isar.de>:
Finally I am through: I have found the last bugs that made RTEMS-
4.0-beta3 start on my ppc403 board from ROM. So now the '403
support is up to date again.
Roughly I have added the following features:
- support for the on-chip interrupt controller (in a separate module)
- interrupt support for the console device
- termios support for the console device
==============================================
Since the BSP behaivour changed in some details (console no
longer is polling, other memory layout etc) I have created a new
BSP "helas403" rather than changing the "papyrus" BSP. The old
"polled" console driver still sticks around in "console.c.polled"
To get the BSP up and running, I had to create the new BSP files
(derived from papyrus). Besides that, the following source areas
have been changed:
- c/src/lib/libcpu/powerpc/ppc403: changes to console driver, small
changes to clock driver, new "ictrl" interrupt controller driver
- c/src/exec/score/cpu/powerpc/ppc.h: some small changes
(added ppc403 characteristics like a exception vector prefix
register, some special register definitions). I am quite sure, they
are compatible with the existing sources, although I did not check
- c/src/exec/score/cpu/powerpc/cpu.c: There is one severe
limitation in the exception entries: Due to the current code
arrangement, the "branch absolute" to the ISR handler may only
jump to the first 128MByte or the last 128MByte of the 4GByte
address range. When the ppc403 is running out of ROM, the ROM
functions are located in the last 128MByte (0xFFF00000 and up).
These addresses were not handled correctly (sign reduced) in
"install_raw_handler". The change I added should work on existing
ppc BSPs aswell...
- c/src/lib/libc/termios.c: During my tests, I added one change you
sent me, so this patch will already be incorporated in the current
source tree.
There are some smaller changes, see the attached diff file.
=========================================
Concerning the GNU toolchain:
I tried several tool chains. Finally I almost succeeded with
egcs-1.0.3a with patch egcs-1.0.3-rtems-diff-19980527
I had to add the following lines to the egcs files. Without them
configure complaint that the cross compiler could not generate
executable output.
- additional lines needed in egcs distribution in file
gcc/config/rs6000/rtems.h:
+++ lines start
#undef STARTFILE_DEFAULT_SPEC
#define STARTFILE_DEFAULT_SPEC "ecrti.o%s"
#undef ENDFILE_DEFAULT_SPEC
#define ENDFILE_DEFAULT_SPEC "ecrtn.o%s"
++++ lines end
As far as I have seen in the Changelog of egcs, you have recently
sent two patches affecting the powerpc support, but they were
added in the wrong order.... :-(
egcs-19980628 with patch egcs-19980628-rtems-diff-19980707 does
not work!
I used binutils 2.9.1 with patch binutils-2.9.1-rtems-diff-19980515
(binutils 2.8.1 does not work, internal error in gas)
and newlib-1.8.0 with patch newlib-1.8.0-rtems-diff-19980707
Finally I had to poke a line in the "bit" script, since, on my LINUX
machine, the GNU make is only available as "make", not as
"gmake"...
For all the tools and newlib I selected configuration "powerpc-
rtems".
--------------------------------------------
IMD Ingenieurbuero fuer Microcomputertechnik
Thomas Doerfler Herbststrasse 8
D-82178 Puchheim Germany
email: td@imd.m.isar.de
This commit is contained in:
Joel Sherrill
@@ -11,4 +11,4 @@ PROJECT_ROOT = @PROJECT_ROOT@
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include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
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include $(RTEMS_ROOT)/make/directory.cfg
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SUB_DIRS=include console clock timer vectors
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SUB_DIRS=include console clock timer vectors ictrl
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@@ -20,6 +20,12 @@
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*
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* Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:
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*
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* Modifications for deriving timer clock from cpu system clock by
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* Thomas Doerfler <td@imd.m.isar.de>
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* for these modifications:
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* COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
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*
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*
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* COPYRIGHT (c) 1989-1998.
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* On-Line Applications Research Corporation (OAR).
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* Copyright assigned to U.S. Government, 1994.
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@@ -133,8 +139,14 @@ void Install_clock(rtems_isr_entry clock_isr)
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Clock_driver_ticks = 0;
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asm volatile ("mfdcr %0, 0xa0" : "=r" (iocr)); /* IOCR */
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iocr &= ~4;
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iocr |= 4; /* Select external timer clock */
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if (Cpu_table.timer_internal_clock) {
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iocr &= ~4; /* timer clocked from system clock */
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}
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else {
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iocr |= 4; /* select external timer clock */
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}
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asm volatile ("mtdcr 0xa0, %0" : "=r" (iocr) : "0" (iocr)); /* IOCR */
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asm volatile ("mfspr %0, 0x11f" : "=r" ((pvr))); /* PVR */
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@@ -143,7 +155,12 @@ void Install_clock(rtems_isr_entry clock_isr)
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return; /* Not a ppc403 */
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if ((pvr & 0xff00) == 0x0000) /* 403GA */
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#if 0 /* FIXME: in which processor versions will "autoload" work properly? */
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auto_restart = (pvr & 0x00f0) > 0x0000 ? 1 : 0;
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#else
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/* no known chip version supports auto restart of timer... */
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auto_restart = 0;
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#endif
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else if ((pvr & 0xff00) == 0x0100) /* 403GB */
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auto_restart = 1;
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,393 @@
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/*
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* This file contains the PowerPC 403GA console IO package.
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*
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* Author: Andrew Bray <andy@i-cubed.co.uk>
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*
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* COPYRIGHT (c) 1995 by i-cubed ltd.
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*
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* To anyone who acknowledges that this file is provided "AS IS"
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* without any express or implied warranty:
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* permission to use, copy, modify, and distribute this file
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* for any purpose is hereby granted without fee, provided that
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* the above copyright notice and this notice appears in all
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* copies, and that the name of i-cubed limited not be used in
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* advertising or publicity pertaining to distribution of the
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* software without specific, written prior permission.
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* i-cubed limited makes no representations about the suitability
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* of this software for any purpose.
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*
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* Derived from c/src/lib/libbsp/no_cpu/no_bsp/console/console.c:
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*
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* COPYRIGHT (c) 1989-1998.
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* On-Line Applications Research Corporation (OAR).
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* Copyright assigned to U.S. Government, 1994.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.OARcorp.com/rtems/license.html.
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*
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* $Id$
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*/
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#define NO_BSP_INIT
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#include <bsp.h>
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#include <rtems/libio.h>
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extern rtems_cpu_table Cpu_table; /* owned by BSP */
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struct async {
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/*-----------------------------------------------------------------------------+
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| Line Status Register.
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+-----------------------------------------------------------------------------*/
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unsigned char SPLS;
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unsigned char SPLSset;
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#define LSRDataReady 0x80
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#define LSRFramingError 0x40
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#define LSROverrunError 0x20
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#define LSRParityError 0x10
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#define LSRBreakInterrupt 0x08
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#define LSRTxHoldEmpty 0x04
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#define LSRTxShiftEmpty 0x02
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/*-----------------------------------------------------------------------------+
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| Handshake Status Register.
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+-----------------------------------------------------------------------------*/
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unsigned char SPHS;
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unsigned char SPHSset;
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#define HSRDsr 0x80
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#define HSRCts 0x40
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/*-----------------------------------------------------------------------------+
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| Baud rate divisor registers
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+-----------------------------------------------------------------------------*/
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unsigned char BRDH;
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unsigned char BRDL;
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/*-----------------------------------------------------------------------------+
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| Control Register.
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+-----------------------------------------------------------------------------*/
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unsigned char SPCTL;
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#define CRNormal 0x00
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#define CRLoopback 0x40
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#define CRAutoEcho 0x80
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#define CRDtr 0x20
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#define CRRts 0x10
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#define CRWordLength7 0x00
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#define CRWordLength8 0x08
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#define CRParityDisable 0x00
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#define CRParityEnable 0x04
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#define CREvenParity 0x00
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#define CROddParity 0x02
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#define CRStopBitsOne 0x00
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#define CRStopBitsTwo 0x01
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#define CRDisableDtrRts 0x00
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/*-----------------------------------------------------------------------------+
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| Receiver Command Register.
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+-----------------------------------------------------------------------------*/
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unsigned char SPRC;
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#define RCRDisable 0x00
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#define RCREnable 0x80
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#define RCRIntDisable 0x00
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#define RCRIntEnabled 0x20
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#define RCRDMACh2 0x40
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#define RCRDMACh3 0x60
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#define RCRErrorInt 0x10
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#define RCRPauseEnable 0x08
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/*-----------------------------------------------------------------------------+
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| Transmitter Command Register.
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+-----------------------------------------------------------------------------*/
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unsigned char SPTC;
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#define TCRDisable 0x00
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#define TCREnable 0x80
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#define TCRIntDisable 0x00
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#define TCRIntEnabled 0x20
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#define TCRDMACh2 0x40
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#define TCRDMACh3 0x60
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#define TCRTxEmpty 0x10
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#define TCRErrorInt 0x08
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#define TCRStopPause 0x04
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#define TCRBreakGen 0x02
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/*-----------------------------------------------------------------------------+
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| Miscellanies defines.
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+-----------------------------------------------------------------------------*/
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unsigned char SPTB;
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#define SPRB SPTB
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};
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#define XOFFchar 0x13
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#define XONchar 0x11
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typedef volatile struct async *pasync;
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static const pasync port = (pasync)0x40000000;
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/* console_initialize
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*
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* This routine initializes the console IO driver.
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*
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* Input parameters: NONE
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*
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* Output parameters: NONE
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*
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* Return values:
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*/
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rtems_device_driver console_initialize(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void *arg
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)
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{
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rtems_status_code status;
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register unsigned tmp;
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/* Initialise the serial port */
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asm volatile ("mfdcr %0, 0xa0" : "=r" (tmp)); /* IOCR */
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tmp &= ~3;
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tmp |= (Cpu_table.serial_external_clock ? 2 : 0) |
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(Cpu_table.serial_cts_rts ? 1 : 0);
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asm volatile ("mtdcr 0xa0, %0" : "=r" (tmp) : "0" (tmp)); /* IOCR */
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port->SPLS = (LSRDataReady | LSRFramingError | LSROverrunError |
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LSRParityError | LSRBreakInterrupt);
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tmp = Cpu_table.serial_per_sec / Cpu_table.serial_rate;
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#if 0 /* replaced by IMD... */
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tmp = ((tmp + 8) >> 4) - 1;
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port->BRDL = tmp & 0x255;
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port->BRDH = tmp >> 8;
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#else
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tmp = ((tmp) >> 4) - 1;
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port->BRDL = tmp & 0xff;
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port->BRDH = tmp >> 8;
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#endif
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port->SPCTL = (CRNormal | CRDtr | CRRts | CRWordLength8 | CRParityDisable |
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CRStopBitsOne);
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port->SPRC = (RCREnable | RCRIntDisable | RCRPauseEnable);
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port->SPTC = (TCREnable | TCRIntDisable);
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port->SPHS = (HSRDsr | HSRCts);
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status = rtems_io_register_name(
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"/dev/console",
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major,
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(rtems_device_minor_number) 0
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);
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if (status != RTEMS_SUCCESSFUL)
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rtems_fatal_error_occurred(status);
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return RTEMS_SUCCESSFUL;
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}
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/* is_character_ready
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*
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* This routine returns TRUE if a character is available.
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*
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* Input parameters: NONE
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*
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* Output parameters: NONE
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*
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* Return values:
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*/
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rtems_boolean is_character_ready(
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char *ch
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)
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{
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unsigned char status;
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if ((status = port->SPLS) & LSRDataReady)
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{
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*ch = port->SPRB;
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return(TRUE);
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}
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/* Clean any dodgy status */
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if ((status & (LSRFramingError | LSROverrunError | LSRParityError |
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LSRBreakInterrupt)) != 0)
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{
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port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError |
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LSRBreakInterrupt);
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}
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return FALSE;
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}
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/* inbyte
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*
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* This routine reads a character from the SOURCE.
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*
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* Input parameters: NONE
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*
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* Output parameters: NONE
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*
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* Return values:
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* character read from SOURCE
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*/
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char inbyte( void )
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{
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unsigned char status;
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while (1)
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{
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if ((status = port->SPLS) & LSRDataReady)
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break;
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/* Clean any dodgy status */
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if ((status & (LSRFramingError | LSROverrunError | LSRParityError |
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LSRBreakInterrupt)) != 0)
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{
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port->SPLS = (LSRFramingError | LSROverrunError | LSRParityError |
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LSRBreakInterrupt);
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}
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}
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return port->SPRB;
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}
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/* outbyte
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*
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* This routine transmits a character out the SOURCE. It may support
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* XON/XOFF flow control.
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*
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* Input parameters:
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* ch - character to be transmitted
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*
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* Output parameters: NONE
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*/
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void outbyte(
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char ch
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)
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{
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unsigned char status;
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while (port->SPHS)
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port->SPHS = (HSRDsr | HSRCts);
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while (1)
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{
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status = port->SPLS;
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if (port->SPHS)
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port->SPHS = (HSRDsr | HSRCts);
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else if (status & LSRTxHoldEmpty)
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break;
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}
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if (Cpu_table.serial_xon_xoff)
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while (is_character_ready(&status))
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{
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if (status == XOFFchar)
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do {
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while (!is_character_ready(&status));
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} while (status != XONchar);
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}
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port->SPTB = ch;
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}
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/*
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* Open entry point
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*/
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rtems_device_driver console_open(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
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void * arg
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)
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{
|
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return RTEMS_SUCCESSFUL;
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}
|
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/*
|
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* Close entry point
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*/
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rtems_device_driver console_close(
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rtems_device_major_number major,
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rtems_device_minor_number minor,
|
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void * arg
|
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)
|
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{
|
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return RTEMS_SUCCESSFUL;
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}
|
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|
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/*
|
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* read bytes from the serial port. We only have stdin.
|
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*/
|
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|
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rtems_device_driver console_read(
|
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rtems_device_major_number major,
|
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rtems_device_minor_number minor,
|
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void * arg
|
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)
|
||||
{
|
||||
rtems_libio_rw_args_t *rw_args;
|
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char *buffer;
|
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int maximum;
|
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int count = 0;
|
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|
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rw_args = (rtems_libio_rw_args_t *) arg;
|
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|
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buffer = rw_args->buffer;
|
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maximum = rw_args->count;
|
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|
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for (count = 0; count < maximum; count++) {
|
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buffer[ count ] = inbyte();
|
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if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
|
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buffer[ count++ ] = '\n';
|
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buffer[ count ] = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
rw_args->bytes_moved = count;
|
||||
return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
|
||||
}
|
||||
|
||||
/*
|
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* write bytes to the serial port. Stdout and stderr are the same.
|
||||
*/
|
||||
|
||||
rtems_device_driver console_write(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
int count;
|
||||
int maximum;
|
||||
rtems_libio_rw_args_t *rw_args;
|
||||
char *buffer;
|
||||
|
||||
rw_args = (rtems_libio_rw_args_t *) arg;
|
||||
|
||||
buffer = rw_args->buffer;
|
||||
maximum = rw_args->count;
|
||||
|
||||
for (count = 0; count < maximum; count++) {
|
||||
if ( buffer[ count ] == '\n') {
|
||||
outbyte('\r');
|
||||
}
|
||||
outbyte( buffer[ count ] );
|
||||
}
|
||||
return maximum;
|
||||
}
|
||||
|
||||
/*
|
||||
* IO Control entry point
|
||||
*/
|
||||
|
||||
rtems_device_driver console_control(
|
||||
rtems_device_major_number major,
|
||||
rtems_device_minor_number minor,
|
||||
void * arg
|
||||
)
|
||||
{
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,61 @@
|
||||
#
|
||||
# $Id$
|
||||
#
|
||||
|
||||
@SET_MAKE@
|
||||
srcdir = @srcdir@
|
||||
VPATH = @srcdir@
|
||||
RTEMS_ROOT = @top_srcdir@
|
||||
PROJECT_ROOT = @PROJECT_ROOT@
|
||||
|
||||
PGM=${ARCH}/ictrl.rel
|
||||
|
||||
# C source names, if any, go here -- minus the .c
|
||||
C_PIECES=ictrl
|
||||
C_FILES=$(C_PIECES:%=%.c)
|
||||
C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
|
||||
|
||||
H_FILES=$(srcdir)/ictrl.h
|
||||
|
||||
# Assembly source names, if any, go here -- minus the .s
|
||||
S_PIECES=
|
||||
S_FILES=$(S_PIECES:%=%.s)
|
||||
S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
|
||||
|
||||
SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
|
||||
OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
|
||||
|
||||
include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
|
||||
include $(RTEMS_ROOT)/make/leaf.cfg
|
||||
|
||||
#
|
||||
# (OPTIONAL) Add local stuff here using +=
|
||||
#
|
||||
|
||||
DEFINES +=
|
||||
CPPFLAGS +=
|
||||
CFLAGS += $(CFLAGS_OS_V)
|
||||
|
||||
LD_PATHS +=
|
||||
LD_LIBS +=
|
||||
LDFLAGS +=
|
||||
|
||||
#
|
||||
# Add your list of files to delete here. The config files
|
||||
# already know how to delete some stuff, so you may want
|
||||
# to just run 'make clean' first to see what gets missed.
|
||||
# 'make clobber' already includes 'make clean'
|
||||
#
|
||||
|
||||
CLEAN_ADDITIONS +=
|
||||
CLOBBER_ADDITIONS +=
|
||||
|
||||
${PGM}: ${SRCS} ${OBJS}
|
||||
$(make-rel)
|
||||
|
||||
all: ${ARCH} $(SRCS) $(PGM)
|
||||
$(INSTALL) -m 444 $(H_FILES) $(PROJECT_INCLUDE)
|
||||
|
||||
# the .rel file built here will be put into libbsp.a by
|
||||
# libbsp/hppa/BSP/wrapup/Makefile
|
||||
install: all
|
||||
@@ -0,0 +1,250 @@
|
||||
/* ictrl.c
|
||||
*
|
||||
* This routine installs and handles external interrupt vectors for
|
||||
* PowerPC 403 CPU built-in external interrupt controller
|
||||
*
|
||||
* Author: Thomas Doerfler <td@imd.m.isar.de>
|
||||
*
|
||||
* COPYRIGHT (c) 1998 by IMD, Puchheim, Germany
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of IMD not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* IMD makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "ictrl.h"
|
||||
#include <bsp.h>
|
||||
#include <rtems/libio.h>
|
||||
|
||||
#include <stdlib.h> /* for atexit() */
|
||||
|
||||
/*
|
||||
* ISR vector table to dispatch external interrupts
|
||||
*/
|
||||
|
||||
rtems_isr_entry ictrl_vector_table[PPC_IRQ_EXT_MAX];
|
||||
|
||||
/*
|
||||
*
|
||||
* some utilities to access the EXI* registers
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* clear bits in EXISR that have a bit set in mask
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
clr_exisr(unsigned32 mask)
|
||||
{
|
||||
asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/
|
||||
}
|
||||
|
||||
/*
|
||||
* get value of EXISR
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE unsigned32
|
||||
get_exisr(void)
|
||||
{
|
||||
unsigned32 val;
|
||||
|
||||
asm volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* get value of EXIER
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE unsigned32
|
||||
get_exier(void)
|
||||
{
|
||||
unsigned32 val;
|
||||
asm volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* set value of EXIER
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
set_exier(unsigned32 val)
|
||||
{
|
||||
asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/
|
||||
}
|
||||
|
||||
/*
|
||||
* enable an external interrupt, make this interrupt consistent
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
enable_ext_irq( unsigned32 mask)
|
||||
{
|
||||
unsigned32 isrlvl;
|
||||
_CPU_ISR_Disable(isrlvl);
|
||||
set_exier(get_exier() | ((mask)&PPC_EXI_MASK));
|
||||
_CPU_ISR_Enable(isrlvl);
|
||||
}
|
||||
|
||||
/*
|
||||
* disable an external interrupt, make this interrupt consistent
|
||||
*/
|
||||
RTEMS_INLINE_ROUTINE void
|
||||
disable_ext_irq( unsigned32 mask)
|
||||
{
|
||||
unsigned32 isrlvl;
|
||||
_CPU_ISR_Disable(isrlvl);
|
||||
set_exier(get_exier() & ~(mask) & PPC_EXI_MASK);
|
||||
_CPU_ISR_Enable(isrlvl);
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* this function is called, when a external interrupt is present and
|
||||
* enabled but there is no handler installed. It will clear
|
||||
* the corresponding enable bits and call the spurious handler
|
||||
* present in the _CPU_Table, if any.
|
||||
*
|
||||
*/
|
||||
void
|
||||
ictrl_spurious_handler(unsigned32 spurious_mask,
|
||||
CPU_Interrupt_frame *cpu_frame)
|
||||
{
|
||||
int v;
|
||||
|
||||
for (v=0; v < PPC_IRQ_EXT_MAX; v++) {
|
||||
if (VEC_TO_EXMSK(v) & spurious_mask) {
|
||||
clr_exisr(VEC_TO_EXMSK(v));
|
||||
disable_ext_irq(VEC_TO_EXMSK(v));
|
||||
#if 0
|
||||
printf("spurious external interrupt: %d at pc 0x%x; disabling\n",
|
||||
vector, cpu_frame->Interrupt.pcoqfront);
|
||||
#endif
|
||||
if (_CPU_Table.spurious_handler) {
|
||||
_CPU_Table.spurious_handler(v + PPC_IRQ_EXT_BASE,cpu_frame);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* ISR Handler: this is called from the primary exception dispatcher
|
||||
*/
|
||||
|
||||
void
|
||||
ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame)
|
||||
{
|
||||
unsigned32 istat,
|
||||
mask,
|
||||
global_vec;
|
||||
int exvec;
|
||||
rtems_isr_entry handler;
|
||||
|
||||
istat = get_exisr() & get_exier() & PPC_EXI_MASK;
|
||||
|
||||
/* FIXME: this may be speeded up using cntlzw instruction */
|
||||
for (exvec = 0;exvec < PPC_IRQ_EXT_MAX;exvec++) {
|
||||
mask = VEC_TO_EXMSK(exvec);
|
||||
if (0 != (istat & mask)) {
|
||||
clr_exisr(mask);
|
||||
handler = ictrl_vector_table[exvec];
|
||||
if (handler) {
|
||||
istat &= ~mask;
|
||||
global_vec = exvec + PPC_IRQ_EXT_BASE;
|
||||
(handler)(global_vec);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (istat != 0) { /* anything left? then we have a spurious interrupt */
|
||||
ictrl_spurious_handler(istat,cpu_frame);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* the following functions form the user interface
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
*
|
||||
* install a user vector for one of the external interrupt sources
|
||||
*
|
||||
*/
|
||||
rtems_status_code
|
||||
ictrl_set_vector(rtems_isr_entry new_handler,
|
||||
unsigned32 vector,
|
||||
rtems_isr_entry *old_handler
|
||||
)
|
||||
{
|
||||
/*
|
||||
* We put the actual user ISR address in 'ictrl_vector_table'. This will
|
||||
* be used by the _ictrl_isr so the user gets control.
|
||||
*/
|
||||
|
||||
/* check for valid vector range */
|
||||
if ((vector >= PPC_IRQ_EXT_BASE) &&
|
||||
(vector < PPC_IRQ_EXT_BASE + PPC_IRQ_EXT_MAX)) {
|
||||
|
||||
/* return old handler entry */
|
||||
*old_handler = ictrl_vector_table[vector - PPC_IRQ_EXT_BASE];
|
||||
|
||||
if (new_handler != NULL) {
|
||||
/* store handler function... */
|
||||
ictrl_vector_table[vector - PPC_IRQ_EXT_BASE] = new_handler;
|
||||
/* then enable it in EXIER register */
|
||||
enable_ext_irq(VEC_TO_EXMSK(vector - PPC_IRQ_EXT_BASE));
|
||||
}
|
||||
else { /* new_handler == NULL */
|
||||
/* then disable it in EXIER register */
|
||||
disable_ext_irq(VEC_TO_EXMSK(vector - PPC_IRQ_EXT_BASE));
|
||||
ictrl_vector_table[vector - PPC_IRQ_EXT_BASE] = NULL;
|
||||
}
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
else {
|
||||
return RTEMS_INVALID_NUMBER;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Called via atexit()
|
||||
* deactivate the interrupt controller
|
||||
*/
|
||||
|
||||
void
|
||||
ictrl_exit(void)
|
||||
{
|
||||
/* mark them all unused */
|
||||
disable_ext_irq(~0);
|
||||
clr_exisr(~0);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* activate the interrupt controller
|
||||
*/
|
||||
|
||||
rtems_status_code
|
||||
ictrl_init(void)
|
||||
{
|
||||
proc_ptr dummy;
|
||||
|
||||
/* mark them all unused */
|
||||
disable_ext_irq(~0);
|
||||
clr_exisr(~0);
|
||||
|
||||
/* install the external interrupt handler */
|
||||
_CPU_ISR_install_vector(PPC_IRQ_EXTERNAL,
|
||||
ictrl_isr,
|
||||
&dummy);
|
||||
atexit(ictrl_exit);
|
||||
return RTEMS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,84 @@
|
||||
/* ictrl.h
|
||||
*
|
||||
* This file contains definitions and declarations for the
|
||||
* PowerPC 403 CPU built-in external interrupt controller
|
||||
*
|
||||
*
|
||||
* Author: Thomas Doerfler <td@imd.m.isar.de>
|
||||
*
|
||||
* COPYRIGHT (c) 1998 by IMD, Puchheim, Germany
|
||||
*
|
||||
* To anyone who acknowledges that this file is provided "AS IS"
|
||||
* without any express or implied warranty:
|
||||
* permission to use, copy, modify, and distribute this file
|
||||
* for any purpose is hereby granted without fee, provided that
|
||||
* the above copyright notice and this notice appears in all
|
||||
* copies, and that the name of IMD not be used in
|
||||
* advertising or publicity pertaining to distribution of the
|
||||
* software without specific, written prior permission.
|
||||
* IMD makes no representations about the suitability
|
||||
* of this software for any purpose.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _INCLUDE_ICTRL_h
|
||||
#define _INCLUDE_ICTRL_h
|
||||
|
||||
#include <rtems.h>
|
||||
#include <rtems/system.h>
|
||||
#include <rtems/score/isr.h>
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* definitions for second level IRQ handler support
|
||||
* External Interrupts via EXTERNAL/EISR
|
||||
*/
|
||||
#define PPC_IRQ_EXT_BASE (PPC_IRQ_LAST+1)
|
||||
|
||||
/* mask for external interrupt status in EXIER/EXISR register */
|
||||
/* note: critical interrupt is in these registers aswell */
|
||||
#define PPC_EXI_MASK 0x0FFFFFFF
|
||||
|
||||
#define PPC_IRQ_EXT_SPIR (PPC_IRQ_EXT_BASE+4)
|
||||
#define PPC_IRQ_EXT_SPIT (PPC_IRQ_EXT_BASE+5)
|
||||
#define PPC_IRQ_EXT_JTAGR (PPC_IRQ_EXT_BASE+6)
|
||||
#define PPC_IRQ_EXT_JTAGT (PPC_IRQ_EXT_BASE+7)
|
||||
#define PPC_IRQ_EXT_DMA0 (PPC_IRQ_EXT_BASE+8)
|
||||
#define PPC_IRQ_EXT_DMA1 (PPC_IRQ_EXT_BASE+9)
|
||||
#define PPC_IRQ_EXT_DMA2 (PPC_IRQ_EXT_BASE+10)
|
||||
#define PPC_IRQ_EXT_DMA3 (PPC_IRQ_EXT_BASE+11)
|
||||
#define PPC_IRQ_EXT_0 (PPC_IRQ_EXT_BASE+27)
|
||||
#define PPC_IRQ_EXT_1 (PPC_IRQ_EXT_BASE+28)
|
||||
#define PPC_IRQ_EXT_2 (PPC_IRQ_EXT_BASE+29)
|
||||
#define PPC_IRQ_EXT_3 (PPC_IRQ_EXT_BASE+30)
|
||||
#define PPC_IRQ_EXT_4 (PPC_IRQ_EXT_BASE+31)
|
||||
|
||||
#define PPC_IRQ_EXT_MAX (32)
|
||||
|
||||
#define VEC_TO_EXMSK(v) (0x80000000 >> (v))
|
||||
|
||||
/*
|
||||
*
|
||||
* install a user vector for one of the external interrupt sources
|
||||
*
|
||||
*/
|
||||
rtems_status_code
|
||||
ictrl_set_vector(rtems_isr_entry new_handler,
|
||||
unsigned32 vector,
|
||||
rtems_isr_entry *old_handler
|
||||
);
|
||||
/*
|
||||
* activate the interrupt controller
|
||||
*/
|
||||
rtems_status_code
|
||||
ictrl_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ! _INCLUDE_ICTRL_h */
|
||||
/* end of include file */
|
||||
Reference in New Issue
Block a user